Lines Matching +full:dma +full:- +full:byte +full:- +full:en
1 /*-
2 * SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) AND ISC
28 /*-
64 /*-
65 * Based on BSD-licensed source modules in the Linux iwlwifi driver,
76 * Copyright(c) 2018 - 2019 Intel Corporation
90 * Copyright(c) 2018 - 2019 Intel Corporation
122 /*-
123 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
187 #define DEVNAME(_sc) (device_get_nameunit((_sc)->sc_dev))
188 #define IC2IFP(ic) (((struct ieee80211vap *)TAILQ_FIRST(&(ic)->ic_vaps))->iv_ifp)
201 #define PCI_PRODUCT_INTEL_WL_22500_1 0x2723 /* Wi-Fi 6 AX200 */
202 #define PCI_PRODUCT_INTEL_WL_22500_2 0x02f0 /* Wi-Fi 6 AX201 */
203 #define PCI_PRODUCT_INTEL_WL_22500_3 0xa0f0 /* Wi-Fi 6 AX201 */
204 #define PCI_PRODUCT_INTEL_WL_22500_4 0x34f0 /* Wi-Fi 6 AX201 */
205 #define PCI_PRODUCT_INTEL_WL_22500_5 0x06f0 /* Wi-Fi 6 AX201 */
206 #define PCI_PRODUCT_INTEL_WL_22500_6 0x43f0 /* Wi-Fi 6 AX201 */
207 #define PCI_PRODUCT_INTEL_WL_22500_7 0x3df0 /* Wi-Fi 6 AX201 */
208 #define PCI_PRODUCT_INTEL_WL_22500_8 0x4df0 /* Wi-Fi 6 AX201 */
209 #define PCI_PRODUCT_INTEL_WL_22500_9 0x2725 /* Wi-Fi 6 AX210 */
210 #define PCI_PRODUCT_INTEL_WL_22500_10 0x2726 /* Wi-Fi 6 AX211 */
211 #define PCI_PRODUCT_INTEL_WL_22500_11 0x51f0 /* Wi-Fi 6 AX211 */
212 #define PCI_PRODUCT_INTEL_WL_22500_12 0x7a70 /* Wi-Fi 6 AX211 */
213 #define PCI_PRODUCT_INTEL_WL_22500_13 0x7af0 /* Wi-Fi 6 AX211 */
214 #define PCI_PRODUCT_INTEL_WL_22500_14 0x7e40 /* Wi-Fi 6 AX210 */
215 #define PCI_PRODUCT_INTEL_WL_22500_15 0x7f70 /* Wi-Fi 6 AX211 */
216 #define PCI_PRODUCT_INTEL_WL_22500_16 0x54f0 /* Wi-Fi 6 AX211 */
217 #define PCI_PRODUCT_INTEL_WL_22500_17 0x51f1 /* Wi-Fi 6 AX211 */
223 { PCI_PRODUCT_INTEL_WL_22500_1, "Wi-Fi 6 AX200" },
224 { PCI_PRODUCT_INTEL_WL_22500_2, "Wi-Fi 6 AX201" },
225 { PCI_PRODUCT_INTEL_WL_22500_3, "Wi-Fi 6 AX201" },
226 { PCI_PRODUCT_INTEL_WL_22500_4, "Wi-Fi 6 AX201" },
227 { PCI_PRODUCT_INTEL_WL_22500_5, "Wi-Fi 6 AX201" },
228 { PCI_PRODUCT_INTEL_WL_22500_6, "Wi-Fi 6 AX201" },
229 { PCI_PRODUCT_INTEL_WL_22500_7, "Wi-Fi 6 AX201" },
230 { PCI_PRODUCT_INTEL_WL_22500_8, "Wi-Fi 6 AX201" },
231 { PCI_PRODUCT_INTEL_WL_22500_9, "Wi-Fi 6 AX210" },
232 { PCI_PRODUCT_INTEL_WL_22500_10, "Wi-Fi 6 AX211" },
233 { PCI_PRODUCT_INTEL_WL_22500_11, "Wi-Fi 6 AX211" },
234 { PCI_PRODUCT_INTEL_WL_22500_12, "Wi-Fi 6 AX211" },
235 { PCI_PRODUCT_INTEL_WL_22500_13, "Wi-Fi 6 AX211" },
236 { PCI_PRODUCT_INTEL_WL_22500_14, "Wi-Fi 6 AX210" },
237 { PCI_PRODUCT_INTEL_WL_22500_15, "Wi-Fi 6 AX211" },
238 { PCI_PRODUCT_INTEL_WL_22500_16, "Wi-Fi 6 AX211" },
239 { PCI_PRODUCT_INTEL_WL_22500_17, "Wi-Fi 6 AX211" },
258 /* 6-7 GHz */
298 #define IWX_RIDX_MAX (nitems(iwx_rates)-1)
573 /* XXX-THJ - I don't have hardware for this */
592 #define DPRINTF(x) do { if (sc->sc_debug == IWX_DEBUG_ANY) { printf x; } } while (0)
654 return (wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == in ieee80211_has_addr4()
664 for (i = 0; i < sc->n_cmd_versions; i++) { in iwx_lookup_cmd_ver()
665 entry = &sc->cmd_versions[i]; in iwx_lookup_cmd_ver()
666 if (entry->group == grp && entry->cmd == cmd) in iwx_lookup_cmd_ver()
667 return entry->cmd_ver; in iwx_lookup_cmd_ver()
679 for (i = 0; i < sc->n_cmd_versions; i++) { in iwx_lookup_notif_ver()
680 entry = &sc->cmd_versions[i]; in iwx_lookup_notif_ver()
681 if (entry->group == grp && entry->cmd == cmd) in iwx_lookup_notif_ver()
682 return entry->notif_ver; in iwx_lookup_notif_ver()
694 dlen < sizeof(l->size) + l->size * sizeof(*l->cs)) in iwx_store_cscheme()
706 int err = iwx_dma_contig_alloc(sc->sc_dmat, dram, sec->fws_len, 1); in iwx_ctxt_info_alloc_dma()
708 printf("%s: could not allocate context info DMA memory\n", in iwx_ctxt_info_alloc_dma()
713 memcpy(dram->vaddr, sec->fws_data, sec->fws_len); in iwx_ctxt_info_alloc_dma()
721 struct iwx_self_init_dram *dram = &sc->init_dram; in iwx_ctxt_info_free_paging()
724 if (!dram->paging) in iwx_ctxt_info_free_paging()
728 for (i = 0; i < dram->paging_cnt; i++) in iwx_ctxt_info_free_paging()
729 iwx_dma_contig_free(&dram->paging[i]); in iwx_ctxt_info_free_paging()
731 free(dram->paging, M_DEVBUF); in iwx_ctxt_info_free_paging()
732 dram->paging_cnt = 0; in iwx_ctxt_info_free_paging()
733 dram->paging = NULL; in iwx_ctxt_info_free_paging()
741 while (start < fws->fw_count && in iwx_get_num_sections()
742 fws->fw_sect[start].fws_devoff != IWX_CPU1_CPU2_SEPARATOR_SECTION && in iwx_get_num_sections()
743 fws->fw_sect[start].fws_devoff != IWX_PAGING_SEPARATOR_SECTION) { in iwx_get_num_sections()
755 struct iwx_self_init_dram *dram = &sc->init_dram; in iwx_init_fw_sec()
758 KASSERT(dram->paging == NULL, ("iwx_init_fw_sec")); in iwx_init_fw_sec()
760 dram->lmac_cnt = iwx_get_num_sections(fws, 0); in iwx_init_fw_sec()
762 dram->umac_cnt = iwx_get_num_sections(fws, dram->lmac_cnt + 1); in iwx_init_fw_sec()
764 dram->paging_cnt = iwx_get_num_sections(fws, in iwx_init_fw_sec()
765 dram->lmac_cnt + dram->umac_cnt + 2); in iwx_init_fw_sec()
768 dram->fw = mallocarray(dram->umac_cnt + dram->lmac_cnt, in iwx_init_fw_sec()
769 sizeof(*dram->fw), M_DEVBUF, M_ZERO | M_NOWAIT); in iwx_init_fw_sec()
770 if (!dram->fw) { in iwx_init_fw_sec()
777 dram->paging = mallocarray(dram->paging_cnt, sizeof(*dram->paging), in iwx_init_fw_sec()
780 if (!dram->paging) { in iwx_init_fw_sec()
787 for (i = 0; i < dram->lmac_cnt; i++) { in iwx_init_fw_sec()
788 ret = iwx_ctxt_info_alloc_dma(sc, &fws->fw_sect[i], in iwx_init_fw_sec()
789 &dram->fw[fw_cnt]); in iwx_init_fw_sec()
792 ctxt_dram->lmac_img[i] = in iwx_init_fw_sec()
793 htole64(dram->fw[fw_cnt].paddr); in iwx_init_fw_sec()
797 (unsigned long long)dram->fw[fw_cnt].paddr, in iwx_init_fw_sec()
798 (unsigned long long)dram->fw[fw_cnt].size); in iwx_init_fw_sec()
803 for (i = 0; i < dram->umac_cnt; i++) { in iwx_init_fw_sec()
806 &fws->fw_sect[fw_cnt + 1], &dram->fw[fw_cnt]); in iwx_init_fw_sec()
809 ctxt_dram->umac_img[i] = in iwx_init_fw_sec()
810 htole64(dram->fw[fw_cnt].paddr); in iwx_init_fw_sec()
814 (unsigned long long)dram->fw[fw_cnt].paddr, in iwx_init_fw_sec()
815 (unsigned long long)dram->fw[fw_cnt].size); in iwx_init_fw_sec()
821 * Paging memory isn't stored in dram->fw as the umac and lmac - it is in iwx_init_fw_sec()
823 * This is since the timing of its release is different - in iwx_init_fw_sec()
827 * different - fw_cnt isn't changing so loop counter is added to it. in iwx_init_fw_sec()
829 for (i = 0; i < dram->paging_cnt; i++) { in iwx_init_fw_sec()
834 &fws->fw_sect[fw_idx], &dram->paging[i]); in iwx_init_fw_sec()
838 ctxt_dram->virtual_img[i] = htole64(dram->paging[i].paddr); in iwx_init_fw_sec()
842 (unsigned long long)dram->paging[i].paddr, in iwx_init_fw_sec()
843 (unsigned long long)dram->paging[i].size); in iwx_init_fw_sec()
867 struct iwx_dma_info *fw_mon = &sc->fw_mon;
872 if (fw_mon->size)
875 for (power = max_power; power >= min_power; power--) {
878 err = iwx_dma_contig_alloc(sc->sc_dmat, fw_mon, size, 0);
889 fw_mon->size = 0;
895 "%s: Sorry - debug buffer is only %luK while you requested %luK\n",
896 DEVNAME(sc), (unsigned long)(1 << (power - 10)),
897 (unsigned long)(1 << (max_power - 10)));
919 if (sc->fw_mon.size)
935 dest_v1 = sc->sc_fw.dbg_dest_tlv_v1; in iwx_apply_debug_destination()
936 mon_mode = dest_v1->monitor_mode; in iwx_apply_debug_destination()
937 size_power = dest_v1->size_power; in iwx_apply_debug_destination()
938 base_reg = le32toh(dest_v1->base_reg); in iwx_apply_debug_destination()
939 end_reg = le32toh(dest_v1->end_reg); in iwx_apply_debug_destination()
940 base_shift = dest_v1->base_shift; in iwx_apply_debug_destination()
941 end_shift = dest_v1->end_shift; in iwx_apply_debug_destination()
954 for (i = 0; i < sc->sc_fw.n_dest_reg; i++) { in iwx_apply_debug_destination()
958 addr = le32toh(dest_v1->reg_ops[i].addr); in iwx_apply_debug_destination()
959 val = le32toh(dest_v1->reg_ops[i].val); in iwx_apply_debug_destination()
960 op = dest_v1->reg_ops[i].op; in iwx_apply_debug_destination()
991 DPRINTF(("%s: FW debug - unknown OP %d\n", in iwx_apply_debug_destination()
998 if (mon_mode == EXTERNAL_MODE && sc->fw_mon.size) { in iwx_apply_debug_destination()
1000 sc->fw_mon.paddr >> base_shift); in iwx_apply_debug_destination()
1002 (sc->fw_mon.paddr + sc->fw_mon.size - 256) in iwx_apply_debug_destination()
1033 if (!sc->sc_integrated) { in iwx_set_ltr()
1035 } else if (sc->sc_integrated && in iwx_set_ltr()
1036 sc->sc_device_family == IWX_DEVICE_FAMILY_22000) { in iwx_set_ltr()
1052 ctxt_info = sc->ctxt_info_dma.vaddr; in iwx_ctxt_info_init()
1055 ctxt_info->version.version = 0; in iwx_ctxt_info_init()
1056 ctxt_info->version.mac_id = in iwx_ctxt_info_init()
1059 ctxt_info->version.size = htole16(sizeof(*ctxt_info) / 4); in iwx_ctxt_info_init()
1068 ctxt_info->control.control_flags = htole32(control_flags); in iwx_ctxt_info_init()
1071 rx_cfg = &ctxt_info->rbd_cfg; in iwx_ctxt_info_init()
1072 rx_cfg->free_rbd_addr = htole64(sc->rxq.free_desc_dma.paddr); in iwx_ctxt_info_init()
1073 rx_cfg->used_rbd_addr = htole64(sc->rxq.used_desc_dma.paddr); in iwx_ctxt_info_init()
1074 rx_cfg->status_wr_ptr = htole64(sc->rxq.stat_dma.paddr); in iwx_ctxt_info_init()
1077 ctxt_info->hcmd_cfg.cmd_queue_addr = in iwx_ctxt_info_init()
1078 htole64(sc->txq[IWX_DQA_CMD_QUEUE].desc_dma.paddr); in iwx_ctxt_info_init()
1079 ctxt_info->hcmd_cfg.cmd_queue_size = in iwx_ctxt_info_init()
1083 err = iwx_init_fw_sec(sc, fws, &ctxt_info->dram); in iwx_ctxt_info_init()
1090 if (sc->sc_fw.dbg_dest_tlv_v1) { in iwx_ctxt_info_init()
1101 * Write the context info DMA base address. The device expects a in iwx_ctxt_info_init()
1102 * 64-bit address but a simple bus_space_write_8 to this register in iwx_ctxt_info_init()
1105 paddr = sc->ctxt_info_dma.paddr; in iwx_ctxt_info_init()
1135 if (sc->sc_fw.iml == NULL || sc->sc_fw.iml_len == 0) { in iwx_ctxt_info_gen3_init()
1142 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->iml_dma, in iwx_ctxt_info_gen3_init()
1143 sc->sc_fw.iml_len, 1); in iwx_ctxt_info_gen3_init()
1145 printf("%s: could not allocate DMA memory for " in iwx_ctxt_info_gen3_init()
1151 prph_scratch = sc->prph_scratch_dma.vaddr; in iwx_ctxt_info_gen3_init()
1153 prph_sc_ctrl = &prph_scratch->ctrl_cfg; in iwx_ctxt_info_gen3_init()
1154 prph_sc_ctrl->version.version = 0; in iwx_ctxt_info_gen3_init()
1155 prph_sc_ctrl->version.mac_id = htole16(IWX_READ(sc, IWX_CSR_HW_REV)); in iwx_ctxt_info_gen3_init()
1156 prph_sc_ctrl->version.size = htole16(sizeof(*prph_scratch) / 4); in iwx_ctxt_info_gen3_init()
1161 if (sc->sc_imr_enabled) in iwx_ctxt_info_gen3_init()
1163 prph_sc_ctrl->control.control_flags = htole32(control_flags); in iwx_ctxt_info_gen3_init()
1166 prph_sc_ctrl->rbd_cfg.free_rbd_addr = in iwx_ctxt_info_gen3_init()
1167 htole64(sc->rxq.free_desc_dma.paddr); in iwx_ctxt_info_gen3_init()
1170 err = iwx_init_fw_sec(sc, fws, &prph_scratch->dram); in iwx_ctxt_info_gen3_init()
1172 iwx_dma_contig_free(&sc->iml_dma); in iwx_ctxt_info_gen3_init()
1177 ctxt_info_gen3 = sc->ctxt_info_dma.vaddr; in iwx_ctxt_info_gen3_init()
1179 ctxt_info_gen3->prph_info_base_addr = htole64(sc->prph_info_dma.paddr); in iwx_ctxt_info_gen3_init()
1180 ctxt_info_gen3->prph_scratch_base_addr = in iwx_ctxt_info_gen3_init()
1181 htole64(sc->prph_scratch_dma.paddr); in iwx_ctxt_info_gen3_init()
1183 ctxt_info_gen3->prph_scratch_size = htole32(scratch_size); in iwx_ctxt_info_gen3_init()
1184 ctxt_info_gen3->cr_head_idx_arr_base_addr = in iwx_ctxt_info_gen3_init()
1185 htole64(sc->rxq.stat_dma.paddr); in iwx_ctxt_info_gen3_init()
1186 ctxt_info_gen3->tr_tail_idx_arr_base_addr = in iwx_ctxt_info_gen3_init()
1187 htole64(sc->prph_info_dma.paddr + PAGE_SIZE / 2); in iwx_ctxt_info_gen3_init()
1188 ctxt_info_gen3->cr_tail_idx_arr_base_addr = in iwx_ctxt_info_gen3_init()
1189 htole64(sc->prph_info_dma.paddr + 3 * PAGE_SIZE / 4); in iwx_ctxt_info_gen3_init()
1190 ctxt_info_gen3->mtr_base_addr = in iwx_ctxt_info_gen3_init()
1191 htole64(sc->txq[IWX_DQA_CMD_QUEUE].desc_dma.paddr); in iwx_ctxt_info_gen3_init()
1192 ctxt_info_gen3->mcr_base_addr = htole64(sc->rxq.used_desc_dma.paddr); in iwx_ctxt_info_gen3_init()
1194 ctxt_info_gen3->mtr_size = htole16(cb_size); in iwx_ctxt_info_gen3_init()
1196 ctxt_info_gen3->mcr_size = htole16(cb_size); in iwx_ctxt_info_gen3_init()
1198 memcpy(sc->iml_dma.vaddr, sc->sc_fw.iml, sc->sc_fw.iml_len); in iwx_ctxt_info_gen3_init()
1200 paddr = sc->ctxt_info_dma.paddr; in iwx_ctxt_info_gen3_init()
1204 paddr = sc->iml_dma.paddr; in iwx_ctxt_info_gen3_init()
1207 IWX_WRITE(sc, IWX_CSR_IML_SIZE_ADDR, sc->sc_fw.iml_len); in iwx_ctxt_info_gen3_init()
1217 iwx_dma_contig_free(&sc->iml_dma); in iwx_ctxt_info_gen3_init()
1232 struct iwx_self_init_dram *dram = &sc->init_dram; in iwx_ctxt_info_free_fw_img()
1235 if (!dram->fw) in iwx_ctxt_info_free_fw_img()
1238 for (i = 0; i < dram->lmac_cnt + dram->umac_cnt; i++) in iwx_ctxt_info_free_fw_img()
1239 iwx_dma_contig_free(&dram->fw[i]); in iwx_ctxt_info_free_fw_img()
1241 free(dram->fw, M_DEVBUF); in iwx_ctxt_info_free_fw_img()
1242 dram->lmac_cnt = 0; in iwx_ctxt_info_free_fw_img()
1243 dram->umac_cnt = 0; in iwx_ctxt_info_free_fw_img()
1244 dram->fw = NULL; in iwx_ctxt_info_free_fw_img()
1259 fws = &sc->sc_fw.fw_sects[type]; in iwx_firmware_store_section()
1261 "%s: ucode type %d section %d\n", DEVNAME(sc), type, fws->fw_count); in iwx_firmware_store_section()
1262 if (fws->fw_count >= IWX_UCODE_SECT_MAX) in iwx_firmware_store_section()
1265 fwone = &fws->fw_sect[fws->fw_count]; in iwx_firmware_store_section()
1268 memcpy(&fwone->fws_devoff, data, sizeof(uint32_t)); in iwx_firmware_store_section()
1271 fwone->fws_data = data + sizeof(uint32_t); in iwx_firmware_store_section()
1272 fwone->fws_len = dlen - sizeof(uint32_t); in iwx_firmware_store_section()
1274 fws->fw_count++; in iwx_firmware_store_section()
1275 fws->fw_totlen += fwone->fws_len; in iwx_firmware_store_section()
1282 #define IWX_MAX_SCAN_CHANNELS 67 /* as of iwx-cc-a0-62 firmware */
1293 uint32_t ucode_type = le32toh(def_calib->ucode_type); in iwx_set_default_calib()
1298 sc->sc_default_calib[ucode_type].flow_trigger = in iwx_set_default_calib()
1299 def_calib->calib.flow_trigger; in iwx_set_default_calib()
1300 sc->sc_default_calib[ucode_type].event_trigger = in iwx_set_default_calib()
1301 def_calib->calib.event_trigger; in iwx_set_default_calib()
1309 free(fw->fw_rawdata, M_DEVBUF); in iwx_fw_info_free()
1310 fw->fw_rawdata = NULL; in iwx_fw_info_free()
1311 fw->fw_rawsize = 0; in iwx_fw_info_free()
1312 /* don't touch fw->fw_status */ in iwx_fw_info_free()
1313 memset(fw->fw_sects, 0, sizeof(fw->fw_sects)); in iwx_fw_info_free()
1314 free(fw->iml, M_DEVBUF); in iwx_fw_info_free()
1315 fw->iml = NULL; in iwx_fw_info_free()
1316 fw->iml_len = 0; in iwx_fw_info_free()
1324 struct iwx_fw_info *fw = &sc->sc_fw; in iwx_read_firmware()
1333 if (fw->fw_status == IWX_FW_STATUS_DONE) in iwx_read_firmware()
1336 fw->fw_status = IWX_FW_STATUS_INPROGRESS; in iwx_read_firmware()
1337 fwp = firmware_get(sc->sc_fwname); in iwx_read_firmware()
1338 sc->sc_fwp = fwp; in iwx_read_firmware()
1342 DEVNAME(sc), sc->sc_fwname); in iwx_read_firmware()
1348 __func__, __LINE__, DEVNAME(sc), sc->sc_fwname); in iwx_read_firmware()
1351 sc->sc_capaflags = 0; in iwx_read_firmware()
1352 sc->sc_capa_n_scan_channels = IWX_DEFAULT_SCAN_CHANNELS; in iwx_read_firmware()
1353 memset(sc->sc_enabled_capa, 0, sizeof(sc->sc_enabled_capa)); in iwx_read_firmware()
1354 memset(sc->sc_ucode_api, 0, sizeof(sc->sc_ucode_api)); in iwx_read_firmware()
1355 sc->n_cmd_versions = 0; in iwx_read_firmware()
1357 uhdr = (const void *)(fwp->data); in iwx_read_firmware()
1358 if (*(const uint32_t *)fwp->data != 0 in iwx_read_firmware()
1359 || le32toh(uhdr->magic) != IWX_TLV_UCODE_MAGIC) { in iwx_read_firmware()
1361 DEVNAME(sc), sc->sc_fwname); in iwx_read_firmware()
1366 iwx_fw_version_str(sc->sc_fwver, sizeof(sc->sc_fwver), in iwx_read_firmware()
1367 IWX_UCODE_MAJOR(le32toh(uhdr->ver)), in iwx_read_firmware()
1368 IWX_UCODE_MINOR(le32toh(uhdr->ver)), in iwx_read_firmware()
1369 IWX_UCODE_API(le32toh(uhdr->ver))); in iwx_read_firmware()
1371 data = uhdr->data; in iwx_read_firmware()
1372 len = fwp->datasize - sizeof(*uhdr); in iwx_read_firmware()
1382 len -= sizeof(tlv); in iwx_read_firmware()
1399 sc->sc_capa_max_probe_len in iwx_read_firmware()
1401 if (sc->sc_capa_max_probe_len > in iwx_read_firmware()
1412 sc->sc_capaflags |= IWX_UCODE_TLV_FLAGS_PAN; in iwx_read_firmware()
1430 sc->sc_capaflags = le32toh(*(const uint32_t *)tlv_data); in iwx_read_firmware()
1482 sc->sc_fw_phy_config = le32toh(*(const uint32_t *)tlv_data); in iwx_read_firmware()
1493 idx = le32toh(api->api_index); in iwx_read_firmware()
1499 if ((le32toh(api->api_flags) & (1 << i)) == 0) in iwx_read_firmware()
1501 setbit(sc->sc_ucode_api, i + (32 * idx)); in iwx_read_firmware()
1514 idx = le32toh(capa->api_index); in iwx_read_firmware()
1519 if ((le32toh(capa->api_capa) & (1 << i)) == 0) in iwx_read_firmware()
1521 setbit(sc->sc_enabled_capa, i + (32 * idx)); in iwx_read_firmware()
1551 sc->sc_capa_n_scan_channels = in iwx_read_firmware()
1553 if (sc->sc_capa_n_scan_channels > IWX_MAX_SCAN_CHANNELS) { in iwx_read_firmware()
1565 iwx_fw_version_str(sc->sc_fwver, sizeof(sc->sc_fwver), in iwx_read_firmware()
1574 fw->dbg_dest_ver = (const uint8_t *)tlv_data; in iwx_read_firmware()
1575 if (*fw->dbg_dest_ver != 0) { in iwx_read_firmware()
1580 if (fw->dbg_dest_tlv_init) in iwx_read_firmware()
1582 fw->dbg_dest_tlv_init = true; in iwx_read_firmware()
1585 fw->dbg_dest_tlv_v1 = dest_v1; in iwx_read_firmware()
1586 fw->n_dest_reg = tlv_len - in iwx_read_firmware()
1588 fw->n_dest_reg /= sizeof(dest_v1->reg_ops[0]); in iwx_read_firmware()
1591 __func__, fw->n_dest_reg); in iwx_read_firmware()
1598 if (!fw->dbg_dest_tlv_init || in iwx_read_firmware()
1599 conf->id >= nitems(fw->dbg_conf_tlv) || in iwx_read_firmware()
1600 fw->dbg_conf_tlv[conf->id] != NULL) in iwx_read_firmware()
1604 "Found debug configuration: %d\n", conf->id); in iwx_read_firmware()
1605 fw->dbg_conf_tlv[conf->id] = conf; in iwx_read_firmware()
1606 fw->dbg_conf_tlv_len[conf->id] = tlv_len; in iwx_read_firmware()
1618 if (sc->sc_device_family < IWX_DEVICE_FAMILY_22000) in iwx_read_firmware()
1620 sc->sc_uc.uc_umac_error_event_table = in iwx_read_firmware()
1621 le32toh(dbg_ptrs->error_info_addr) & in iwx_read_firmware()
1623 sc->sc_uc.error_event_table_tlv_status |= in iwx_read_firmware()
1636 if (sc->sc_device_family < IWX_DEVICE_FAMILY_22000) in iwx_read_firmware()
1638 sc->sc_uc.uc_lmac_error_event_table[0] = in iwx_read_firmware()
1639 le32toh(dbg_ptrs->error_event_table_ptr) & in iwx_read_firmware()
1641 sc->sc_uc.error_event_table_tlv_status |= in iwx_read_firmware()
1650 if (sc->sc_fw.iml != NULL) { in iwx_read_firmware()
1651 free(fw->iml, M_DEVBUF); in iwx_read_firmware()
1652 fw->iml_len = 0; in iwx_read_firmware()
1654 sc->sc_fw.iml = malloc(tlv_len, M_DEVBUF, in iwx_read_firmware()
1656 if (sc->sc_fw.iml == NULL) { in iwx_read_firmware()
1660 memcpy(sc->sc_fw.iml, tlv_data, tlv_len); in iwx_read_firmware()
1661 sc->sc_fw.iml_len = tlv_len; in iwx_read_firmware()
1669 if (sc->n_cmd_versions != 0) { in iwx_read_firmware()
1673 if (tlv_len > sizeof(sc->cmd_versions)) { in iwx_read_firmware()
1677 memcpy(&sc->cmd_versions[0], tlv_data, tlv_len); in iwx_read_firmware()
1678 sc->n_cmd_versions = tlv_len / sizeof(struct iwx_fw_cmd_version); in iwx_read_firmware()
1690 /* undocumented TLVs found in iwx-cc-a0-46 image */ in iwx_read_firmware()
1696 /* undocumented TLVs found in iwx-cc-a0-48 image */ in iwx_read_firmware()
1712 /* undocumented TLV found in iwx-cc-a0-67 image */ in iwx_read_firmware()
1716 /* undocumented TLV found in iwx-ty-a0-gf-a0-73 image */ in iwx_read_firmware()
1720 /* undocumented TLV found in iwx-ty-a0-gf-a0-77 image */ in iwx_read_firmware()
1724 /* undocumented TLV found in iwx-ty-a0-gf-a0-89 image */ in iwx_read_firmware()
1740 len -= roundup(tlv_len, 4); in iwx_read_firmware()
1754 fw->fw_status = IWX_FW_STATUS_NONE; in iwx_read_firmware()
1755 if (fw->fw_rawdata != NULL) in iwx_read_firmware()
1758 fw->fw_status = IWX_FW_STATUS_DONE; in iwx_read_firmware()
1765 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_prph_addr_mask()
1806 return iwx_read_prph(sc, addr + sc->sc_umac_prph_offset); in iwx_read_umac_prph()
1812 iwx_write_prph(sc, addr + sc->sc_umac_prph_offset, val); in iwx_write_umac_prph()
1843 timo -= 10; in iwx_poll_bit()
1851 if (sc->sc_nic_locks > 0) { in iwx_nic_lock()
1853 sc->sc_nic_locks++; in iwx_nic_lock()
1866 sc->sc_nic_locks++; in iwx_nic_lock()
1877 if (sc->sc_nic_locks <= 0) in iwx_nic_assert_locked()
1878 panic("%s: nic locks counter %d", DEVNAME(sc), sc->sc_nic_locks); in iwx_nic_assert_locked()
1884 if (sc->sc_nic_locks > 0) { in iwx_nic_unlock()
1885 if (--sc->sc_nic_locks == 0) in iwx_nic_unlock()
1925 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs)); in iwx_dma_map_addr()
1930 iwx_dma_contig_alloc(bus_dma_tag_t tag, struct iwx_dma_info *dma, in iwx_dma_contig_alloc() argument
1935 dma->tag = NULL; in iwx_dma_contig_alloc()
1936 dma->map = NULL; in iwx_dma_contig_alloc()
1937 dma->size = size; in iwx_dma_contig_alloc()
1938 dma->vaddr = NULL; in iwx_dma_contig_alloc()
1942 1, size, 0, NULL, NULL, &dma->tag); in iwx_dma_contig_alloc()
1946 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, in iwx_dma_contig_alloc()
1947 BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->map); in iwx_dma_contig_alloc()
1951 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr, size, in iwx_dma_contig_alloc()
1952 iwx_dma_map_addr, &dma->paddr, BUS_DMA_NOWAIT); in iwx_dma_contig_alloc()
1954 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); in iwx_dma_contig_alloc()
1955 dma->vaddr = NULL; in iwx_dma_contig_alloc()
1959 bus_dmamap_sync(dma->tag, dma->map, BUS_DMASYNC_PREWRITE); in iwx_dma_contig_alloc()
1964 iwx_dma_contig_free(dma); in iwx_dma_contig_alloc()
1969 iwx_dma_contig_free(struct iwx_dma_info *dma) in iwx_dma_contig_free() argument
1971 if (dma->vaddr != NULL) { in iwx_dma_contig_free()
1972 bus_dmamap_sync(dma->tag, dma->map, in iwx_dma_contig_free()
1974 bus_dmamap_unload(dma->tag, dma->map); in iwx_dma_contig_free()
1975 bus_dmamem_free(dma->tag, dma->vaddr, dma->map); in iwx_dma_contig_free()
1976 dma->vaddr = NULL; in iwx_dma_contig_free()
1978 if (dma->tag != NULL) { in iwx_dma_contig_free()
1979 bus_dma_tag_destroy(dma->tag); in iwx_dma_contig_free()
1980 dma->tag = NULL; in iwx_dma_contig_free()
1990 ring->cur = 0; in iwx_alloc_rx_ring()
1992 /* Allocate RX descriptors (256-byte aligned). */ in iwx_alloc_rx_ring()
1993 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_alloc_rx_ring()
1997 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->free_desc_dma, in iwx_alloc_rx_ring()
2000 device_printf(sc->sc_dev, in iwx_alloc_rx_ring()
2001 "could not allocate RX ring DMA memory\n"); in iwx_alloc_rx_ring()
2004 ring->desc = ring->free_desc_dma.vaddr; in iwx_alloc_rx_ring()
2006 /* Allocate RX status area (16-byte aligned). */ in iwx_alloc_rx_ring()
2007 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_alloc_rx_ring()
2010 size = sizeof(*ring->stat); in iwx_alloc_rx_ring()
2011 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->stat_dma, size, 16); in iwx_alloc_rx_ring()
2013 device_printf(sc->sc_dev, in iwx_alloc_rx_ring()
2014 "could not allocate RX status DMA memory\n"); in iwx_alloc_rx_ring()
2017 ring->stat = ring->stat_dma.vaddr; in iwx_alloc_rx_ring()
2019 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_alloc_rx_ring()
2023 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->used_desc_dma, in iwx_alloc_rx_ring()
2026 device_printf(sc->sc_dev, in iwx_alloc_rx_ring()
2027 "could not allocate RX ring DMA memory\n"); in iwx_alloc_rx_ring()
2031 err = bus_dma_tag_create(sc->sc_dmat, 1, 0, BUS_SPACE_MAXADDR_32BIT, in iwx_alloc_rx_ring()
2033 0, NULL, NULL, &ring->data_dmat); in iwx_alloc_rx_ring()
2036 struct iwx_rx_data *data = &ring->data[i]; in iwx_alloc_rx_ring()
2039 err = bus_dmamap_create(ring->data_dmat, 0, &data->map); in iwx_alloc_rx_ring()
2041 device_printf(sc->sc_dev, in iwx_alloc_rx_ring()
2042 "could not create RX buf DMA map\n"); in iwx_alloc_rx_ring()
2062 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_disable_rx_dma()
2067 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_disable_rx_dma()
2085 ring->cur = 0; in iwx_reset_rx_ring()
2086 bus_dmamap_sync(sc->sc_dmat, ring->stat_dma.map, in iwx_reset_rx_ring()
2088 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_reset_rx_ring()
2089 uint16_t *status = sc->rxq.stat_dma.vaddr; in iwx_reset_rx_ring()
2092 memset(ring->stat, 0, sizeof(*ring->stat)); in iwx_reset_rx_ring()
2093 bus_dmamap_sync(sc->sc_dmat, ring->stat_dma.map, in iwx_reset_rx_ring()
2103 iwx_dma_contig_free(&ring->free_desc_dma); in iwx_free_rx_ring()
2104 iwx_dma_contig_free(&ring->stat_dma); in iwx_free_rx_ring()
2105 iwx_dma_contig_free(&ring->used_desc_dma); in iwx_free_rx_ring()
2108 struct iwx_rx_data *data = &ring->data[i]; in iwx_free_rx_ring()
2109 if (data->m != NULL) { in iwx_free_rx_ring()
2110 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_free_rx_ring()
2112 bus_dmamap_unload(ring->data_dmat, data->map); in iwx_free_rx_ring()
2113 m_freem(data->m); in iwx_free_rx_ring()
2114 data->m = NULL; in iwx_free_rx_ring()
2116 if (data->map != NULL) { in iwx_free_rx_ring()
2117 bus_dmamap_destroy(ring->data_dmat, data->map); in iwx_free_rx_ring()
2118 data->map = NULL; in iwx_free_rx_ring()
2121 if (ring->data_dmat != NULL) { in iwx_free_rx_ring()
2122 bus_dma_tag_destroy(ring->data_dmat); in iwx_free_rx_ring()
2123 ring->data_dmat = NULL; in iwx_free_rx_ring()
2137 ring->qid = qid; in iwx_alloc_tx_ring()
2138 ring->queued = 0; in iwx_alloc_tx_ring()
2139 ring->cur = 0; in iwx_alloc_tx_ring()
2140 ring->cur_hw = 0; in iwx_alloc_tx_ring()
2141 ring->tail = 0; in iwx_alloc_tx_ring()
2142 ring->tail_hw = 0; in iwx_alloc_tx_ring()
2144 /* Allocate TX descriptors (256-byte aligned). */ in iwx_alloc_tx_ring()
2146 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma, size, 256); in iwx_alloc_tx_ring()
2148 device_printf(sc->sc_dev, in iwx_alloc_tx_ring()
2149 "could not allocate TX ring DMA memory\n"); in iwx_alloc_tx_ring()
2152 ring->desc = ring->desc_dma.vaddr; in iwx_alloc_tx_ring()
2159 * management, control, and non-QoS data frames. in iwx_alloc_tx_ring()
2160 * The command is queue sc->txq[0], our default queue is sc->txq[1]. in iwx_alloc_tx_ring()
2163 * which aggregation is enabled. We map TID 0-7 to sc->txq[2:9]. in iwx_alloc_tx_ring()
2166 * The driver maintains a table mapping driver-side queue IDs in iwx_alloc_tx_ring()
2167 * to firmware-side queue IDs. in iwx_alloc_tx_ring()
2170 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_alloc_tx_ring()
2178 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->bc_tbl, bc_tbl_size, in iwx_alloc_tx_ring()
2181 device_printf(sc->sc_dev, in iwx_alloc_tx_ring()
2182 "could not allocate byte count table DMA memory\n"); in iwx_alloc_tx_ring()
2187 err = iwx_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma, size, in iwx_alloc_tx_ring()
2190 device_printf(sc->sc_dev, in iwx_alloc_tx_ring()
2191 "could not allocate cmd DMA memory\n"); in iwx_alloc_tx_ring()
2194 ring->cmd = ring->cmd_dma.vaddr; in iwx_alloc_tx_ring()
2202 err = bus_dma_tag_create(sc->sc_dmat, 1, 0, BUS_SPACE_MAXADDR_32BIT, in iwx_alloc_tx_ring()
2203 BUS_SPACE_MAXADDR, NULL, NULL, mapsize, IWX_TFH_NUM_TBS - 2, in iwx_alloc_tx_ring()
2204 mapsize, 0, NULL, NULL, &ring->data_dmat); in iwx_alloc_tx_ring()
2206 paddr = ring->cmd_dma.paddr; in iwx_alloc_tx_ring()
2208 struct iwx_tx_data *data = &ring->data[i]; in iwx_alloc_tx_ring()
2210 data->cmd_paddr = paddr; in iwx_alloc_tx_ring()
2213 err = bus_dmamap_create(ring->data_dmat, 0, &data->map); in iwx_alloc_tx_ring()
2215 device_printf(sc->sc_dev, in iwx_alloc_tx_ring()
2216 "could not create TX buf DMA map\n"); in iwx_alloc_tx_ring()
2220 KASSERT(paddr == ring->cmd_dma.paddr + size, ("bad paddr in txr alloc")); in iwx_alloc_tx_ring()
2233 struct iwx_tx_data *data = &ring->data[i]; in iwx_reset_tx_ring()
2235 if (data->m != NULL) { in iwx_reset_tx_ring()
2236 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_reset_tx_ring()
2238 bus_dmamap_unload(ring->data_dmat, data->map); in iwx_reset_tx_ring()
2239 m_freem(data->m); in iwx_reset_tx_ring()
2240 data->m = NULL; in iwx_reset_tx_ring()
2244 /* Clear byte count table. */ in iwx_reset_tx_ring()
2245 memset(ring->bc_tbl.vaddr, 0, ring->bc_tbl.size); in iwx_reset_tx_ring()
2248 memset(ring->desc, 0, ring->desc_dma.size); in iwx_reset_tx_ring()
2249 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwx_reset_tx_ring()
2251 sc->qfullmsk &= ~(1 << ring->qid); in iwx_reset_tx_ring()
2252 sc->qenablemsk &= ~(1 << ring->qid); in iwx_reset_tx_ring()
2253 for (i = 0; i < nitems(sc->aggqid); i++) { in iwx_reset_tx_ring()
2254 if (sc->aggqid[i] == ring->qid) { in iwx_reset_tx_ring()
2255 sc->aggqid[i] = 0; in iwx_reset_tx_ring()
2259 ring->queued = 0; in iwx_reset_tx_ring()
2260 ring->cur = 0; in iwx_reset_tx_ring()
2261 ring->cur_hw = 0; in iwx_reset_tx_ring()
2262 ring->tail = 0; in iwx_reset_tx_ring()
2263 ring->tail_hw = 0; in iwx_reset_tx_ring()
2264 ring->tid = 0; in iwx_reset_tx_ring()
2272 iwx_dma_contig_free(&ring->desc_dma); in iwx_free_tx_ring()
2273 iwx_dma_contig_free(&ring->cmd_dma); in iwx_free_tx_ring()
2274 iwx_dma_contig_free(&ring->bc_tbl); in iwx_free_tx_ring()
2277 struct iwx_tx_data *data = &ring->data[i]; in iwx_free_tx_ring()
2279 if (data->m != NULL) { in iwx_free_tx_ring()
2280 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_free_tx_ring()
2282 bus_dmamap_unload(ring->data_dmat, data->map); in iwx_free_tx_ring()
2283 m_freem(data->m); in iwx_free_tx_ring()
2284 data->m = NULL; in iwx_free_tx_ring()
2286 if (data->map != NULL) { in iwx_free_tx_ring()
2287 bus_dmamap_destroy(ring->data_dmat, data->map); in iwx_free_tx_ring()
2288 data->map = NULL; in iwx_free_tx_ring()
2291 if (ring->data_dmat != NULL) { in iwx_free_tx_ring()
2292 bus_dma_tag_destroy(ring->data_dmat); in iwx_free_tx_ring()
2293 ring->data_dmat = NULL; in iwx_free_tx_ring()
2300 if (!sc->sc_msix) { in iwx_enable_rfkill_int()
2301 sc->sc_intmask = IWX_CSR_INT_BIT_RF_KILL; in iwx_enable_rfkill_int()
2302 IWX_WRITE(sc, IWX_CSR_INT_MASK, sc->sc_intmask); in iwx_enable_rfkill_int()
2305 sc->sc_fh_init_mask); in iwx_enable_rfkill_int()
2308 sc->sc_hw_mask = IWX_MSIX_HW_INT_CAUSES_REG_RF_KILL; in iwx_enable_rfkill_int()
2324 * Indicates state of (platform's) hardware RF-Kill switch in iwx_check_rfkill()
2331 sc->sc_flags |= IWX_FLAG_RFKILL; in iwx_check_rfkill()
2333 sc->sc_flags &= ~IWX_FLAG_RFKILL; in iwx_check_rfkill()
2342 if (!sc->sc_msix) { in iwx_enable_interrupts()
2343 sc->sc_intmask = IWX_CSR_INI_SET_MASK; in iwx_enable_interrupts()
2344 IWX_WRITE(sc, IWX_CSR_INT_MASK, sc->sc_intmask); in iwx_enable_interrupts()
2350 sc->sc_hw_mask = sc->sc_hw_init_mask; in iwx_enable_interrupts()
2351 sc->sc_fh_mask = sc->sc_fh_init_mask; in iwx_enable_interrupts()
2353 ~sc->sc_fh_mask); in iwx_enable_interrupts()
2355 ~sc->sc_hw_mask); in iwx_enable_interrupts()
2362 if (!sc->sc_msix) { in iwx_enable_fwload_interrupt()
2363 sc->sc_intmask = IWX_CSR_INT_BIT_ALIVE | IWX_CSR_INT_BIT_FH_RX; in iwx_enable_fwload_interrupt()
2364 IWX_WRITE(sc, IWX_CSR_INT_MASK, sc->sc_intmask); in iwx_enable_fwload_interrupt()
2368 sc->sc_hw_mask = IWX_MSIX_HW_INT_CAUSES_REG_ALIVE; in iwx_enable_fwload_interrupt()
2374 ~sc->sc_fh_init_mask); in iwx_enable_fwload_interrupt()
2375 sc->sc_fh_mask = sc->sc_fh_init_mask; in iwx_enable_fwload_interrupt()
2383 IWX_WRITE(sc, IWX_CSR_INT_MASK, sc->sc_intmask);
2390 if (!sc->sc_msix) { in iwx_disable_interrupts()
2398 sc->sc_fh_init_mask); in iwx_disable_interrupts()
2400 sc->sc_hw_init_mask); in iwx_disable_interrupts()
2409 memset(sc->ict_dma.vaddr, 0, IWX_ICT_SIZE); in iwx_ict_reset()
2410 sc->ict_cur = 0; in iwx_ict_reset()
2417 | sc->ict_dma.paddr >> IWX_ICT_PADDR_SHIFT); in iwx_ict_reset()
2420 sc->sc_flags |= IWX_FLAG_USE_ICT; in iwx_ict_reset()
2513 error = pci_find_cap(sc->sc_dev, PCIY_EXPRESS, &pcie_ptr); in iwx_apm_config()
2519 lctl = pci_read_config(sc->sc_dev, pcie_ptr + PCIER_LINK_CTL, in iwx_apm_config()
2522 sc->sc_pm_support = !(lctl & PCI_PCIE_LCSR_ASPM_L0S); in iwx_apm_config()
2524 cap = pci_read_config(sc->sc_dev, pcie_ptr + PCI_PCIE_DCSR2, in iwx_apm_config()
2527 sc->sc_ltr_enabled = (cap & PCI_PCIE_DCSR2_LTREN) ? 1 : 0; in iwx_apm_config()
2529 DPRINTF(("%s: L1 %sabled - LTR %sabled\n", in iwx_apm_config()
2531 (lctl & PCI_PCIE_LCSR_ASPM_L1) ? "En" : "Dis", in iwx_apm_config()
2532 sc->sc_ltr_enabled ? "En" : "Dis")); in iwx_apm_config()
2561 * wake device's PCI Express link L1a -> L0s in iwx_apm_init()
2570 * D0U* --> D0A* (powered-up active) state. in iwx_apm_init()
2576 * device-internal resources is supported, e.g. iwx_write_prph() in iwx_apm_init()
2606 /* stop device's busmaster DMA activity */ in iwx_apm_stop()
2616 * D0A* (powered-up Active) --> D0U* (Uninitialized) state. in iwx_apm_stop()
2627 if (!sc->sc_msix) in iwx_init_msix_hw()
2630 sc->sc_fh_init_mask = ~IWX_READ(sc, IWX_CSR_MSIX_FH_INT_MASK_AD); in iwx_init_msix_hw()
2631 sc->sc_fh_mask = sc->sc_fh_init_mask; in iwx_init_msix_hw()
2632 sc->sc_hw_init_mask = ~IWX_READ(sc, IWX_CSR_MSIX_HW_INT_MASK_AD); in iwx_init_msix_hw()
2633 sc->sc_hw_mask = sc->sc_hw_init_mask; in iwx_init_msix_hw()
2641 if (!sc->sc_msix) { in iwx_conf_msix_hw()
2661 /* Map fallback-queue (command/mgmt) to a single vector */ in iwx_conf_msix_hw()
2672 /* Map non-RX causes to the same vector */ in iwx_conf_msix_hw()
2704 /* Enable non-RX causes interrupts */ in iwx_conf_msix_hw()
2753 if (sc->sc_device_family == IWX_DEVICE_FAMILY_22000) { in iwx_start_hw()
2763 if (sc->sc_device_family == IWX_DEVICE_FAMILY_22000 && in iwx_start_hw()
2764 sc->sc_integrated) { in iwx_start_hw()
2803 sc->sc_flags &= ~IWX_FLAG_USE_ICT; in iwx_stop_device()
2806 iwx_reset_rx_ring(sc, &sc->rxq); in iwx_stop_device()
2807 for (i = 0; i < nitems(sc->txq); i++) in iwx_stop_device()
2808 iwx_reset_tx_ring(sc, &sc->txq[i]); in iwx_stop_device()
2810 /* XXX-THJ: Tidy up BA state on stop */ in iwx_stop_device()
2812 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[i]; in iwx_stop_device()
2813 if (ba->ba_state != IEEE80211_BA_AGREED) in iwx_stop_device()
2821 if (sc->sc_nic_locks > 0) in iwx_stop_device()
2823 DEVNAME(sc), sc->sc_nic_locks); in iwx_stop_device()
2824 sc->sc_nic_locks = 0; in iwx_stop_device()
2829 /* Reset the on-board processor. */ in iwx_stop_device()
2834 * Upon stop, the IVAR table gets erased, so msi-x won't in iwx_stop_device()
2835 * work. This causes a bug in RF-KILL flows, since the interrupt in iwx_stop_device()
2855 iwx_dma_contig_free(&sc->pnvm_dma); in iwx_stop_device()
2864 radio_cfg_type = (sc->sc_fw_phy_config & IWX_FW_PHY_CFG_RADIO_TYPE) >> in iwx_nic_config()
2866 radio_cfg_step = (sc->sc_fw_phy_config & IWX_FW_PHY_CFG_RADIO_STEP) >> in iwx_nic_config()
2868 radio_cfg_dash = (sc->sc_fw_phy_config & IWX_FW_PHY_CFG_RADIO_DASH) >> in iwx_nic_config()
2871 reg_val |= IWX_CSR_HW_REV_STEP(sc->sc_hw_rev) << in iwx_nic_config()
2873 reg_val |= IWX_CSR_HW_REV_DASH(sc->sc_hw_rev) << in iwx_nic_config()
2913 if (sc->sc_device_family < IWX_DEVICE_FAMILY_AX210) in iwx_nic_init()
2945 struct iwx_tx_ring *ring = &sc->txq[qid]; in iwx_enable_txq()
2962 cmd_v0.byte_cnt_addr = htole64(ring->bc_tbl.paddr); in iwx_enable_txq()
2963 cmd_v0.tfdq_addr = htole64(ring->desc_dma.paddr); in iwx_enable_txq()
2970 cmd_v3.u.add.tfdq_dram_addr = htole64(ring->desc_dma.paddr); in iwx_enable_txq()
2971 cmd_v3.u.add.bc_dram_addr = htole64(ring->bc_tbl.paddr); in iwx_enable_txq()
2991 if (!pkt || (pkt->hdr.flags & IWX_CMD_FAILED_MSK)) { in iwx_enable_txq()
3002 resp = (void *)pkt->data; in iwx_enable_txq()
3003 fwqid = le16toh(resp->queue_number); in iwx_enable_txq()
3004 wr_idx = le16toh(resp->write_pointer); in iwx_enable_txq()
3013 if (wr_idx != ring->cur_hw) { in iwx_enable_txq()
3014 DPRINTF(("%s: === (wr_idx != ring->cur_hw)\n", __func__)); in iwx_enable_txq()
3019 sc->qenablemsk |= (1 << qid); in iwx_enable_txq()
3020 ring->tid = tid; in iwx_enable_txq()
3037 struct iwx_tx_ring *ring = &sc->txq[qid]; in iwx_disable_txq()
3073 if (!pkt || (pkt->hdr.flags & IWX_CMD_FAILED_MSK)) { in iwx_disable_txq()
3078 sc->qenablemsk &= ~(1 << qid); in iwx_disable_txq()
3094 sc->sc_rate_n_flags_version = 2; in iwx_post_alive()
3096 sc->sc_rate_n_flags_version = 1; in iwx_post_alive()
3107 .id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id, in iwx_schedule_session_protection()
3108 in->in_color)), in iwx_schedule_session_protection()
3119 sc->sc_flags |= IWX_FLAG_TE_ACTIVE; in iwx_schedule_session_protection()
3127 .id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id, in iwx_unprotect_session()
3128 in->in_color)), in iwx_unprotect_session()
3136 if ((sc->sc_flags & IWX_FLAG_TE_ACTIVE) == 0) in iwx_unprotect_session()
3141 sc->sc_flags &= ~IWX_FLAG_TE_ACTIVE; in iwx_unprotect_session()
3154 tx_ant = ((sc->sc_fw_phy_config & IWX_FW_PHY_CFG_TX_CHAIN) in iwx_fw_valid_tx_ant()
3157 if (sc->sc_nvm.valid_tx_ant) in iwx_fw_valid_tx_ant()
3158 tx_ant &= sc->sc_nvm.valid_tx_ant; in iwx_fw_valid_tx_ant()
3168 rx_ant = ((sc->sc_fw_phy_config & IWX_FW_PHY_CFG_RX_CHAIN) in iwx_fw_valid_rx_ant()
3171 if (sc->sc_nvm.valid_rx_ant) in iwx_fw_valid_rx_ant()
3172 rx_ant &= sc->sc_nvm.valid_rx_ant; in iwx_fw_valid_rx_ant()
3181 struct iwx_softc *sc = ic->ic_softc; in iwx_init_channel_map()
3182 struct iwx_nvm_data *data = &sc->sc_nvm; in iwx_init_channel_map()
3188 if (sc->sc_uhb_supported) { in iwx_init_channel_map()
3196 /* 2.4Ghz; 1-13: 11b/g channels. */ in iwx_init_channel_map()
3197 if (!data->sku_cap_band_24GHz_enable) in iwx_init_channel_map()
3211 if (sc->sc_rsp_vers == IWX_FBSD_RSP_V4) { in iwx_init_channel_map()
3213 sc->sc_rsp_info.rsp_v4.regulatory.channel_profile + ch_idx); in iwx_init_channel_map()
3216 sc->sc_rsp_info.rsp_v3.regulatory.channel_profile + ch_idx); in iwx_init_channel_map()
3224 /* XXX-BZ nflags RADAR/DFS/INDOOR */ in iwx_init_channel_map()
3235 if (!data->sku_cap_band_52GHz_enable) in iwx_init_channel_map()
3250 if (sc->sc_rsp_vers == IWX_FBSD_RSP_V4) in iwx_init_channel_map()
3252 sc->sc_rsp_info.rsp_v4.regulatory.channel_profile + ch_idx); in iwx_init_channel_map()
3255 sc->sc_rsp_info.rsp_v3.regulatory.channel_profile + ch_idx); in iwx_init_channel_map()
3267 /* XXX-BZ nflags RADAR/DFS/INDOOR */ in iwx_init_channel_map()
3284 return !sc->sc_nvm.sku_cap_mimo_disable; in iwx_mimo_enabled()
3291 reorder_buf->head_sn = ssn; in iwx_init_reorder_buffer()
3292 reorder_buf->num_stored = 0; in iwx_init_reorder_buffer()
3293 reorder_buf->buf_size = buf_size; in iwx_init_reorder_buffer()
3294 reorder_buf->last_amsdu = 0; in iwx_init_reorder_buffer()
3295 reorder_buf->last_sub_index = 0; in iwx_init_reorder_buffer()
3296 reorder_buf->removed = 0; in iwx_init_reorder_buffer()
3297 reorder_buf->valid = 0; in iwx_init_reorder_buffer()
3298 reorder_buf->consec_oldsn_drops = 0; in iwx_init_reorder_buffer()
3299 reorder_buf->consec_oldsn_ampdu_gp2 = 0; in iwx_init_reorder_buffer()
3300 reorder_buf->consec_oldsn_prev_drop = 0; in iwx_init_reorder_buffer()
3306 struct iwx_reorder_buffer *reorder_buf = &rxba->reorder_buf; in iwx_clear_reorder_buffer()
3308 reorder_buf->removed = 1; in iwx_clear_reorder_buffer()
3309 rxba->baid = IWX_RX_REORDER_DATA_INVALID_BAID; in iwx_clear_reorder_buffer()
3319 for (i = 0; i < nitems(sc->sc_rxba_data); i++) { in iwx_find_rxba_data()
3320 if (sc->sc_rxba_data[i].baid == in iwx_find_rxba_data()
3323 if (sc->sc_rxba_data[i].tid == tid) in iwx_find_rxba_data()
3324 return &sc->sc_rxba_data[i]; in iwx_find_rxba_data()
3355 *baid = rxba->baid; in iwx_sta_rx_agg_baid_cfg_cmd()
3360 cmd.remove_v1.baid = rxba->baid; in iwx_sta_rx_agg_baid_cfg_cmd()
3373 if (new_baid >= nitems(sc->sc_rxba_data)) in iwx_sta_rx_agg_baid_cfg_cmd()
3389 if (start && sc->sc_rx_ba_sessions >= IWX_MAX_RX_BA_SESSIONS) { in iwx_sta_rx_agg()
3393 if (isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_BAID_ML_SUPPORT)) { in iwx_sta_rx_agg()
3405 rxba = &sc->sc_rxba_data[baid]; in iwx_sta_rx_agg()
3409 if (rxba->baid != IWX_RX_REORDER_DATA_INVALID_BAID) { in iwx_sta_rx_agg()
3412 rxba->sta_id = IWX_STATION_ID; in iwx_sta_rx_agg()
3413 rxba->tid = tid; in iwx_sta_rx_agg()
3414 rxba->baid = baid; in iwx_sta_rx_agg()
3415 rxba->timeout = timeout_val; in iwx_sta_rx_agg()
3416 getmicrouptime(&rxba->last_rx); in iwx_sta_rx_agg()
3417 iwx_init_reorder_buffer(&rxba->reorder_buf, ssn, in iwx_sta_rx_agg()
3427 sc->sc_rx_ba_sessions++; in iwx_sta_rx_agg()
3428 } else if (sc->sc_rx_ba_sessions > 0) in iwx_sta_rx_agg()
3429 sc->sc_rx_ba_sessions--; in iwx_sta_rx_agg()
3438 qid = sc->aggqid[tid]; in iwx_sta_tx_agg_start()
3441 qid = fls(sc->qenablemsk); in iwx_sta_tx_agg_start()
3450 if ((sc->qenablemsk & (1 << qid)) == 0) { in iwx_sta_tx_agg_start()
3463 ni->ni_tx_ampdu[tid].txa_flags = IEEE80211_AGGR_RUNNING; in iwx_sta_tx_agg_start()
3464 DPRINTF(("%s: will set sc->aggqid[%i]=%i\n", __func__, tid, qid)); in iwx_sta_tx_agg_start()
3465 sc->aggqid[tid] = qid; in iwx_sta_tx_agg_start()
3472 struct ieee80211com *ic = &sc->sc_ic; in iwx_ba_rx_task()
3473 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_ba_rx_task()
3474 struct ieee80211_node *ni = vap->iv_bss; in iwx_ba_rx_task()
3479 if (sc->sc_flags & IWX_FLAG_SHUTDOWN) in iwx_ba_rx_task()
3481 if (sc->ba_rx.start_tidmask & (1 << tid)) { in iwx_ba_rx_task()
3482 struct iwx_rx_ba *ba = &sc->ni_rx_ba[tid]; in iwx_ba_rx_task()
3483 DPRINTF(("%s: ba->ba_flags=%x\n", __func__, in iwx_ba_rx_task()
3484 ba->ba_flags)); in iwx_ba_rx_task()
3485 if (ba->ba_flags == IWX_BA_DONE) { in iwx_ba_rx_task()
3493 iwx_sta_rx_agg(sc, ni, tid, ba->ba_winstart, in iwx_ba_rx_task()
3494 ba->ba_winsize, ba->ba_timeout_val, 1); in iwx_ba_rx_task()
3495 sc->ba_rx.start_tidmask &= ~(1 << tid); in iwx_ba_rx_task()
3496 ba->ba_flags = IWX_BA_DONE; in iwx_ba_rx_task()
3497 } else if (sc->ba_rx.stop_tidmask & (1 << tid)) { in iwx_ba_rx_task()
3499 sc->ba_rx.stop_tidmask &= ~(1 << tid); in iwx_ba_rx_task()
3509 struct ieee80211com *ic = &sc->sc_ic; in iwx_ba_tx_task()
3510 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_ba_tx_task()
3511 struct ieee80211_node *ni = vap->iv_bss; in iwx_ba_tx_task()
3516 if (sc->sc_flags & IWX_FLAG_SHUTDOWN) in iwx_ba_tx_task()
3518 if (sc->ba_tx.start_tidmask & (1 << tid)) { in iwx_ba_tx_task()
3522 sc->ba_tx.start_tidmask &= ~(1 << tid); in iwx_ba_tx_task()
3523 sc->sc_flags |= IWX_FLAG_AMPDUTX; in iwx_ba_tx_task()
3535 memset(data->hw_addr, 0, sizeof(data->hw_addr)); in iwx_set_mac_addr_from_csr()
3543 iwx_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); in iwx_set_mac_addr_from_csr()
3546 if (iwx_is_valid_mac_addr(data->hw_addr)) { in iwx_set_mac_addr_from_csr()
3554 iwx_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr); in iwx_set_mac_addr_from_csr()
3592 struct iwx_nvm_data *nvm = &sc->sc_nvm; in iwx_nvm_get()
3610 int v4 = isset(sc->sc_ucode_api, IWX_UCODE_TLV_API_REGULATORY_NVM_INFO); in iwx_nvm_get()
3631 if (!iwx_is_valid_mac_addr(nvm->hw_addr)) { in iwx_nvm_get()
3637 rsp = (void *)hcmd.resp_pkt->data; in iwx_nvm_get()
3640 nvm->nvm_version = le16toh(rsp->general.nvm_version); in iwx_nvm_get()
3641 nvm->n_hw_addrs = rsp->general.n_hw_addrs; in iwx_nvm_get()
3644 mac_flags = le32toh(rsp->mac_sku.mac_sku_flags); in iwx_nvm_get()
3645 nvm->sku_cap_11ac_enable = in iwx_nvm_get()
3647 nvm->sku_cap_11n_enable = in iwx_nvm_get()
3649 nvm->sku_cap_11ax_enable = in iwx_nvm_get()
3651 nvm->sku_cap_band_24GHz_enable = in iwx_nvm_get()
3653 nvm->sku_cap_band_52GHz_enable = in iwx_nvm_get()
3655 nvm->sku_cap_mimo_disable = in iwx_nvm_get()
3659 nvm->valid_tx_ant = (uint8_t)le32toh(rsp->phy_sku.tx_chains); in iwx_nvm_get()
3660 nvm->valid_rx_ant = (uint8_t)le32toh(rsp->phy_sku.rx_chains); in iwx_nvm_get()
3662 if (le32toh(rsp->regulatory.lar_enabled) && in iwx_nvm_get()
3663 isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_LAR_SUPPORT)) { in iwx_nvm_get()
3664 nvm->lar_enabled = 1; in iwx_nvm_get()
3667 memcpy(&sc->sc_rsp_info, rsp, resp_len); in iwx_nvm_get()
3669 sc->sc_rsp_vers = IWX_FBSD_RSP_V4; in iwx_nvm_get()
3671 sc->sc_rsp_vers = IWX_FBSD_RSP_V3; in iwx_nvm_get()
3686 sc->sc_uc.uc_intr = 0; in iwx_load_firmware()
3687 sc->sc_uc.uc_ok = 0; in iwx_load_firmware()
3689 fws = &sc->sc_fw.fw_sects[IWX_UCODE_TYPE_REGULAR]; in iwx_load_firmware()
3690 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_load_firmware()
3700 err = msleep(&sc->sc_uc, &sc->sc_mtx, 0, "iwxuc", hz); in iwx_load_firmware()
3701 if (err || !sc->sc_uc.uc_ok) { in iwx_load_firmware()
3706 iwx_dma_contig_free(&sc->iml_dma); in iwx_load_firmware()
3709 if (!sc->sc_uc.uc_ok) in iwx_load_firmware()
3758 len -= sizeof(*tlv); in iwx_pnvm_handle_section()
3761 tlv_len = le32toh(tlv->length); in iwx_pnvm_handle_section()
3762 tlv_type = le32toh(tlv->type); in iwx_pnvm_handle_section()
3791 if (mac_type == IWX_CSR_HW_REV_TYPE(sc->sc_hw_rev) && in iwx_pnvm_handle_section()
3792 rf_id == IWX_CSR_HW_RFID_TYPE(sc->sc_hw_rf_id)) in iwx_pnvm_handle_section()
3800 data_len = tlv_len - sizeof(*section); in iwx_pnvm_handle_section()
3814 memcpy(tmp + size, section->data, data_len); in iwx_pnvm_handle_section()
3829 len -= roundup(tlv_len, 4); in iwx_pnvm_handle_section()
3838 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->pnvm_dma, size, 1); in iwx_pnvm_handle_section()
3840 printf("%s: could not allocate DMA memory for PNVM\n", in iwx_pnvm_handle_section()
3845 memcpy(sc->pnvm_dma.vaddr, pnvm_data, size); in iwx_pnvm_handle_section()
3847 sc->sc_pnvm_ver = sha1; in iwx_pnvm_handle_section()
3861 len -= sizeof(*tlv); in iwx_pnvm_parse()
3864 tlv_len = le32toh(tlv->length); in iwx_pnvm_parse()
3865 tlv_type = le32toh(tlv->type); in iwx_pnvm_parse()
3875 len -= roundup(tlv_len, 4); in iwx_pnvm_parse()
3877 if (sc->sc_sku_id[0] == le32toh(sku_id->data[0]) && in iwx_pnvm_parse()
3878 sc->sc_sku_id[1] == le32toh(sku_id->data[1]) && in iwx_pnvm_parse()
3879 sc->sc_sku_id[2] == le32toh(sku_id->data[2]) && in iwx_pnvm_parse()
3884 len -= roundup(tlv_len, 4); in iwx_pnvm_parse()
3891 /* Make AX210 firmware loading context point at PNVM image in DMA memory. */
3898 prph_scratch = sc->prph_scratch_dma.vaddr; in iwx_ctxt_info_gen3_set_pnvm()
3899 prph_sc_ctrl = &prph_scratch->ctrl_cfg; in iwx_ctxt_info_gen3_set_pnvm()
3901 prph_sc_ctrl->pnvm_cfg.pnvm_base_addr = htole64(sc->pnvm_dma.paddr); in iwx_ctxt_info_gen3_set_pnvm()
3902 prph_sc_ctrl->pnvm_cfg.pnvm_size = htole32(sc->pnvm_dma.size); in iwx_ctxt_info_gen3_set_pnvm()
3904 bus_dmamap_sync(sc->sc_dmat, sc->pnvm_dma.map, BUS_DMASYNC_PREWRITE); in iwx_ctxt_info_gen3_set_pnvm()
3908 * Load platform-NVM (non-volatile-memory) data from the filesystem.
3912 * Pre-AX210 devices store NVM data onboard.
3921 if (sc->sc_sku_id[0] == 0 && in iwx_load_pnvm()
3922 sc->sc_sku_id[1] == 0 && in iwx_load_pnvm()
3923 sc->sc_sku_id[2] == 0) in iwx_load_pnvm()
3926 if (sc->sc_pnvm_name) { in iwx_load_pnvm()
3927 if (sc->pnvm_dma.vaddr == NULL) { in iwx_load_pnvm()
3929 pnvm = firmware_get(sc->sc_pnvm_name); in iwx_load_pnvm()
3932 DEVNAME(sc), sc->sc_pnvm_name, err); in iwx_load_pnvm()
3936 sc->sc_pnvm = pnvm; in iwx_load_pnvm()
3938 err = iwx_pnvm_parse(sc, pnvm->data, pnvm->datasize); in iwx_load_pnvm()
3960 while ((sc->sc_init_complete & wait_flags) != wait_flags) { in iwx_load_pnvm()
3961 err = msleep(&sc->sc_init_complete, &sc->sc_mtx, 0, "iwxinit", 2 * hz); in iwx_load_pnvm()
3987 phy_cfg_cmd.phy_cfg = htole32(sc->sc_fw_phy_config); in iwx_send_phy_cfg_cmd()
3989 sc->sc_default_calib[IWX_UCODE_TYPE_REGULAR].event_trigger; in iwx_send_phy_cfg_cmd()
3991 sc->sc_default_calib[IWX_UCODE_TYPE_REGULAR].flow_trigger; in iwx_send_phy_cfg_cmd()
4024 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_load_ucode_wait_alive()
4046 if ((sc->sc_flags & IWX_FLAG_RFKILL) && !readnvm) { in iwx_run_init_mvm_ucode()
4052 sc->sc_init_complete = 0; in iwx_run_init_mvm_ucode()
4082 while ((sc->sc_init_complete & wait_flags) != wait_flags) { in iwx_run_init_mvm_ucode()
4083 err = msleep(&sc->sc_init_complete, &sc->sc_mtx, 0, "iwxinit", 2 * hz); in iwx_run_init_mvm_ucode()
4103 IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, sc->sc_nvm.hw_addr); in iwx_run_init_mvm_ucode()
4115 if (!sc->sc_ltr_enabled) in iwx_config_ltr()
4125 struct iwx_rx_data *data = &ring->data[idx]; in iwx_update_rx_desc()
4127 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_update_rx_desc()
4128 struct iwx_rx_transfer_desc *desc = ring->desc; in iwx_update_rx_desc()
4131 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_update_rx_desc()
4134 ((uint64_t *)ring->desc)[idx] = in iwx_update_rx_desc()
4136 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_update_rx_desc()
4144 struct iwx_rx_ring *ring = &sc->rxq; in iwx_rx_addbuf()
4145 struct iwx_rx_data *data = &ring->data[idx]; in iwx_rx_addbuf()
4156 if (data->m != NULL) { in iwx_rx_addbuf()
4157 bus_dmamap_unload(ring->data_dmat, data->map); in iwx_rx_addbuf()
4161 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; in iwx_rx_addbuf()
4162 err = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, &seg, in iwx_rx_addbuf()
4171 data->m = m; in iwx_rx_addbuf()
4172 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD); in iwx_rx_addbuf()
4185 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_rxmq_get_signal_strength()
4186 energy_a = desc->v3.energy_a; in iwx_rxmq_get_signal_strength()
4187 energy_b = desc->v3.energy_b; in iwx_rxmq_get_signal_strength()
4189 energy_a = desc->v1.energy_a; in iwx_rxmq_get_signal_strength()
4190 energy_b = desc->v1.energy_b; in iwx_rxmq_get_signal_strength()
4192 energy_a = energy_a ? -energy_a : -256; in iwx_rxmq_get_signal_strength()
4193 energy_b = energy_b ? -energy_b : -256; in iwx_rxmq_get_signal_strength()
4202 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_rxmq_get_chains()
4203 return ((desc->v3.rate_n_flags & IWX_RATE_MCS_ANT_AB_MSK) >> in iwx_rxmq_get_chains()
4206 return ((desc->v1.rate_n_flags & IWX_RATE_MCS_ANT_AB_MSK) >> in iwx_rxmq_get_chains()
4214 struct iwx_rx_phy_info *phy_info = (void *)pkt->data; in iwx_rx_rx_phy_cmd()
4215 struct iwx_cmd_header *cmd_hdr = &pkt->hdr; in iwx_rx_rx_phy_cmd()
4216 int qid = cmd_hdr->qid; in iwx_rx_rx_phy_cmd()
4217 struct iwx_tx_ring *ring = &sc->txq[qid]; in iwx_rx_rx_phy_cmd()
4219 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREREAD); in iwx_rx_rx_phy_cmd()
4220 memcpy(&sc->sc_last_phy_info, phy_info, sizeof(sc->sc_last_phy_info)); in iwx_rx_rx_phy_cmd()
4233 noise = le32toh(stats->beacon_silence_rssi[i]) & 0xff; in iwx_get_noise()
4241 return (nbant == 0) ? -127 : (total / nbant) - 107; in iwx_get_noise()
4249 struct ieee80211com *ic = &sc->sc_ic;
4263 if (k == NULL || k->k_cipher != IEEE80211_CIPHER_CCMP)
4272 prsc = &k->k_rsc[tid];
4274 /* Extract the 48-bit PN from the CCMP header. */
4281 if (rxi->rxi_flags & IEEE80211_RXI_HWDEC_SAME_PN) {
4283 ic->ic_stats.is_ccmp_replays++;
4287 ic->ic_stats.is_ccmp_replays++;
4313 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwx_rx_hwdecrypt()
4318 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; in iwx_rx_hwdecrypt()
4324 if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != in iwx_rx_hwdecrypt()
4326 && (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)) { in iwx_rx_hwdecrypt()
4353 struct ieee80211com *ic = &sc->sc_ic; in iwx_rx_frame()
4354 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_rx_frame()
4362 if (chanidx < 0 || chanidx >= nitems(ic->ic_channels)) { in iwx_rx_frame()
4372 for (int i = 0; i < ic->ic_nchans; i++) { in iwx_rx_frame()
4373 if (ic->ic_channels[i].ic_ieee == channel) { in iwx_rx_frame()
4377 ic->ic_curchan = &ic->ic_channels[chanidx]; in iwx_rx_frame()
4383 if ((rxi->rxi_flags & IEEE80211_RXI_HWDEC) && in iwx_rx_frame()
4391 struct iwx_rx_radiotap_header *tap = &sc->sc_rxtap; in iwx_rx_frame()
4396 tap->wr_flags = 0; in iwx_rx_frame()
4398 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; in iwx_rx_frame()
4399 tap->wr_chan_freq = in iwx_rx_frame()
4400 htole16(ic->ic_channels[chanidx].ic_freq); in iwx_rx_frame()
4401 chan_flags = ic->ic_channels[chanidx].ic_flags; in iwx_rx_frame()
4403 if (ic->ic_curmode != IEEE80211_MODE_11N && in iwx_rx_frame()
4404 ic->ic_curmode != IEEE80211_MODE_11AC) { in iwx_rx_frame()
4408 if (ic->ic_curmode != IEEE80211_MODE_11AC) in iwx_rx_frame()
4413 tap->wr_chan_flags = htole16(chan_flags); in iwx_rx_frame()
4414 tap->wr_dbm_antsignal = rssi; in iwx_rx_frame()
4415 tap->wr_dbm_antnoise = (int8_t)sc->sc_noise; in iwx_rx_frame()
4416 tap->wr_tsft = device_timestamp; in iwx_rx_frame()
4418 if (sc->sc_rate_n_flags_version >= 2) { in iwx_rx_frame()
4431 if (rs && ridx < rs->rs_nrates) { in iwx_rx_frame()
4432 rate = (rs->rs_rates[ridx] & in iwx_rx_frame()
4446 tap->wr_rate = (0x80 | mcs); in iwx_rx_frame()
4450 case 10: tap->wr_rate = 2; break; in iwx_rx_frame()
4451 case 20: tap->wr_rate = 4; break; in iwx_rx_frame()
4452 case 55: tap->wr_rate = 11; break; in iwx_rx_frame()
4453 case 110: tap->wr_rate = 22; break; in iwx_rx_frame()
4455 case 0xd: tap->wr_rate = 12; break; in iwx_rx_frame()
4456 case 0xf: tap->wr_rate = 18; break; in iwx_rx_frame()
4457 case 0x5: tap->wr_rate = 24; break; in iwx_rx_frame()
4458 case 0x7: tap->wr_rate = 36; break; in iwx_rx_frame()
4459 case 0x9: tap->wr_rate = 48; break; in iwx_rx_frame()
4460 case 0xb: tap->wr_rate = 72; break; in iwx_rx_frame()
4461 case 0x1: tap->wr_rate = 96; break; in iwx_rx_frame()
4462 case 0x3: tap->wr_rate = 108; break; in iwx_rx_frame()
4464 default: tap->wr_rate = 0; in iwx_rx_frame()
4466 // XXX hack - this needs rebased with the new rate stuff anyway in iwx_rx_frame()
4467 tap->wr_rate = rate; in iwx_rx_frame()
4473 if (ieee80211_input_mimo_all(ic, m) == -1) in iwx_rx_frame()
4474 printf("%s:%d input_all returned -1\n", __func__, __LINE__); in iwx_rx_frame()
4477 if (ieee80211_input_mimo(ni, m) == -1) in iwx_rx_frame()
4478 printf("%s:%d input_all returned -1\n", __func__, __LINE__); in iwx_rx_frame()
4488 struct ieee80211com *ic = &sc->sc_ic; in iwx_rx_mpdu_mq()
4489 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_rx_mpdu_mq()
4490 struct ieee80211_node *ni = vap->iv_bss; in iwx_rx_mpdu_mq()
4501 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) in iwx_rx_mpdu_mq()
4513 if (!(desc->status & htole16(IWX_RX_MPDU_RES_STATUS_CRC_OK)) || in iwx_rx_mpdu_mq()
4514 !(desc->status & htole16(IWX_RX_MPDU_RES_STATUS_OVERRUN_OK))) { in iwx_rx_mpdu_mq()
4515 printf("%s: Bad CRC or FIFO: 0x%08X\n", __func__, desc->status); in iwx_rx_mpdu_mq()
4520 len = le16toh(desc->mpdu_len); in iwx_rx_mpdu_mq()
4521 if (ic->ic_opmode == IEEE80211_M_MONITOR) { in iwx_rx_mpdu_mq()
4532 if (len > maxlen - desc_size) { in iwx_rx_mpdu_mq()
4538 m->m_data = (char *)pktdata + desc_size; in iwx_rx_mpdu_mq()
4539 m->m_pkthdr.len = m->m_len = len; in iwx_rx_mpdu_mq()
4542 if (desc->mac_flags2 & IWX_RX_MPDU_MFLG2_PAD) { in iwx_rx_mpdu_mq()
4544 int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwx_rx_mpdu_mq()
4546 switch (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) { in iwx_rx_mpdu_mq()
4560 if ((le16toh(desc->status) & in iwx_rx_mpdu_mq()
4567 memmove(m->m_data + 2, m->m_data, hdrlen); in iwx_rx_mpdu_mq()
4572 if ((le16toh(desc->status) & in iwx_rx_mpdu_mq()
4579 // * Hardware de-aggregates A-MSDUs and copies the same MAC header in iwx_rx_mpdu_mq()
4580 // * in place for each subframe. But it leaves the 'A-MSDU present' in iwx_rx_mpdu_mq()
4591 if (desc->mac_flags2 & IWX_RX_MPDU_MFLG2_AMSDU) { in iwx_rx_mpdu_mq()
4594 // uint8_t subframe_idx = (desc->amsdu_info & in iwx_rx_mpdu_mq()
4599 // m->m_len >= sizeof(struct ieee80211_qosframe_addr4)) { in iwx_rx_mpdu_mq()
4602 // qwh4->i_qos[0] &= htole16(~IEEE80211_QOS_AMSDU); in iwx_rx_mpdu_mq()
4604 // m->m_len >= sizeof(struct ieee80211_qosframe)) { in iwx_rx_mpdu_mq()
4607 // qwh->i_qos[0] &= htole16(~IEEE80211_QOS_AMSDU); in iwx_rx_mpdu_mq()
4618 (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) && in iwx_rx_mpdu_mq()
4619 iwx_rx_hwdecrypt(sc, m, le16toh(desc->status)/*, &rxi*/)) { in iwx_rx_mpdu_mq()
4625 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_rx_mpdu_mq()
4626 rate_n_flags = le32toh(desc->v3.rate_n_flags); in iwx_rx_mpdu_mq()
4627 chanidx = desc->v3.channel; in iwx_rx_mpdu_mq()
4628 device_timestamp = le32toh(desc->v3.gp2_on_air_rise); in iwx_rx_mpdu_mq()
4630 rate_n_flags = le32toh(desc->v1.rate_n_flags); in iwx_rx_mpdu_mq()
4631 chanidx = desc->v1.channel; in iwx_rx_mpdu_mq()
4632 device_timestamp = le32toh(desc->v1.gp2_on_air_rise); in iwx_rx_mpdu_mq()
4635 phy_info = le16toh(desc->phy_info); in iwx_rx_mpdu_mq()
4638 rssi = (0 - IWX_MIN_DBM) + rssi; /* normalize */ in iwx_rx_mpdu_mq()
4639 rssi = MIN(rssi, (IWX_MAX_DBM - IWX_MIN_DBM)); /* clip to max. 100% */ in iwx_rx_mpdu_mq()
4658 rxs.c_nf = sc->sc_noise; in iwx_rx_mpdu_mq()
4683 memmove(m->m_data + TRIM, m->m_data, hdrlen); in iwx_rx_mpdu_mq()
4688 iwx_rx_frame(sc, m, chanidx, le16toh(desc->status), in iwx_rx_mpdu_mq()
4696 struct iwx_tfh_tfd *desc = &ring->desc[idx]; in iwx_clear_tx_desc()
4697 uint8_t num_tbs = le16toh(desc->num_tbs) & 0x1f; in iwx_clear_tx_desc()
4700 /* First TB is never cleared - it is bidirectional DMA data. */ in iwx_clear_tx_desc()
4702 struct iwx_tfh_tb *tb = &desc->tbs[i]; in iwx_clear_tx_desc()
4705 desc->num_tbs = htole16(1); in iwx_clear_tx_desc()
4707 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwx_clear_tx_desc()
4715 bus_dmamap_sync(ring->data_dmat, txd->map, BUS_DMASYNC_POSTWRITE); in iwx_txd_done()
4716 bus_dmamap_unload(ring->data_dmat, txd->map); in iwx_txd_done()
4718 ieee80211_tx_complete(&txd->in->in_ni, txd->m, 0); in iwx_txd_done()
4719 txd->m = NULL; in iwx_txd_done()
4720 txd->in = NULL; in iwx_txd_done()
4728 while (ring->tail_hw != idx) { in iwx_txq_advance()
4729 txd = &ring->data[ring->tail]; in iwx_txq_advance()
4730 if (txd->m != NULL) { in iwx_txq_advance()
4731 iwx_clear_tx_desc(sc, ring, ring->tail); in iwx_txq_advance()
4732 iwx_tx_update_byte_tbl(sc, ring, ring->tail, 0, 0); in iwx_txq_advance()
4734 ring->queued--; in iwx_txq_advance()
4735 if (ring->queued < 0) in iwx_txq_advance()
4738 ring->tail = (ring->tail + 1) % IWX_TX_RING_COUNT; in iwx_txq_advance()
4739 ring->tail_hw = (ring->tail_hw + 1) % sc->max_tfd_queue_size; in iwx_txq_advance()
4747 struct ieee80211com *ic = &sc->sc_ic; in iwx_rx_tx_cmd()
4749 struct iwx_cmd_header *cmd_hdr = &pkt->hdr; in iwx_rx_tx_cmd()
4750 int qid = cmd_hdr->qid, status, txfail; in iwx_rx_tx_cmd()
4751 struct iwx_tx_ring *ring = &sc->txq[qid]; in iwx_rx_tx_cmd()
4752 struct iwx_tx_resp *tx_resp = (void *)pkt->data; in iwx_rx_tx_cmd()
4755 int idx = cmd_hdr->idx; in iwx_rx_tx_cmd()
4756 struct iwx_tx_data *txd = &ring->data[idx]; in iwx_rx_tx_cmd()
4757 struct mbuf *m = txd->m; in iwx_rx_tx_cmd()
4759 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD); in iwx_rx_tx_cmd()
4764 if (qid < IWX_FIRST_AGG_TX_QUEUE && tx_resp->frame_count > 1) in iwx_rx_tx_cmd()
4767 tx_resp->frame_count * sizeof(tx_resp->status) > len) in iwx_rx_tx_cmd()
4770 sc->sc_tx_timer[qid] = 0; in iwx_rx_tx_cmd()
4772 if (tx_resp->frame_count > 1) /* A-MPDU */ in iwx_rx_tx_cmd()
4775 status = le16toh(tx_resp->status.status) & IWX_TX_STATUS_MSK; in iwx_rx_tx_cmd()
4781 ieee80211_tx_complete(&in->in_ni, m, txfail); in iwx_rx_tx_cmd()
4786 if_inc_counter(ifp, IFCOUNTER_OBYTES, m->m_pkthdr.len); in iwx_rx_tx_cmd()
4788 if (m->m_flags & M_MCAST) in iwx_rx_tx_cmd()
4795 * Frames up to this index (non-inclusive) can now be freed. in iwx_rx_tx_cmd()
4797 memcpy(&ssn, &tx_resp->status + tx_resp->frame_count, sizeof(ssn)); in iwx_rx_tx_cmd()
4799 if (ssn < sc->max_tfd_queue_size) { in iwx_rx_tx_cmd()
4808 if (ring->queued < iwx_lomark) { in iwx_clear_oactive()
4809 sc->qfullmsk &= ~(1 << ring->qid); in iwx_clear_oactive()
4810 if (sc->qfullmsk == 0 /* && ifq_is_oactive(&ifp->if_snd) */) { in iwx_clear_oactive()
4824 struct iwx_compressed_ba_notif *ba_res = (void *)pkt->data; in iwx_rx_compressed_ba()
4825 struct ieee80211com *ic = &sc->sc_ic; in iwx_rx_compressed_ba()
4826 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_rx_compressed_ba()
4827 struct iwx_node *in = IWX_NODE(vap->iv_bss); in iwx_rx_compressed_ba()
4828 struct ieee80211_node *ni = &in->in_ni; in iwx_rx_compressed_ba()
4833 // if (ic->ic_state != IEEE80211_S_RUN) in iwx_rx_compressed_ba()
4839 if (ba_res->sta_id != IWX_STATION_ID) in iwx_rx_compressed_ba()
4844 tfd_cnt = le16toh(ba_res->tfd_cnt); in iwx_rx_compressed_ba()
4845 ra_tid_cnt = le16toh(ba_res->ra_tid_cnt); in iwx_rx_compressed_ba()
4847 sizeof(ba_res->ra_tid[0]) * ra_tid_cnt + in iwx_rx_compressed_ba()
4848 sizeof(ba_res->tfd[0]) * tfd_cnt)) in iwx_rx_compressed_ba()
4852 struct iwx_compressed_ba_tfd *ba_tfd = &ba_res->tfd[i]; in iwx_rx_compressed_ba()
4855 tid = ba_tfd->tid; in iwx_rx_compressed_ba()
4856 if (tid >= nitems(sc->aggqid)) in iwx_rx_compressed_ba()
4859 qid = sc->aggqid[tid]; in iwx_rx_compressed_ba()
4860 if (qid != htole16(ba_tfd->q_num)) in iwx_rx_compressed_ba()
4863 ring = &sc->txq[qid]; in iwx_rx_compressed_ba()
4866 ba = &ni->ni_tx_ba[tid]; in iwx_rx_compressed_ba()
4867 if (ba->ba_state != IEEE80211_BA_AGREED) in iwx_rx_compressed_ba()
4870 idx = le16toh(ba_tfd->tfd_index); in iwx_rx_compressed_ba()
4871 sc->sc_tx_timer[qid] = 0; in iwx_rx_compressed_ba()
4881 struct ieee80211com *ic = &sc->sc_ic; in iwx_rx_bmiss()
4882 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_rx_bmiss()
4883 struct iwx_missed_beacons_notif *mbn = (void *)pkt->data; in iwx_rx_bmiss()
4886 if ((ic->ic_opmode != IEEE80211_M_STA) || in iwx_rx_bmiss()
4887 (vap->iv_state != IEEE80211_S_RUN)) in iwx_rx_bmiss()
4890 bus_dmamap_sync(sc->rxq.data_dmat, data->map, in iwx_rx_bmiss()
4893 missed = le32toh(mbn->consec_missed_beacons_since_last_rx); in iwx_rx_bmiss()
4894 if (missed > vap->iv_bmissthreshold) { in iwx_rx_bmiss()
4904 struct ieee80211com *ic = &sc->sc_ic; in iwx_binding_cmd()
4905 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_binding_cmd()
4907 struct iwx_phy_ctxt *phyctxt = ivp->phy_ctxt; in iwx_binding_cmd()
4908 uint32_t mac_id = IWX_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color); in iwx_binding_cmd()
4909 int i, err, active = (sc->sc_flags & IWX_FLAG_BINDING_ACTIVE); in iwx_binding_cmd()
4923 = htole32(IWX_FW_CMD_ID_AND_COLOR(phyctxt->id, phyctxt->color)); in iwx_binding_cmd()
4925 cmd.phy = htole32(IWX_FW_CMD_ID_AND_COLOR(phyctxt->id, phyctxt->color)); in iwx_binding_cmd()
4931 if (IEEE80211_IS_CHAN_2GHZ(phyctxt->channel) || in iwx_binding_cmd()
4932 !isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_CDB_SUPPORT)) in iwx_binding_cmd()
4950 int midpoint = chan->ic_vht_ch_freq1; in iwx_get_vht_ctrl_pos()
4959 switch (ctlchan - midpoint) { in iwx_get_vht_ctrl_pos()
4960 case -6: in iwx_get_vht_ctrl_pos()
4963 case -2: in iwx_get_vht_ctrl_pos()
4984 struct ieee80211com *ic = &sc->sc_ic; in iwx_phy_ctxt_cmd_uhb_v3_v4()
4987 struct ieee80211_channel *chan = ctxt->channel; in iwx_phy_ctxt_cmd_uhb_v3_v4()
4990 cmd.id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(ctxt->id, in iwx_phy_ctxt_cmd_uhb_v3_v4()
4991 ctxt->color)); in iwx_phy_ctxt_cmd_uhb_v3_v4()
4995 !isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_CDB_SUPPORT)) in iwx_phy_ctxt_cmd_uhb_v3_v4()
5039 struct ieee80211com *ic = &sc->sc_ic;
5042 struct ieee80211_channel *chan = ctxt->channel;
5045 cmd.id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(ctxt->id,
5046 ctxt->color));
5049 if (IEEE80211_IS_CHAN_2GHZ(ctxt->channel) ||
5050 !isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_CDB_SUPPORT))
5061 } else if (chan->ic_flags & IEEE80211_CHAN_40MHZ) {
5063 /* secondary chan above -> control chan below */
5067 /* secondary chan below -> control chan above */
5104 printf("%s: firmware does not support phy-context-cmd v3/v4\n", in iwx_phy_ctxt_cmd()
5116 if (isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS)) { in iwx_phy_ctxt_cmd()
5131 struct iwx_tx_ring *ring = &sc->txq[IWX_DQA_CMD_QUEUE]; in iwx_send_cmd()
5142 int generation = sc->sc_generation; in iwx_send_cmd()
5146 code = hcmd->id; in iwx_send_cmd()
5147 async = hcmd->flags & IWX_CMD_ASYNC; in iwx_send_cmd()
5148 idx = ring->cur; in iwx_send_cmd()
5150 for (i = 0, paylen = 0; i < nitems(hcmd->len); i++) { in iwx_send_cmd()
5151 paylen += hcmd->len[i]; in iwx_send_cmd()
5155 hcmd->resp_pkt = NULL; in iwx_send_cmd()
5156 if (hcmd->flags & IWX_CMD_WANT_RESP) { in iwx_send_cmd()
5159 KASSERT(hcmd->resp_pkt_len >= sizeof(struct iwx_rx_packet), in iwx_send_cmd()
5161 KASSERT(hcmd->resp_pkt_len <= IWX_CMD_RESP_MAX, in iwx_send_cmd()
5163 if (sc->sc_cmd_resp_pkt[idx] != NULL) in iwx_send_cmd()
5165 resp_buf = malloc(hcmd->resp_pkt_len, M_DEVBUF, in iwx_send_cmd()
5169 sc->sc_cmd_resp_pkt[idx] = resp_buf; in iwx_send_cmd()
5170 sc->sc_cmd_resp_len[idx] = hcmd->resp_pkt_len; in iwx_send_cmd()
5172 sc->sc_cmd_resp_pkt[idx] = NULL; in iwx_send_cmd()
5175 desc = &ring->desc[idx]; in iwx_send_cmd()
5176 txdata = &ring->data[idx]; in iwx_send_cmd()
5180 * Firmware API versions >= 50 reject old-style commands in in iwx_send_cmd()
5187 txdata->flags |= IWX_TXDATA_FLAG_CMD_IS_NARROW; in iwx_send_cmd()
5189 txdata->flags &= ~IWX_TXDATA_FLAG_CMD_IS_NARROW; in iwx_send_cmd()
5193 hdrlen = sizeof(cmd->hdr_wide); in iwx_send_cmd()
5194 datasz = sizeof(cmd->data_wide); in iwx_send_cmd()
5197 /* Command is too large to fit in pre-allocated space. */ in iwx_send_cmd()
5214 m->m_len = m->m_pkthdr.len = m->m_ext.ext_size; in iwx_send_cmd()
5215 err = bus_dmamap_load_mbuf_sg(ring->data_dmat, txdata->map, m, in iwx_send_cmd()
5226 txdata->m = m; /* mbuf will be freed in iwx_cmd_done() */ in iwx_send_cmd()
5230 cmd = &ring->cmd[idx]; in iwx_send_cmd()
5231 paddr = txdata->cmd_paddr; in iwx_send_cmd()
5235 cmd->hdr_wide.opcode = iwx_cmd_opcode(code); in iwx_send_cmd()
5236 cmd->hdr_wide.group_id = group_id; in iwx_send_cmd()
5237 cmd->hdr_wide.qid = ring->qid; in iwx_send_cmd()
5238 cmd->hdr_wide.idx = idx; in iwx_send_cmd()
5239 cmd->hdr_wide.length = htole16(paylen); in iwx_send_cmd()
5240 cmd->hdr_wide.version = iwx_cmd_version(code); in iwx_send_cmd()
5241 data = cmd->data_wide; in iwx_send_cmd()
5243 for (i = 0, off = 0; i < nitems(hcmd->data); i++) { in iwx_send_cmd()
5244 if (hcmd->len[i] == 0) in iwx_send_cmd()
5246 memcpy(data + off, hcmd->data[i], hcmd->len[i]); in iwx_send_cmd()
5247 off += hcmd->len[i]; in iwx_send_cmd()
5251 desc->tbs[0].tb_len = htole16(MIN(hdrlen + paylen, IWX_FIRST_TB_SIZE)); in iwx_send_cmd()
5253 memcpy(&desc->tbs[0].addr, &addr, sizeof(addr)); in iwx_send_cmd()
5257 desc->tbs[1].tb_len = htole16(hdrlen + paylen - in iwx_send_cmd()
5260 memcpy(&desc->tbs[1].addr, &addr, sizeof(addr)); in iwx_send_cmd()
5261 desc->num_tbs = htole16(2); in iwx_send_cmd()
5263 desc->num_tbs = htole16(1); in iwx_send_cmd()
5266 bus_dmamap_sync(ring->data_dmat, txdata->map, in iwx_send_cmd()
5269 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, in iwx_send_cmd()
5272 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, in iwx_send_cmd()
5276 ring->queued++; in iwx_send_cmd()
5277 ring->cur = (ring->cur + 1) % IWX_TX_RING_COUNT; in iwx_send_cmd()
5278 ring->cur_hw = (ring->cur_hw + 1) % sc->max_tfd_queue_size; in iwx_send_cmd()
5279 DPRINTF(("%s: ring->cur_hw=%i\n", __func__, ring->cur_hw)); in iwx_send_cmd()
5280 IWX_WRITE(sc, IWX_HBUS_TARG_WRPTR, ring->qid << 16 | ring->cur_hw); in iwx_send_cmd()
5283 err = msleep(desc, &sc->sc_mtx, PCATCH, "iwxcmd", hz); in iwx_send_cmd()
5286 if (generation != sc->sc_generation) { in iwx_send_cmd()
5292 hcmd->resp_pkt = (void *)sc->sc_cmd_resp_pkt[idx]; in iwx_send_cmd()
5293 sc->sc_cmd_resp_pkt[idx] = NULL; in iwx_send_cmd()
5294 } else if (generation == sc->sc_generation) { in iwx_send_cmd()
5295 free(sc->sc_cmd_resp_pkt[idx], M_DEVBUF); in iwx_send_cmd()
5296 sc->sc_cmd_resp_pkt[idx] = NULL; in iwx_send_cmd()
5325 KASSERT(((cmd->flags & IWX_CMD_WANT_RESP) == 0), ("IWX_CMD_WANT_RESP")); in iwx_send_cmd_status()
5326 cmd->flags |= IWX_CMD_WANT_RESP; in iwx_send_cmd_status()
5327 cmd->resp_pkt_len = sizeof(*pkt) + sizeof(*resp); in iwx_send_cmd_status()
5333 pkt = cmd->resp_pkt; in iwx_send_cmd_status()
5334 if (pkt == NULL || (pkt->hdr.flags & IWX_CMD_FAILED_MSK)) in iwx_send_cmd_status()
5343 resp = (void *)pkt->data; in iwx_send_cmd_status()
5344 *status = le32toh(resp->status); in iwx_send_cmd_status()
5365 KASSERT((hcmd->flags & (IWX_CMD_WANT_RESP)) == IWX_CMD_WANT_RESP, in iwx_free_resp()
5367 free(hcmd->resp_pkt, M_DEVBUF); in iwx_free_resp()
5368 hcmd->resp_pkt = NULL; in iwx_free_resp()
5374 struct iwx_tx_ring *ring = &sc->txq[IWX_DQA_CMD_QUEUE]; in iwx_cmd_done()
5381 data = &ring->data[idx]; in iwx_cmd_done()
5383 if (data->m != NULL) { in iwx_cmd_done()
5384 bus_dmamap_sync(ring->data_dmat, data->map, in iwx_cmd_done()
5386 bus_dmamap_unload(ring->data_dmat, data->map); in iwx_cmd_done()
5387 m_freem(data->m); in iwx_cmd_done()
5388 data->m = NULL; in iwx_cmd_done()
5390 wakeup(&ring->desc[idx]); in iwx_cmd_done()
5393 if (ring->queued == 0) { in iwx_cmd_done()
5396 } else if (ring->queued > 0) in iwx_cmd_done()
5397 ring->queued--; in iwx_cmd_done()
5407 for (i = 0; i < rs->rs_nrates; i++) { in iwx_fw_rateidx_ofdm()
5408 if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == rval) in iwx_fw_rateidx_ofdm()
5422 for (i = 0; i < rs->rs_nrates; i++) { in iwx_fw_rateidx_cck()
5423 if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == rval) in iwx_fw_rateidx_cck()
5433 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); in iwx_min_basic_rate()
5434 struct ieee80211_node *ni = vap->iv_bss; in iwx_min_basic_rate()
5435 struct ieee80211_rateset *rs = &ni->ni_rates; in iwx_min_basic_rate()
5436 struct ieee80211_channel *c = ni->ni_chan; in iwx_min_basic_rate()
5439 min = -1; in iwx_min_basic_rate()
5443 return -1; in iwx_min_basic_rate()
5446 for (i = 0; i < rs->rs_nrates; i++) { in iwx_min_basic_rate()
5447 if ((rs->rs_rates[i] & IEEE80211_RATE_BASIC) == 0) in iwx_min_basic_rate()
5449 rval = (rs->rs_rates[i] & IEEE80211_RATE_VAL); in iwx_min_basic_rate()
5450 if (min == -1) in iwx_min_basic_rate()
5457 if (min == -1) in iwx_min_basic_rate()
5472 struct ieee80211com *ic = &sc->sc_ic; in iwx_tx_fill_cmd()
5473 struct ieee80211_node *ni = &in->in_ni; in iwx_tx_fill_cmd()
5474 struct ieee80211_rateset *rs = &ni->ni_rates; in iwx_tx_fill_cmd()
5476 int type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; in iwx_tx_fill_cmd()
5482 if (ridx == -1) in iwx_tx_fill_cmd()
5489 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || in iwx_tx_fill_cmd()
5491 /* for non-data, use the lowest supported rate */ in iwx_tx_fill_cmd()
5494 } else if (ni->ni_flags & IEEE80211_NODE_HT) { in iwx_tx_fill_cmd()
5498 rval = (rs->rs_rates[ieee80211_node_get_txrate_dot11rate(ni)] in iwx_tx_fill_cmd()
5505 if (m->m_flags & M_EAPOL) in iwx_tx_fill_cmd()
5528 if (sc->sc_rate_n_flags_version >= 2) in iwx_tx_fill_cmd()
5532 } else if (sc->sc_rate_n_flags_version >= 2) in iwx_tx_fill_cmd()
5535 rval = (rs->rs_rates[ieee80211_node_get_txrate_dot11rate(ni)] in iwx_tx_fill_cmd()
5538 rval, rs->rs_rates[ieee80211_node_get_txrate_dot11rate(ni)]); in iwx_tx_fill_cmd()
5540 if (sc->sc_rate_n_flags_version >= 2) { in iwx_tx_fill_cmd()
5549 rate_flags |= rinfo->plcp; in iwx_tx_fill_cmd()
5557 if (sc->sc_debug & IWX_DEBUG_TXRATE) in iwx_tx_fill_cmd()
5559 *rate_n_flags, sc->sc_rate_n_flags_version); in iwx_tx_fill_cmd()
5577 * to SRAM- 0 for one chunk, 1 for 2 and so on. in iwx_tx_update_byte_tbl()
5582 num_fetch_chunks = howmany(filled_tfd_size, 64) - 1; in iwx_tx_update_byte_tbl()
5584 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) { in iwx_tx_update_byte_tbl()
5585 struct iwx_gen3_bc_tbl_entry *scd_bc_tbl = txq->bc_tbl.vaddr; in iwx_tx_update_byte_tbl()
5590 struct iwx_agn_scd_bc_tbl *scd_bc_tbl = txq->bc_tbl.vaddr; in iwx_tx_update_byte_tbl()
5594 scd_bc_tbl->tfd_offset[idx] = bc_ent; in iwx_tx_update_byte_tbl()
5597 bus_dmamap_sync(sc->sc_dmat, txq->bc_tbl.map, BUS_DMASYNC_PREWRITE); in iwx_tx_update_byte_tbl()
5603 struct ieee80211com *ic = &sc->sc_ic;
5604 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5626 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
5627 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
5630 qid = sc->first_data_qid;
5633 if (IEEE80211_QOS_HAS_SEQ(wh) && (sc->sc_flags & IWX_FLAG_AMPDUTX)) {
5638 * XXX-THJ: TODO when we enable ba we need to manage the
5642 ba = &ni->ni_tx_ba[tid];
5644 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
5648 sc->aggqid[tid] != 0 /*&&
5649 ba->ba_state == IEEE80211_BA_AGREED*/) {
5650 qid = sc->aggqid[tid];
5652 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
5655 sc->aggqid[tid] != 0) {
5656 qid = sc->aggqid[tid];
5661 ring = &sc->txq[qid];
5662 desc = &ring->desc[ring->cur];
5664 data = &ring->data[ring->cur];
5666 cmd = &ring->cmd[ring->cur];
5667 cmd->hdr.code = IWX_TX_CMD;
5668 cmd->hdr.flags = 0;
5669 cmd->hdr.qid = ring->qid;
5670 cmd->hdr.idx = ring->cur;
5677 struct iwx_tx_radiotap_header *tap = &sc->sc_txtap;
5679 tap->wt_flags = 0;
5680 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq);
5681 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags);
5682 tap->wt_rate = rinfo->rate;
5684 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
5688 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
5694 } else if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) {
5695 k->wk_keytsc++;
5697 k->wk_cipher->ic_encap(k, m);
5706 totlen = m->m_pkthdr.len;
5710 pad = 4 - (hdrlen & 3);
5715 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) {
5716 struct iwx_tx_cmd_gen3 *tx = (void *)cmd->data;
5718 tx->len = htole16(totlen);
5719 tx->offload_assist = htole32(offload_assist);
5720 tx->flags = htole16(flags);
5721 tx->rate_n_flags = htole32(rate_n_flags);
5722 memcpy(tx->hdr, wh, hdrlen);
5725 struct iwx_tx_cmd_gen2 *tx = (void *)cmd->data;
5727 tx->len = htole16(totlen);
5728 tx->offload_assist = htole16(offload_assist);
5729 tx->flags = htole32(flags);
5730 tx->rate_n_flags = htole32(rate_n_flags);
5731 memcpy(tx->hdr, wh, hdrlen);
5738 err = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m, segs,
5746 /* Too many DMA segments, linearize mbuf. */
5747 m1 = m_collapse(m, M_NOWAIT, IWM_MAX_SCATTER - 2);
5754 err = bus_dmamap_load_mbuf_sg(ring->data_dmat, data->map, m,
5763 data->m = m;
5764 data->in = in;
5768 desc->num_tbs = htole16(num_tbs);
5770 desc->tbs[0].tb_len = htole16(IWX_FIRST_TB_SIZE);
5771 paddr = htole64(data->cmd_paddr);
5772 memcpy(&desc->tbs[0].addr, &paddr, sizeof(paddr));
5773 if (data->cmd_paddr >> 32 != (data->cmd_paddr + le32toh(desc->tbs[0].tb_len)) >> 32)
5775 desc->tbs[1].tb_len = htole16(sizeof(struct iwx_cmd_header) +
5776 txcmd_size + hdrlen + pad - IWX_FIRST_TB_SIZE);
5777 paddr = htole64(data->cmd_paddr + IWX_FIRST_TB_SIZE);
5778 memcpy(&desc->tbs[1].addr, &paddr, sizeof(paddr));
5780 if (data->cmd_paddr >> 32 != (data->cmd_paddr + le32toh(desc->tbs[1].tb_len)) >> 32)
5783 /* Other DMA segments are for data payload. */
5786 desc->tbs[i + 2].tb_len = htole16(seg->ds_len);
5787 paddr = htole64(seg->ds_addr);
5788 memcpy(&desc->tbs[i + 2].addr, &paddr, sizeof(paddr));
5789 if (data->cmd_paddr >> 32 != (data->cmd_paddr + le32toh(desc->tbs[i + 2].tb_len)) >> 32)
5793 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
5794 bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map,
5796 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
5799 iwx_tx_update_byte_tbl(sc, ring, ring->cur, totlen, num_tbs);
5802 ring->cur = (ring->cur + 1) % IWX_TX_RING_COUNT;
5803 ring->cur_hw = (ring->cur_hw + 1) % sc->max_tfd_queue_size;
5804 IWX_WRITE(sc, IWX_HBUS_TARG_WRPTR, ring->qid << 16 | ring->cur_hw);
5807 if (++ring->queued > iwx_himark) {
5808 sc->qfullmsk |= 1 << ring->qid;
5811 sc->sc_tx_timer[ring->qid] = 15;
5839 if (!pkt || (pkt->hdr.flags & IWX_CMD_FAILED_MSK)) {
5853 resp = (void *)pkt->data;
5855 if (le16toh(resp->sta_id) != sta_id) {
5860 num_flushed_queues = le16toh(resp->num_flushed_queues);
5867 struct iwx_flush_queue_info *queue_info = &resp->queues[i];
5868 uint16_t tid = le16toh(queue_info->tid);
5869 uint16_t read_after = le16toh(queue_info->read_after_flush);
5870 uint16_t qid = le16toh(queue_info->queue_num);
5873 if (qid >= nitems(sc->txq))
5876 txq = &sc->txq[qid];
5877 if (tid != txq->tid)
5897 cmd.mac_id_n_color = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id,
5898 in->in_color));
5933 sc->sc_flags |= IWX_FLAG_TXFLUSH;
5947 * XXX-THJ: iwx_wait_tx_queues_empty was here, but it was a nope in the
5953 sc->sc_flags &= ~IWX_FLAG_TXFLUSH;
5976 if (!sc->sc_bf.bf_enabled)
5979 sc->sc_bf.ba_enabled = enable;
5987 struct ieee80211com *ic = &sc->sc_ic;
5988 struct ieee80211_node *ni = &in->in_ni;
5989 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
5992 cmd->id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id,
5993 in->in_color));
5994 if (vap->iv_dtim_period)
5995 dtim_period = vap->iv_dtim_period;
6005 dtim_msec = dtim_period * ni->ni_intval;
6008 cmd->keep_alive_seconds = htole16(keep_alive);
6010 if (ic->ic_opmode != IEEE80211_M_MONITOR)
6011 cmd->flags = htole16(IWX_POWER_FLAGS_POWER_SAVE_ENA_MSK);
6039 struct ieee80211com *ic = &sc->sc_ic;
6041 if (ic->ic_opmode != IEEE80211_M_MONITOR)
6054 .ba_enable_beacon_abort = htole32(sc->sc_bf.ba_enabled),
6060 sc->sc_bf.bf_enabled = 1;
6075 sc->sc_bf.bf_enabled = 0;
6088 struct ieee80211com *ic = &sc->sc_ic;
6089 struct ieee80211_node *ni = &in->in_ni;
6090 struct ieee80211_htrateset *htrs = &ni->ni_htrates;
6092 if (!update && (sc->sc_flags & IWX_FLAG_STA_ACTIVE))
6097 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6105 = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id, in->in_color));
6107 if (ic->ic_opmode == IEEE80211_M_MONITOR)
6112 in->in_macaddr);
6120 if (in->in_ni.ni_flags & IEEE80211_NODE_HT) {
6126 if (ni->ni_flags & IEEE80211_NODE_VHT) {
6131 for (i = 0; i < htrs->rs_nrates; i++) {
6132 if (htrs->rs_rates[i] > 7) {
6144 if (ni->ni_flags & IEEE80211_NODE_HT &&
6145 IEEE80211_IS_CHAN_HT40(ni->ni_chan)) {
6151 if (ni->ni_flags & IEEE80211_NODE_VHT) {
6152 if (IEEE80211_IS_CHAN_VHT80(ni->ni_chan)) {
6156 // XXX-misha: TODO get real ampdu size
6159 aggsize = _IEEE80211_MASKSHIFT(le16toh(ni->ni_htparam),
6169 switch (_IEEE80211_MASKSHIFT(le16toh(ni->ni_htparam),
6204 struct ieee80211com *ic = &sc->sc_ic;
6208 if ((sc->sc_flags & IWX_FLAG_STA_ACTIVE) == 0)
6212 if (ic->ic_opmode == IEEE80211_M_MONITOR)
6247 struct iwx_tx_ring *ring = &sc->txq[i];
6248 if ((sc->qenablemsk & (1 << i)) == 0)
6251 ring->qid, ring->tid);
6254 "(error %d)\n", DEVNAME(sc), ring->qid,
6268 in->in_flags = 0;
6270 sc->sc_rx_ba_sessions = 0;
6271 sc->ba_rx.start_tidmask = 0;
6272 sc->ba_rx.stop_tidmask = 0;
6273 memset(sc->aggqid, 0, sizeof(sc->aggqid));
6274 sc->ba_tx.start_tidmask = 0;
6275 sc->ba_tx.stop_tidmask = 0;
6277 sc->qenablemsk &= ~(1 << i);
6281 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[i];
6282 if (ba->ba_state != IEEE80211_BA_AGREED)
6287 /* Clear ampdu rx state (GOS-1525) */
6289 struct iwx_rx_ba *ba = &sc->ni_rx_ba[i];
6290 ba->ba_flags = 0;
6301 struct ieee80211com *ic = &sc->sc_ic;
6302 struct ieee80211_scan_state *ss = ic->ic_scan;
6308 j < ss->ss_last &&
6309 nchan < sc->sc_capa_n_scan_channels;
6313 c = ss->ss_chans[j];
6314 channel_num = ieee80211_mhz2ieee(c->ic_freq, 0);
6315 if (isset(sc->sc_ucode_api,
6317 chan->v2.channel_num = channel_num;
6319 chan->v2.band = IWX_PHY_BAND_24;
6321 chan->v2.band = IWX_PHY_BAND_5;
6322 chan->v2.iter_count = 1;
6323 chan->v2.iter_interval = 0;
6325 chan->v1.channel_num = channel_num;
6326 chan->v1.iter_count = 1;
6327 chan->v1.iter_interval = htole16(0);
6329 chan->flags |= htole32(channel_cfg_flags);
6340 struct ieee80211com *ic = &sc->sc_ic;
6341 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6342 struct ieee80211_frame *wh = (struct ieee80211_frame *)preq->buf;
6344 size_t remain = sizeof(preq->buf);
6356 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
6358 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
6359 IEEE80211_ADDR_COPY(wh->i_addr1, etherbroadcastaddr);
6360 IEEE80211_ADDR_COPY(wh->i_addr2, vap ? vap->iv_myaddr : ic->ic_macaddr);
6361 IEEE80211_ADDR_COPY(wh->i_addr3, etherbroadcastaddr);
6362 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
6363 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
6371 preq->mac_header.offset = 0;
6372 preq->mac_header.len = htole16(frm - (uint8_t *)wh);
6373 remain -= frm - (uint8_t *)wh;
6376 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
6377 if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
6378 if (remain < 4 + rs->rs_nrates)
6380 } else if (remain < 2 + rs->rs_nrates)
6382 preq->band_data[0].offset = htole16(frm - (uint8_t *)wh);
6385 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6387 remain -= frm - pos;
6389 if (isset(sc->sc_enabled_capa,
6396 remain -= 3;
6398 preq->band_data[0].len = htole16(frm - pos);
6400 if (sc->sc_nvm.sku_cap_band_52GHz_enable) {
6402 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
6403 if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
6404 if (remain < 4 + rs->rs_nrates)
6406 } else if (remain < 2 + rs->rs_nrates)
6408 preq->band_data[1].offset = htole16(frm - (uint8_t *)wh);
6411 if (rs->rs_nrates > IEEE80211_RATE_SIZE)
6413 preq->band_data[1].len = htole16(frm - pos);
6414 remain -= frm - pos;
6415 if (vap->iv_vht_flags & IEEE80211_FVHT_VHT) {
6418 frm = ieee80211_add_vhtcap(frm, vap->iv_bss);
6419 remain -= frm - pos;
6420 preq->band_data[1].len = htole16(frm - pos);
6425 preq->common_data.offset = htole16(frm - (uint8_t *)wh);
6427 if (vap->iv_flags_ht & IEEE80211_FHT_HT) {
6430 frm = ieee80211_add_htcap(frm, vap->iv_bss);
6432 remain -= frm - pos;
6435 preq->common_data.len = htole16(frm - pos);
6452 if (!isset(sc->sc_ucode_api, IWX_UCODE_TLV_API_REDUCED_SCAN_CONFIG)) {
6477 struct ieee80211com *ic = &sc->sc_ic;
6478 struct ieee80211_scan_state *ss = ic->ic_scan;
6481 if (ss->ss_nssid == 0) {
6521 general_params->adwell_default_social_chn =
6523 general_params->adwell_default_2g = IWX_SCAN_ADWELL_DEFAULT_LB_N_APS;
6524 general_params->adwell_default_5g = IWX_SCAN_ADWELL_DEFAULT_HB_N_APS;
6527 general_params->adwell_max_budget =
6530 general_params->adwell_max_budget =
6533 general_params->scan_priority = htole32(IWX_SCAN_PRIORITY_EXT_6);
6541 general_params->max_out_of_time[IWX_SCAN_LB_LMAC_IDX] =
6543 general_params->suspend_time[IWX_SCAN_LB_LMAC_IDX] =
6545 general_params->max_out_of_time[IWX_SCAN_HB_LMAC_IDX] =
6547 general_params->suspend_time[IWX_SCAN_HB_LMAC_IDX] =
6550 general_params->active_dwell[IWX_SCAN_LB_LMAC_IDX] = active_dwell;
6551 general_params->passive_dwell[IWX_SCAN_LB_LMAC_IDX] = passive_dwell;
6552 general_params->active_dwell[IWX_SCAN_HB_LMAC_IDX] = active_dwell;
6553 general_params->passive_dwell[IWX_SCAN_HB_LMAC_IDX] = passive_dwell;
6562 gp->flags = htole16(gen_flags);
6565 gp->num_of_fragments[IWX_SCAN_LB_LMAC_IDX] = 3;
6567 gp->num_of_fragments[IWX_SCAN_HB_LMAC_IDX] = 3;
6569 gp->scan_start_mac_id = 0;
6577 cp->flags = IWX_SCAN_CHANNEL_FLAG_ENABLE_CHAN_ORDER;
6579 cp->count = iwx_umac_scan_fill_channels(sc, cp->channel_config,
6580 nitems(cp->channel_config), n_ssid, channel_cfg_flags);
6582 cp->n_aps_override[0] = IWX_SCAN_ADWELL_N_APS_GO_FRIENDLY;
6583 cp->n_aps_override[1] = IWX_SCAN_ADWELL_N_APS_SOCIAL_CHS;
6589 struct ieee80211com *ic = &sc->sc_ic;
6590 struct ieee80211_scan_state *ss = ic->ic_scan;
6597 struct iwx_scan_req_umac_v14 *cmd = &sc->sc_umac_v14_cmd;
6607 scan_p = &cmd->scan_params;
6609 cmd->ooc_priority = htole32(IWX_SCAN_PRIORITY_EXT_6);
6610 cmd->uid = htole32(0);
6613 iwx_scan_umac_fill_general_p_v10(sc, &scan_p->general_params,
6616 scan_p->periodic_params.schedule[0].interval = htole16(0);
6617 scan_p->periodic_params.schedule[0].iter_count = 1;
6619 err = iwx_fill_probe_req(sc, &scan_p->probe_params.preq);
6626 for (int i=0; i < ss->ss_nssid; i++) {
6627 scan_p->probe_params.direct_scan[i].id = IEEE80211_ELEMID_SSID;
6628 scan_p->probe_params.direct_scan[i].len =
6629 MIN(ss->ss_ssid[i].len, IEEE80211_NWID_LEN);
6631 memcpy(scan_p->probe_params.direct_scan[i].ssid,
6632 ss->ss_ssid[i].ssid, ss->ss_ssid[i].len);
6638 iwx_scan_umac_fill_ch_p_v6(sc, &scan_p->channel_params, bitmap_ssid,
6655 (le16toh(notif->mcc) & 0xff00) >> 8, le16toh(notif->mcc) & 0xff);
6658 "(0x%x)\n", DEVNAME(sc), alpha2, le16toh(notif->mcc));
6669 for (i = 0; i < rs->rs_nrates; i++) {
6670 rval = (rs->rs_rates[i] & IEEE80211_RATE_VAL);
6672 return rs->rs_rates[i];
6697 struct ieee80211_node *ni = &in->in_ni;
6698 struct ieee80211_rateset *rs = &ni->ni_rates;
6699 int lowest_present_ofdm = -1;
6700 int lowest_present_cck = -1;
6705 if (ni->ni_chan == IEEE80211_CHAN_ANYC ||
6706 IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) {
6711 if (lowest_present_cck == -1 || lowest_present_cck > i)
6718 ofdm |= (1 << (i - IWX_FIRST_OFDM_RATE));
6719 if (lowest_present_ofdm == -1 || lowest_present_ofdm > i)
6728 * and 6 Mbps because the 802.11-2007 standard says in 9.6:
6756 * - if no CCK rates are basic, it must be ERP since there must
6759 * - if 11M is a basic rate, it must be ERP as well, so add 5.5M
6760 * - if 5.5M is basic, 1M and 2M are mandatory
6761 * - if 2M is basic, 1M is mandatory
6762 * - if 1M is basic, that's the only valid ACK rate.
6783 #define IWX_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
6784 struct ieee80211com *ic = &sc->sc_ic;
6785 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6786 struct ieee80211_node *ni = vap->iv_bss;
6789 cmd->id_and_color = htole32(IWX_FW_CMD_ID_AND_COLOR(in->in_id,
6790 in->in_color));
6791 cmd->action = htole32(action);
6796 if (ic->ic_opmode == IEEE80211_M_MONITOR)
6797 cmd->mac_type = htole32(IWX_FW_MAC_TYPE_LISTENER);
6798 else if (ic->ic_opmode == IEEE80211_M_STA)
6799 cmd->mac_type = htole32(IWX_FW_MAC_TYPE_BSS_STA);
6801 panic("unsupported operating mode %d", ic->ic_opmode);
6802 cmd->tsf_id = htole32(IWX_TSF_ID_A);
6804 IEEE80211_ADDR_COPY(cmd->node_addr, vap->iv_myaddr);
6805 DPRINTF(("%s: cmd->node_addr=%s\n", __func__,
6806 ether_sprintf(cmd->node_addr)));
6807 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6808 IEEE80211_ADDR_COPY(cmd->bssid_addr, etherbroadcastaddr);
6812 IEEE80211_ADDR_COPY(cmd->bssid_addr, in->in_macaddr);
6813 DPRINTF(("%s: cmd->bssid_addr=%s\n", __func__,
6814 ether_sprintf(cmd->bssid_addr)));
6816 cmd->cck_rates = htole32(cck_ack_rates);
6817 cmd->ofdm_rates = htole32(ofdm_ack_rates);
6819 cmd->cck_short_preamble
6820 = htole32((ic->ic_flags & IEEE80211_F_SHPREAMBLE)
6822 cmd->short_slot
6823 = htole32((ic->ic_flags & IEEE80211_F_SHSLOT)
6831 cmd->ac[txf].cw_min = IWX_EXP2(chp.cap_wmeParams[i].wmep_logcwmin);
6832 cmd->ac[txf].cw_max = IWX_EXP2(chp.cap_wmeParams[i].wmep_logcwmax);
6833 cmd->ac[txf].aifsn = chp.cap_wmeParams[i].wmep_aifsn;
6834 cmd->ac[txf].fifos_mask = (1 << txf);
6835 cmd->ac[txf].edca_txop = chp.cap_wmeParams[i].wmep_txopLimit;
6837 cmd->ac[txf].edca_txop = htole16(chp.cap_wmeParams[i].wmep_txopLimit * 32);
6840 if (ni->ni_flags & IEEE80211_NODE_QOS) {
6842 cmd->qos_flags |= htole32(IWX_MAC_QOS_FLG_UPDATE_EDCA);
6845 if (ni->ni_flags & IEEE80211_NODE_HT) {
6846 switch (vap->iv_curhtprotmode) {
6851 cmd->protection_flags |=
6856 if (in->in_phyctxt &&
6857 (in->in_phyctxt->sco == IEEE80211_HTINFO_2NDCHAN_ABOVE ||
6858 in->in_phyctxt->sco == IEEE80211_HTINFO_2NDCHAN_BELOW)) {
6859 cmd->protection_flags |=
6867 cmd->qos_flags |= htole32(IWX_MAC_QOS_FLG_TGN);
6871 if (ic->ic_flags & IEEE80211_F_USEPROT)
6872 cmd->protection_flags |= htole32(IWX_MAC_PROT_FLG_TGG_PROTECT);
6873 cmd->filter_flags = htole32(IWX_MAC_FILTER_ACCEPT_GRP);
6881 struct ieee80211_node *ni = &in->in_ni;
6882 struct ieee80211com *ic = &sc->sc_ic;
6883 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6888 dtim_off = ni->ni_dtim_count * ni->ni_intval * IEEE80211_DUR_TU;
6889 tsf = le64toh(ni->ni_tstamp.tsf);
6890 dtim_period = vap->iv_dtim_period;
6892 sta->is_assoc = htole32(assoc);
6895 sta->dtim_time = htole32(tsf + dtim_off);
6896 sta->dtim_tsf = htole64(tsf + dtim_off);
6898 sta->assoc_beacon_arrive_time = 0;
6900 sta->bi = htole32(ni->ni_intval);
6901 sta->dtim_interval = htole32(ni->ni_intval * dtim_period);
6902 sta->data_policy = htole32(0);
6903 sta->listen_interval = htole32(10);
6904 sta->assoc_id = htole32(ni->ni_associd);
6911 struct ieee80211com *ic = &sc->sc_ic;
6912 struct ieee80211_node *ni = &in->in_ni;
6914 int active = (sc->sc_flags & IWX_FLAG_MAC_ACTIVE);
6930 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
6938 } else if (!assoc || !ni->ni_associd /*|| !ni->ni_dtimperiod*/) {
6988 struct iwx_softc *sc = ic->ic_softc;
7004 sc->first_data_qid = IWX_DQA_CMD_QUEUE + 1;
7007 * Non-QoS frames use the "MGMT" TID and queue.
7010 err = iwx_enable_txq(sc, IWX_STATION_ID, sc->first_data_qid,
7014 DEVNAME(sc), sc->first_data_qid, err);
7032 sc->first_data_qid = IWX_DQA_CMD_QUEUE + 1;
7034 err = iwx_disable_txq(sc, IWX_STATION_ID, sc->first_data_qid,
7038 DEVNAME(sc), sc->first_data_qid, err);
7052 for (i = 0; i < rs->rs_nrates; i++) {
7053 if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == rval)
7057 return -1;
7064 struct ieee80211_htrateset *htrs = &ni->ni_htrates;
7068 for (i = 0; i < htrs->rs_nrates; i++) {
7069 if (htrs->rs_rates[i] <= 7)
7070 htrates |= (1 << htrs->rs_rates[i]);
7073 for (i = 0; i < htrs->rs_nrates; i++) {
7074 if (htrs->rs_rates[i] > 7 && htrs->rs_rates[i] <= 15)
7075 htrates |= (1 << (htrs->rs_rates[i] - 8));
7090 int max_mcs = -1;
7091 #define IEEE80211_VHT_MCS_FOR_SS_MASK(n) (0x3 << (2*((n)-1)))
7092 #define IEEE80211_VHT_MCS_FOR_SS_SHIFT(n) (2*((n)-1))
7093 rx_mcs = (ni->ni_vht_mcsinfo.tx_mcs_map &
7107 /* Disable VHT MCS 9 for 20MHz-only stations. */
7108 if ((ni->ni_htcap & IEEE80211_HTCAP_CHWIDTH40) == 0)
7118 return ((1 << (max_mcs + 1)) - 1);
7127 struct ieee80211_node *ni = &in->in_ni;
7128 struct ieee80211_rateset *rs = &ni->ni_rates;
7136 for (i = 0; i < rs->rs_nrates; i++) {
7137 uint8_t rval = rs->rs_rates[i] & IEEE80211_RATE_VAL;
7139 if (idx == -1)
7144 if (ni->ni_flags & IEEE80211_NODE_VHT) {
7150 } else if (ni->ni_flags & IEEE80211_NODE_HT) {
7162 if (in->in_phyctxt->vht_chan_width == IEEE80211_VHTOP0_CHAN_WIDTH_80)
7164 else if (in->in_phyctxt->sco == IEEE80211_HTOP0_SCO_SCA ||
7165 in->in_phyctxt->sco == IEEE80211_HTOP0_SCO_SCB)
7170 if (ni->ni_flags & IEEE80211_NODE_VHT)
7174 if (ni->ni_flags & IEEE80211_NODE_HT) {
7184 if ((ni->ni_flags & IEEE80211_NODE_VHT) &&
7196 struct ieee80211_node *ni = &in->in_ni;
7197 struct ieee80211_rateset *rs = &ni->ni_rates;
7198 struct ieee80211_htrateset *htrs = &ni->ni_htrates;
7207 for (i = 0; i < rs->rs_nrates; i++) {
7208 uint8_t rval = rs->rs_rates[i] & IEEE80211_RATE_VAL;
7210 if (idx == -1)
7214 for (i = 0; i < htrs->rs_nrates; i++) {
7215 DPRINTF(("%s: htrate=%i\n", __func__, htrs->rs_rates[i]));
7218 if (ni->ni_flags & IEEE80211_NODE_VHT) {
7231 } else if (ni->ni_flags & IEEE80211_NODE_HT) {
7251 if (in->in_phyctxt->vht_chan_width == IEEE80211_VHTOP0_CHAN_WIDTH_80)
7253 else if (in->in_phyctxt->sco == IEEE80211_HTOP0_SCO_SCA ||
7254 in->in_phyctxt->sco == IEEE80211_HTOP0_SCO_SCB)
7259 if (IEEE80211_IS_CHAN_VHT80(in->in_ni.ni_chan)) {
7261 } else if (IEEE80211_IS_CHAN_HT40(in->in_ni.ni_chan)) {
7268 if (ni->ni_flags & IEEE80211_NODE_VHT)
7272 if (ni->ni_flags & IEEE80211_NODE_HT) {
7273 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) {
7277 if (ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40) {
7282 sgi80 = _IEEE80211_MASKSHIFT(ni->ni_vhtcap,
7284 if ((ni->ni_flags & IEEE80211_NODE_VHT) && sgi80) {
7308 struct ieee80211com *ic = &sc->sc_ic;
7309 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
7310 struct ieee80211_node *ni = (void *)vap->iv_bss;
7312 struct ieee80211_rateset *rs = &ni->ni_rates;
7317 if (notif->sta_id != IWX_STATION_ID ||
7318 (le32toh(notif->flags) & IWX_TLC_NOTIF_FLAG_RATE) == 0)
7321 rate_n_flags = le32toh(notif->rate);
7323 if (sc->sc_debug & IWX_DEBUG_TXRATE)
7325 rate_n_flags, sc->sc_rate_n_flags_version);
7367 if (ridx < rs->rs_nrates)
7368 rval = (rs->rs_rates[ridx] & IEEE80211_RATE_VAL);
7385 for (i = 0; i < rs->rs_nrates; i++) {
7386 rv = rs->rs_rates[i] & IEEE80211_RATE_VAL;
7411 cmd.phy_id = htole32(phyctxt->id);
7432 printf("%s: GOS-3833: IEEE80211_CHAN_ANYC triggered\n",
7437 if (isset(sc->sc_enabled_capa,
7439 (phyctxt->channel->ic_flags & band_flags) !=
7440 (chan->ic_flags & band_flags)) {
7449 phyctxt->channel = chan;
7459 phyctxt->channel = chan;
7470 phyctxt->sco = sco;
7471 phyctxt->vht_chan_width = vht_chan_width;
7473 DPRINTF(("%s: phyctxt->channel->ic_ieee=%d\n", __func__,
7474 phyctxt->channel->ic_ieee));
7475 DPRINTF(("%s: phyctxt->sco=%d\n", __func__, phyctxt->sco));
7476 DPRINTF(("%s: phyctxt->vht_chan_width=%d\n", __func__,
7477 phyctxt->vht_chan_width));
7490 struct ieee80211com *ic = &sc->sc_ic;
7495 int generation = sc->sc_generation, err;
7499 ni = ieee80211_ref_node(vap->iv_bss);
7502 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7503 err = iwx_phy_ctxt_update(sc, &sc->sc_phyctxt[0],
7504 ic->ic_bsschan, 1, 1, 0, IEEE80211_HTOP0_SCO_SCN,
7509 err = iwx_phy_ctxt_update(sc, &sc->sc_phyctxt[0],
7510 in->in_ni.ni_chan, 1, 1, 0, IEEE80211_HTOP0_SCO_SCN,
7515 ivp->phy_ctxt = &sc->sc_phyctxt[0];
7516 IEEE80211_ADDR_COPY(in->in_macaddr, in->in_ni.ni_macaddr);
7517 DPRINTF(("%s: in-in_macaddr=%s\n", __func__,
7518 ether_sprintf(in->in_macaddr)));
7526 sc->sc_flags |= IWX_FLAG_MAC_ACTIVE;
7534 sc->sc_flags |= IWX_FLAG_BINDING_ACTIVE;
7542 sc->sc_flags |= IWX_FLAG_STA_ACTIVE;
7544 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
7565 if (in->in_ni.ni_intval)
7566 duration = in->in_ni.ni_intval * 9;
7572 if (generation == sc->sc_generation)
7575 if (generation == sc->sc_generation) {
7577 sc->sc_flags &= ~IWX_FLAG_STA_ACTIVE;
7580 if (generation == sc->sc_generation) {
7582 sc->sc_flags &= ~IWX_FLAG_BINDING_ACTIVE;
7585 if (generation == sc->sc_generation) {
7587 sc->sc_flags &= ~IWX_FLAG_MAC_ACTIVE;
7595 struct ieee80211com *ic = &sc->sc_ic;
7596 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
7597 struct iwx_node *in = IWX_NODE(vap->iv_bss);
7604 if (sc->sc_flags & IWX_FLAG_STA_ACTIVE) {
7608 sc->sc_flags &= ~IWX_FLAG_STA_ACTIVE;
7611 if (sc->sc_flags & IWX_FLAG_BINDING_ACTIVE) {
7618 sc->sc_flags &= ~IWX_FLAG_BINDING_ACTIVE;
7621 DPRINTF(("%s: IWX_FLAG_MAC_ACTIVE=%d\n", __func__, sc->sc_flags &
7623 if (sc->sc_flags & IWX_FLAG_MAC_ACTIVE) {
7630 sc->sc_flags &= ~IWX_FLAG_MAC_ACTIVE;
7634 //TODO uncommented in obsd, but stays on the way of auth->auth
7635 err = iwx_phy_ctxt_update(sc, &sc->sc_phyctxt[0],
7636 &ic->ic_channels[1], 1, 1, 0, IEEE80211_HTOP0_SCO_SCN,
7647 struct ieee80211com *ic = &sc->sc_ic;
7648 struct iwx_node *in = IWX_NODE(vap->iv_bss);
7649 struct ieee80211_node *ni = &in->in_ni;
7655 if (ni->ni_flags & IEEE80211_NODE_HT) {
7659 if ((ni->ni_flags & IEEE80211_NODE_VHT) &&
7660 IEEE80211_IS_CHAN_VHT80(ni->ni_chan))
7664 err = iwx_phy_ctxt_update(sc, ivp->phy_ctxt,
7665 ivp->phy_ctxt->channel, chains, chains,
7728 if (ic->ic_opmode == IEEE80211_M_MONITOR)
7744 struct ieee80211com *ic = &sc->sc_ic;
7745 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
7746 struct iwx_node *in = IWX_NODE(vap->iv_bss);
7747 struct ieee80211_node *ni = &in->in_ni;
7763 * Note that in->in_ni (struct ieee80211_node) already represents
7769 for (i = 0; i < nitems(sc->sc_rxba_data); i++) {
7770 struct iwx_rxba_data *rxba = &sc->sc_rxba_data[i];
7771 if (rxba->baid == IWX_RX_REORDER_DATA_INVALID_BAID)
7773 iwx_sta_rx_agg(sc, ni, rxba->tid, 0, 0, 0, 0);
7809 struct iwx_softc *sc = ic->ic_softc;
7814 if (k->k_cipher != IEEE80211_CIPHER_CCMP) {
7817 if (!err && in != NULL && (k->k_flags & IEEE80211_KEY_GROUP))
7818 in->in_flags |= IWX_NODE_FLAG_HAVE_GROUP_KEY;
7822 if (sc->setkey_nkeys >= nitems(sc->setkey_arg))
7825 a = &sc->setkey_arg[sc->setkey_cur];
7826 a->sta_id = IWX_STATION_ID;
7827 a->ni = ni;
7828 a->k = k;
7829 sc->setkey_cur = (sc->setkey_cur + 1) % nitems(sc->setkey_arg);
7830 sc->setkey_nkeys++;
7831 iwx_add_task(sc, systq, &sc->setkey_task);
7839 struct ieee80211com *ic = &sc->sc_ic;
7850 * ic->ic_bss so there is no need to validate arguments beyond this:
7852 KASSERT(ni == ic->ic_bss);
7858 ((k->k_id << IWX_STA_KEY_FLG_KEYID_POS) &
7860 if (k->k_flags & IEEE80211_KEY_GROUP) {
7866 memcpy(cmd.common.key, k->k_key, MIN(sizeof(cmd.common.key), k->k_len));
7869 cmd.transmit_seq_cnt = htole64(k->k_tsc);
7874 if (sc->sc_flags & IWX_FLAG_SHUTDOWN)
7881 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
7885 if (k->k_flags & IEEE80211_KEY_GROUP)
7886 in->in_flags |= IWX_NODE_FLAG_HAVE_GROUP_KEY;
7888 in->in_flags |= IWX_NODE_FLAG_HAVE_PAIRWISE_KEY;
7890 if ((in->in_flags & want_keymask) == want_keymask) {
7892 ether_sprintf(ni->ni_macaddr)));
7893 ni->ni_port_valid = 1;
7907 while (sc->setkey_nkeys > 0) {
7908 if (err || (sc->sc_flags & IWX_FLAG_SHUTDOWN))
7910 a = &sc->setkey_arg[sc->setkey_tail];
7911 err = iwx_add_sta_key(sc, a->sta_id, a->ni, a->k);
7912 a->sta_id = 0;
7913 a->ni = NULL;
7914 a->k = NULL;
7915 sc->setkey_tail = (sc->setkey_tail + 1) %
7916 nitems(sc->setkey_arg);
7917 sc->setkey_nkeys--;
7920 refcnt_rele_wake(&sc->task_refs);
7928 struct iwx_softc *sc = ic->ic_softc;
7931 if (k->k_cipher != IEEE80211_CIPHER_CCMP) {
7937 if ((sc->sc_flags & IWX_FLAG_STA_ACTIVE) == 0)
7944 ((k->k_id << IWX_STA_KEY_FLG_KEYID_POS) &
7946 memcpy(cmd.common.key, k->k_key, MIN(sizeof(cmd.common.key), k->k_len));
7947 if (k->k_flags & IEEE80211_KEY_GROUP)
7960 struct ieee80211com *ic = vap->iv_ic;
7961 struct iwx_softc *sc = ic->ic_softc;
7962 enum ieee80211_state ostate = vap->iv_state;
7989 // if (sc->sc_flags & IWX_FLAG_SHUTDOWN) {
7990 // refcnt_rele_wake(&sc->task_refs);
8027 struct ieee80211com *ic = vap->iv_ic;
8028 enum ieee80211_state ostate = vap->iv_state;
8033 * we are scanning in which case a SCAN -> SCAN transition
8034 * triggers another scan iteration. And AUTH -> AUTH is needed
8035 * to support band-steering.
8044 err = ivp->iv_newstate(vap, nstate, arg);
8052 struct ieee80211com *ic = &sc->sc_ic;
8053 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8055 if ((sc->sc_flags & (IWX_FLAG_SCANNING | IWX_FLAG_BGSCAN)) == 0)
8058 sc->sc_flags &= ~(IWX_FLAG_SCANNING | IWX_FLAG_BGSCAN);
8060 ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps));
8061 wakeup(&vap->iv_state); /* wake up iwx_newstate */
8126 sf_cmd->watermark[IWX_SF_LONG_DELAY_ON] = htole32(IWX_SF_W_MARK_SCAN);
8129 * If we are in association flow - check antenna configuration
8133 if (ni->ni_flags & IEEE80211_NODE_HT) {
8134 struct ieee80211_htrateset *htrs = &ni->ni_htrates;
8136 for (i = 0; i < htrs->rs_nrates; i++) {
8137 if (htrs->rs_rates[i] > 7) {
8153 sf_cmd->watermark[IWX_SF_FULL_ON] = htole32(watermark);
8157 sf_cmd->long_delay_timeouts[i][j] =
8163 memcpy(sf_cmd->full_on_timeouts, iwx_sf_full_timeout,
8166 memcpy(sf_cmd->full_on_timeouts, iwx_sf_full_timeout_def,
8175 struct ieee80211com *ic = &sc->sc_ic;
8176 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8177 struct ieee80211_node *ni = vap->iv_bss;
8228 * values in VER_1, this is backwards-compatible with VER_2,
8231 if (!sc->sc_integrated) { /* VER_1 */
8235 if (sc->sc_ltr_delay != IWX_SOC_FLAGS_LTR_APPLY_DELAY_NONE)
8236 flags |= (sc->sc_ltr_delay &
8241 scan_cmd_ver >= 2 && sc->sc_low_latency_xtal)
8246 cmd.latency = htole32(sc->sc_xtal_latency);
8271 if (isset(sc->sc_ucode_api, IWX_UCODE_TLV_API_WIFI_MCC_UPDATE) ||
8272 isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_LAR_MULTI_MCC))
8285 if (!pkt || (pkt->hdr.flags & IWX_CMD_FAILED_MSK)) {
8296 resp = (void *)pkt->data;
8298 resp->n_channels * sizeof(resp->channels[0])) {
8304 …resp->status, resp->mcc, resp->cap, resp->time, resp->geo_info, resp->source_id, resp->n_channels)…
8319 * In order to give responsibility for critical-temperature-kill
8338 struct ieee80211com *ic = &sc->sc_ic;
8355 if (sc->sc_tx_with_siso_diversity) {
8377 if (isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_DQA_SUPPORT)) {
8393 sc->sc_phyctxt[i].id = i;
8394 sc->sc_phyctxt[i].channel = &ic->ic_channels[1];
8395 err = iwx_phy_ctxt_cmd(sc, &sc->sc_phyctxt[i], 1, 1,
8404 err = iwx_phy_send_rlc(sc, &sc->sc_phyctxt[i], 1, 1);
8419 if (isset(sc->sc_enabled_capa, IWX_UCODE_TLV_CAPA_CT_KILL_BY_FW)) {
8435 if (sc->sc_nvm.lar_enabled) {
8467 struct ieee80211com *ic = &sc->sc_ic;
8468 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8469 struct iwx_node *in = IWX_NODE(vap->iv_bss);
8478 cmd->filter_own = 1;
8479 cmd->port_id = 0;
8480 cmd->count = 0;
8481 cmd->pass_all = 1;
8482 IEEE80211_ADDR_COPY(cmd->bssid, in->in_macaddr);
8494 generation = ++sc->sc_generation;
8505 if (generation == sc->sc_generation)
8511 sc->sc_flags |= IWX_FLAG_HW_INITED;
8512 callout_reset(&sc->watchdog_to, hz, iwx_watchdog, sc);
8523 while (sc->qfullmsk == 0 && (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
8524 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
8526 if_inc_counter(ni->ni_vap->iv_ifp, IFCOUNTER_OERRORS, 1);
8535 struct ieee80211com *ic = &sc->sc_ic;
8536 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8542 sc->sc_generation++;
8543 ivp->phy_ctxt = NULL;
8545 sc->sc_flags &= ~(IWX_FLAG_SCANNING | IWX_FLAG_BGSCAN);
8546 sc->sc_flags &= ~IWX_FLAG_MAC_ACTIVE;
8547 sc->sc_flags &= ~IWX_FLAG_BINDING_ACTIVE;
8548 sc->sc_flags &= ~IWX_FLAG_STA_ACTIVE;
8549 sc->sc_flags &= ~IWX_FLAG_TE_ACTIVE;
8550 sc->sc_flags &= ~IWX_FLAG_HW_ERR;
8551 sc->sc_flags &= ~IWX_FLAG_SHUTDOWN;
8552 sc->sc_flags &= ~IWX_FLAG_TXFLUSH;
8554 sc->sc_rx_ba_sessions = 0;
8555 sc->ba_rx.start_tidmask = 0;
8556 sc->ba_rx.stop_tidmask = 0;
8557 memset(sc->aggqid, 0, sizeof(sc->aggqid));
8558 sc->ba_tx.start_tidmask = 0;
8559 sc->ba_tx.stop_tidmask = 0;
8566 struct ieee80211com *ic = &sc->sc_ic;
8574 for (i = 0; i < nitems(sc->sc_tx_timer); i++) {
8575 if (sc->sc_tx_timer[i] > 0) {
8576 if (--sc->sc_tx_timer[i] == 0) {
8586 callout_reset(&sc->watchdog_to, hz, iwx_watchdog, sc);
8592 * read with uint32_t-sized accesses, any members with a different size
8603 uint32_t data1; /* error-specific data */
8604 uint32_t data2; /* error-specific data */
8605 uint32_t data3; /* error-specific data */
8644 * UMAC error struct - relevant starting from family 8000 chip.
8647 * read with u32-sized accesses, any members with a different size
8657 uint32_t data1; /* error-specific data */
8658 uint32_t data2; /* error-specific data */
8659 uint32_t data3; /* error-specific data */
8677 base = sc->sc_uc.uc_umac_error_event_table;
8693 sc->sc_flags, table.valid);
8748 for (i = 0; i < nitems(advanced_lookup) - 1; i++)
8771 printf("%s: GOS-3758: 1\n", __func__);
8772 base = sc->sc_uc.uc_lmac_error_event_table[0];
8773 printf("%s: GOS-3758: 2\n", __func__);
8780 printf("%s: GOS-3758: 3\n", __func__);
8786 printf("%s: GOS-3758: 4\n", __func__);
8792 printf("%s: GOS-3758: 5\n", __func__);
8796 sc->sc_flags, table.valid);
8799 printf("%s: GOS-3758: 6\n", __func__);
8800 printf("%s: 0x%08X | %-28s\n", DEVNAME(sc), table.error_id,
8841 if (sc->sc_uc.uc_umac_error_event_table)
8848 struct ieee80211com *ic = &sc->sc_ic;
8849 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
8850 enum ieee80211_state state = vap->iv_state;
8854 for (i = 0; i < nitems(sc->txq); i++) {
8855 struct iwx_tx_ring *ring = &sc->txq[i];
8856 printf(" tx ring %2d: qid=%-2d cur=%-3d "
8857 "cur_hw=%-3d queued=%-3d\n",
8858 i, ring->qid, ring->cur, ring->cur_hw,
8859 ring->queued);
8861 printf(" rx ring: cur=%d\n", sc->rxq.cur);
8867 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD); \
8876 qid = pkt->hdr.qid & ~0x80;
8877 idx = pkt->hdr.idx;
8878 code = IWX_WIDE_ID(pkt->hdr.flags, pkt->hdr.code);
8881 pkt->len_n_flags != htole32(IWX_FH_RSCSR_FRAME_INVALID));
8887 struct ieee80211com *ic = &sc->sc_ic;
8891 const size_t minsz = sizeof(pkt->len_n_flags) + sizeof(pkt->hdr);
8894 m0 = data->m;
8896 pkt = (struct iwx_rx_packet *)(m0->m_data + offset);
8897 qid = pkt->hdr.qid;
8898 idx = pkt->hdr.idx;
8899 code = IWX_WIDE_ID(pkt->hdr.flags, pkt->hdr.code);
8911 struct iwx_tx_ring *ring = &sc->txq[qid];
8912 struct iwx_tx_data *txdata = &ring->data[idx];
8913 if (txdata->flags & IWX_TXDATA_FLAG_CMD_IS_NARROW)
8917 len = sizeof(pkt->len_n_flags) + iwx_rx_packet_len(pkt);
8918 if (len < minsz || len > (IWX_RBUF_SIZE - offset))
8924 if (iwx_rx_addbuf(sc, IWX_RBUF_SIZE, sc->rxq.cur)) {
8927 KASSERT((data->m != m0), ("%s: data->m != m0", __func__));
8932 /* XXX-THJ: I've not managed to hit this path in testing */
8937 size_t maxlen = IWX_RBUF_SIZE - offset - minsz;
8941 (m0->m_data + nextoff);
8943 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210 ||
8949 iwx_rx_mpdu_mq(sc, m0, pkt->data, maxlen);
8964 iwx_rx_mpdu_mq(sc, m, pkt->data, maxlen);
8997 sc->sc_uc.uc_ok = 0;
9008 sc->sc_uc.uc_intr = 1;
9009 wakeup(&sc->sc_uc);
9012 sc->sc_uc.uc_lmac_error_event_table[0] = le32toh(
9013 resp6->lmac_data[0].dbg_ptrs.error_event_table_ptr);
9014 sc->sc_uc.uc_lmac_error_event_table[1] = le32toh(
9015 resp6->lmac_data[1].dbg_ptrs.error_event_table_ptr);
9016 sc->sc_uc.uc_log_event_table = le32toh(
9017 resp6->lmac_data[0].dbg_ptrs.log_event_table_ptr);
9018 sc->sc_uc.uc_umac_error_event_table = le32toh(
9019 resp6->umac_data.dbg_ptrs.error_info_addr);
9020 sc->sc_sku_id[0] =
9021 le32toh(resp6->sku_id.data[0]);
9022 sc->sc_sku_id[1] =
9023 le32toh(resp6->sku_id.data[1]);
9024 sc->sc_sku_id[2] =
9025 le32toh(resp6->sku_id.data[2]);
9026 if (resp6->status == IWX_ALIVE_STATUS_OK) {
9027 sc->sc_uc.uc_ok = 1;
9034 sc->sc_uc.uc_intr = 1;
9035 wakeup(&sc->sc_uc);
9038 sc->sc_uc.uc_lmac_error_event_table[0] = le32toh(
9039 resp5->lmac_data[0].dbg_ptrs.error_event_table_ptr);
9040 sc->sc_uc.uc_lmac_error_event_table[1] = le32toh(
9041 resp5->lmac_data[1].dbg_ptrs.error_event_table_ptr);
9042 sc->sc_uc.uc_log_event_table = le32toh(
9043 resp5->lmac_data[0].dbg_ptrs.log_event_table_ptr);
9044 sc->sc_uc.uc_umac_error_event_table = le32toh(
9045 resp5->umac_data.dbg_ptrs.error_info_addr);
9046 sc->sc_sku_id[0] =
9047 le32toh(resp5->sku_id.data[0]);
9048 sc->sc_sku_id[1] =
9049 le32toh(resp5->sku_id.data[1]);
9050 sc->sc_sku_id[2] =
9051 le32toh(resp5->sku_id.data[2]);
9052 if (resp5->status == IWX_ALIVE_STATUS_OK)
9053 sc->sc_uc.uc_ok = 1;
9056 sc->sc_uc.uc_lmac_error_event_table[0] = le32toh(
9057 resp4->lmac_data[0].dbg_ptrs.error_event_table_ptr);
9058 sc->sc_uc.uc_lmac_error_event_table[1] = le32toh(
9059 resp4->lmac_data[1].dbg_ptrs.error_event_table_ptr);
9060 sc->sc_uc.uc_log_event_table = le32toh(
9061 resp4->lmac_data[0].dbg_ptrs.log_event_table_ptr);
9062 sc->sc_uc.uc_umac_error_event_table = le32toh(
9063 resp4->umac_data.dbg_ptrs.error_info_addr);
9064 if (resp4->status == IWX_ALIVE_STATUS_OK)
9065 sc->sc_uc.uc_ok = 1;
9069 sc->sc_uc.uc_intr = 1;
9070 wakeup(&sc->sc_uc);
9077 memcpy(&sc->sc_stats, stats, sizeof(sc->sc_stats));
9078 sc->sc_noise = iwx_get_noise(&stats->rx.general);
9095 DEVNAME(sc), le16toh(notif->temperature));
9096 sc->sc_flags |= IWX_FLAG_HW_ERR;
9134 if (sc->sc_cmd_resp_pkt[idx] == NULL)
9137 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
9140 pkt_len = sizeof(pkt->len_n_flags) +
9143 if ((pkt->hdr.flags & IWX_CMD_FAILED_MSK) ||
9145 pkt_len > sc->sc_cmd_resp_len[idx]) {
9146 free(sc->sc_cmd_resp_pkt[idx], M_DEVBUF);
9147 sc->sc_cmd_resp_pkt[idx] = NULL;
9151 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
9153 memcpy(sc->sc_cmd_resp_pkt[idx], pkt, pkt_len);
9158 sc->sc_init_complete |= IWX_INIT_COMPLETE;
9159 wakeup(&sc->sc_init_complete);
9166 DPRINTF(("%s: scan complete notif->status=%d\n", __func__,
9167 notif->status));
9168 ieee80211_runtask(&sc->sc_ic, &sc->sc_es_task);
9178 DPRINTF(("%s: iter scan complete notif->status=%d\n", __func__,
9179 notif->status));
9195 DEVNAME(sc), le32toh(resp->error_type),
9196 resp->cmd_id);
9205 if (sc->sc_time_event_uid != le32toh(notif->unique_id))
9207 action = le32toh(notif->action);
9209 sc->sc_flags &= ~IWX_FLAG_TE_ACTIVE;
9220 status = le32toh(notif->status);
9221 start = le32toh(notif->start);
9222 conf_id = le32toh(notif->conf_id);
9226 sc->sc_flags &= ~IWX_FLAG_TE_ACTIVE;
9276 /* undocumented notification from iwx-ty-a0-gf-a0-77 image */
9283 sc->sc_init_complete |= IWX_PNVM_COMPLETE;
9284 wakeup(&sc->sc_init_complete);
9289 /* XXX wulf: Get rid of bluetooth-related spam */
9290 if ((code == 0xc2 && pkt->len_n_flags == 0x0000000c) ||
9291 (code == 0xce && pkt->len_n_flags == 0x2000002c))
9295 DEVNAME(sc), code, pkt->len_n_flags,
9314 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210)
9318 if (m0 && m0 != data->m)
9328 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
9331 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) {
9332 uint16_t *status = sc->rxq.stat_dma.vaddr;
9335 hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;
9336 hw &= (IWX_RX_MQ_RING_COUNT - 1);
9337 while (sc->rxq.cur != hw) {
9338 struct iwx_rx_data *data = &sc->rxq.data[sc->rxq.cur];
9340 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
9344 sc->rxq.cur = (sc->rxq.cur + 1) % IWX_RX_MQ_RING_COUNT;
9351 hw = (hw == 0) ? IWX_RX_MQ_RING_COUNT - 1 : hw - 1;
9360 struct ieee80211com *ic = &sc->sc_ic;
9366 if (sc->sc_flags & IWX_FLAG_USE_ICT) {
9367 uint32_t *ict = sc->ict_dma.vaddr;
9370 tmp = htole32(ict[sc->ict_cur]);
9380 ict[sc->ict_cur] = 0;
9381 sc->ict_cur = (sc->ict_cur+1) % IWX_ICT_COUNT;
9382 tmp = htole32(ict[sc->ict_cur]);
9403 IWX_WRITE(sc, IWX_CSR_INT, r1 | ~sc->sc_intmask);
9410 iwx_update_rx_desc(sc, &sc->rxq, i);
9423 if (ifp->if_flags & IFF_DEBUG) {
9445 sc->sc_fw_chunk_done = 1;
9446 wakeup(&sc->sc_fw);
9458 /* Disable periodic interrupt; we use it as just a one-shot. */
9466 * to extend the periodic interrupt; one-shot is enough.
9488 struct ieee80211com *ic = &sc->sc_ic;
9498 inta_fh &= sc->sc_fh_mask;
9499 inta_hw &= sc->sc_hw_mask;
9508 sc->sc_fw_chunk_done = 1;
9509 wakeup(&sc->sc_fw);
9515 if (sc->sc_debug) {
9530 sc->sc_flags |= IWX_FLAG_HW_ERR;
9541 * XXX-THJ: we don't have the dma segment handy. This is hacked
9547 iwx_update_rx_desc(sc, &sc->rxq, i);
9556 * re-enabled by clearing this bit. This register is defined as
9567 * The device info table below contains device-specific config overrides.
9580 * in some work-in-progress state for quite a while. Linux commits moving
9590 * Some "old"-style entries are required to identify the firmware image to use.
9851 /* So-F with Hr */
9868 /* So-F with GF */
9930 struct ieee80211com *ic = &sc->sc_ic;
9939 if (sc->attached) {
9957 sc->attached = 1;
9958 if (sc->sc_pnvm_ver) {
9961 DEVNAME(sc), sc->sc_hw_rev & IWX_CSR_HW_REV_TYPE_MSK,
9962 sc->sc_fwver, sc->sc_pnvm_ver,
9963 ether_sprintf(sc->sc_nvm.hw_addr));
9966 DEVNAME(sc), sc->sc_hw_rev & IWX_CSR_HW_REV_TYPE_MSK,
9967 sc->sc_fwver, ether_sprintf(sc->sc_nvm.hw_addr));
9971 if (!sc->sc_nvm.sku_cap_band_52GHz_enable)
9972 memset(&ic->ic_sup_rates[IEEE80211_MODE_11A], 0,
9973 sizeof(ic->ic_sup_rates[IEEE80211_MODE_11A]));
9982 struct ieee80211com *ic = &sc->sc_ic;
9991 iwx_init_channel_map(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
9992 ic->ic_channels);
9995 ic->ic_vap_create = iwx_vap_create;
9996 ic->ic_vap_delete = iwx_vap_delete;
9997 ic->ic_raw_xmit = iwx_raw_xmit;
9998 ic->ic_node_alloc = iwx_node_alloc;
9999 ic->ic_scan_start = iwx_scan_start;
10000 ic->ic_scan_end = iwx_scan_end;
10001 ic->ic_update_mcast = iwx_update_mcast;
10002 ic->ic_getradiocaps = iwx_init_channel_map;
10004 ic->ic_set_channel = iwx_set_channel;
10005 ic->ic_scan_curchan = iwx_scan_curchan;
10006 ic->ic_scan_mindwell = iwx_scan_mindwell;
10007 ic->ic_wme.wme_update = iwx_wme_update;
10008 ic->ic_parent = iwx_parent;
10009 ic->ic_transmit = iwx_transmit;
10011 sc->sc_ampdu_rx_start = ic->ic_ampdu_rx_start;
10012 ic->ic_ampdu_rx_start = iwx_ampdu_rx_start;
10013 sc->sc_ampdu_rx_stop = ic->ic_ampdu_rx_stop;
10014 ic->ic_ampdu_rx_stop = iwx_ampdu_rx_stop;
10016 sc->sc_addba_request = ic->ic_addba_request;
10017 ic->ic_addba_request = iwx_addba_request;
10018 sc->sc_addba_response = ic->ic_addba_response;
10019 ic->ic_addba_response = iwx_addba_response;
10024 config_intrhook_disestablish(&sc->sc_preinit_hook);
10034 sdev_id = pci_get_subdevice(sc->sc_dev);
10035 mac_type = IWX_CSR_HW_REV_TYPE(sc->sc_hw_rev);
10036 mac_step = IWX_CSR_HW_REV_STEP(sc->sc_hw_rev << 2);
10037 rf_type = IWX_CSR_HW_RFID_TYPE(sc->sc_hw_rf_id);
10038 cdb = IWX_CSR_HW_RFID_IS_CDB(sc->sc_hw_rf_id);
10039 jacket = IWX_CSR_HW_RFID_IS_JACKET(sc->sc_hw_rf_id);
10045 for (i = nitems(iwx_dev_info_table) - 1; i >= 0; i--) {
10048 if (dev_info->device != (uint16_t)IWX_CFG_ANY &&
10049 dev_info->device != sc->sc_pid)
10052 if (dev_info->subdevice != (uint16_t)IWX_CFG_ANY &&
10053 dev_info->subdevice != sdev_id)
10056 if (dev_info->mac_type != (uint16_t)IWX_CFG_ANY &&
10057 dev_info->mac_type != mac_type)
10060 if (dev_info->mac_step != (uint8_t)IWX_CFG_ANY &&
10061 dev_info->mac_step != mac_step)
10064 if (dev_info->rf_type != (uint16_t)IWX_CFG_ANY &&
10065 dev_info->rf_type != rf_type)
10068 if (dev_info->cdb != (uint8_t)IWX_CFG_ANY &&
10069 dev_info->cdb != cdb)
10072 if (dev_info->jacket != (uint8_t)IWX_CFG_ANY &&
10073 dev_info->jacket != jacket)
10076 if (dev_info->rf_id != (uint8_t)IWX_CFG_ANY &&
10077 dev_info->rf_id != rf_id)
10080 if (dev_info->no_160 != (uint8_t)IWX_CFG_ANY &&
10081 dev_info->no_160 != no_160)
10084 if (dev_info->cores != (uint8_t)IWX_CFG_ANY &&
10085 dev_info->cores != cores)
10088 return dev_info->cfg;
10125 struct ieee80211com *ic = &sc->sc_ic;
10133 sc->sc_dev = dev;
10134 sc->sc_pid = pci_get_device(dev);
10135 sc->sc_dmat = bus_get_dma_tag(sc->sc_dev);
10137 TASK_INIT(&sc->sc_es_task, 0, iwx_endscan_cb, sc);
10139 mbufq_init(&sc->sc_snd, ifqmaxlen);
10140 TASK_INIT(&sc->ba_rx_task, 0, iwx_ba_rx_task, sc);
10141 TASK_INIT(&sc->ba_tx_task, 0, iwx_ba_tx_task, sc);
10142 sc->sc_tq = taskqueue_create("iwm_taskq", M_WAITOK,
10143 taskqueue_thread_enqueue, &sc->sc_tq);
10144 error = taskqueue_start_threads(&sc->sc_tq, 1, 0, "iwm_taskq");
10151 pci_find_cap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
10152 if (sc->sc_cap_off == 0) {
10164 sc->sc_msix = 1;
10166 device_printf(dev, "no MSI-X found\n");
10172 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
10174 if (sc->sc_mem == NULL) {
10175 device_printf(sc->sc_dev, "can't map mem space\n");
10178 sc->sc_st = rman_get_bustag(sc->sc_mem);
10179 sc->sc_sh = rman_get_bushandle(sc->sc_mem);
10186 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
10188 if (sc->sc_irq == NULL) {
10192 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE,
10193 NULL, iwx_intr_msix, sc, &sc->sc_ih);
10204 sc->sc_hw_rev = IWX_READ(sc, IWX_CSR_HW_REV);
10205 DPRINTF(("%s: sc->sc_hw_rev=%d\n", __func__, sc->sc_hw_rev));
10206 sc->sc_hw_rf_id = IWX_READ(sc, IWX_CSR_HW_RF_ID);
10207 DPRINTF(("%s: sc->sc_hw_rf_id =%d\n", __func__, sc->sc_hw_rf_id));
10211 * changed, and now the revision step also includes bit 0-1 (no more
10212 * "dash" value). To keep hw_rev backwards compatible - we'll store it
10215 sc->sc_hw_rev = (sc->sc_hw_rev & 0xfff0) |
10216 (IWX_CSR_HW_REV_STEP(sc->sc_hw_rev << 2) << 2);
10218 switch (sc->sc_pid) {
10220 sc->sc_fwname = IWX_CC_A_FW;
10221 sc->sc_device_family = IWX_DEVICE_FAMILY_22000;
10222 sc->sc_integrated = 0;
10223 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_NONE;
10224 sc->sc_low_latency_xtal = 0;
10225 sc->sc_xtal_latency = 0;
10226 sc->sc_tx_with_siso_diversity = 0;
10227 sc->sc_uhb_supported = 0;
10232 if (sc->sc_hw_rev != IWX_CSR_HW_REV_TYPE_QUZ) {
10236 sc->sc_fwname = IWX_QUZ_A_HR_B_FW;
10237 sc->sc_device_family = IWX_DEVICE_FAMILY_22000;
10238 sc->sc_integrated = 1;
10239 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_200;
10240 sc->sc_low_latency_xtal = 0;
10241 sc->sc_xtal_latency = 500;
10242 sc->sc_tx_with_siso_diversity = 0;
10243 sc->sc_uhb_supported = 0;
10246 if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QU_C0)
10247 sc->sc_fwname = IWX_QU_C_HR_B_FW;
10248 else if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QUZ)
10249 sc->sc_fwname = IWX_QUZ_A_HR_B_FW;
10251 sc->sc_fwname = IWX_QU_B_HR_B_FW;
10252 sc->sc_device_family = IWX_DEVICE_FAMILY_22000;
10253 sc->sc_integrated = 1;
10254 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_200;
10255 sc->sc_low_latency_xtal = 0;
10256 sc->sc_xtal_latency = 500;
10257 sc->sc_tx_with_siso_diversity = 0;
10258 sc->sc_uhb_supported = 0;
10263 if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QU_C0)
10264 sc->sc_fwname = IWX_QU_C_HR_B_FW;
10265 else if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QUZ)
10266 sc->sc_fwname = IWX_QUZ_A_HR_B_FW;
10268 sc->sc_fwname = IWX_QU_B_HR_B_FW;
10269 sc->sc_device_family = IWX_DEVICE_FAMILY_22000;
10270 sc->sc_integrated = 1;
10271 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_1820;
10272 sc->sc_low_latency_xtal = 0;
10273 sc->sc_xtal_latency = 1820;
10274 sc->sc_tx_with_siso_diversity = 0;
10275 sc->sc_uhb_supported = 0;
10278 if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QU_C0)
10279 sc->sc_fwname = IWX_QU_C_HR_B_FW;
10280 else if (sc->sc_hw_rev == IWX_CSR_HW_REV_TYPE_QUZ)
10281 sc->sc_fwname = IWX_QUZ_A_HR_B_FW;
10283 sc->sc_fwname = IWX_QU_B_HR_B_FW;
10284 sc->sc_device_family = IWX_DEVICE_FAMILY_22000;
10285 sc->sc_integrated = 1;
10286 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_2500;
10287 sc->sc_low_latency_xtal = 1;
10288 sc->sc_xtal_latency = 12000;
10289 sc->sc_tx_with_siso_diversity = 0;
10290 sc->sc_uhb_supported = 0;
10299 sc->sc_fwname = IWX_SO_A_GF_A_FW;
10300 sc->sc_pnvm_name = IWX_SO_A_GF_A_PNVM;
10301 sc->sc_device_family = IWX_DEVICE_FAMILY_AX210;
10302 sc->sc_integrated = 0;
10303 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_NONE;
10304 sc->sc_low_latency_xtal = 0;
10305 sc->sc_xtal_latency = 0;
10306 sc->sc_tx_with_siso_diversity = 0;
10307 sc->sc_uhb_supported = 1;
10311 sc->sc_fwname = IWX_SO_A_GF_A_FW;
10312 sc->sc_pnvm_name = IWX_SO_A_GF_A_PNVM;
10313 sc->sc_device_family = IWX_DEVICE_FAMILY_AX210;
10314 sc->sc_integrated = 1;
10315 sc->sc_ltr_delay = IWX_SOC_FLAGS_LTR_APPLY_DELAY_2500;
10316 sc->sc_low_latency_xtal = 1;
10317 sc->sc_xtal_latency = 12000;
10318 sc->sc_tx_with_siso_diversity = 0;
10319 sc->sc_uhb_supported = 0;
10320 sc->sc_imr_enabled = 1;
10330 sc->sc_fwname = cfg->fw_name;
10331 sc->sc_pnvm_name = cfg->pnvm_name;
10332 sc->sc_tx_with_siso_diversity = cfg->tx_with_siso_diversity;
10333 sc->sc_uhb_supported = cfg->uhb_supported;
10334 if (cfg->xtal_latency) {
10335 sc->sc_xtal_latency = cfg->xtal_latency;
10336 sc->sc_low_latency_xtal = cfg->low_latency_xtal;
10340 sc->mac_addr_from_csr = 0x380; /* differs on BZ hw generation */
10342 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) {
10343 sc->sc_umac_prph_offset = 0x300000;
10344 sc->max_tfd_queue_size = IWX_TFD_QUEUE_SIZE_MAX_GEN3;
10346 sc->max_tfd_queue_size = IWX_TFD_QUEUE_SIZE_MAX;
10348 /* Allocate DMA memory for loading firmware. */
10349 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210)
10353 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->ctxt_info_dma,
10361 if (sc->sc_device_family >= IWX_DEVICE_FAMILY_AX210) {
10362 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->prph_scratch_dma,
10373 * some dummy TR/CR tail pointers - which shouldn't be
10380 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->prph_info_dma,
10390 err = iwx_dma_contig_alloc(sc->sc_dmat, &sc->ict_dma,
10397 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++) {
10398 err = iwx_alloc_tx_ring(sc, &sc->txq[txq_i], txq_i);
10406 err = iwx_alloc_rx_ring(sc, &sc->rxq);
10408 device_printf(sc->sc_dev, "could not allocate RX ring\n");
10415 CTLFLAG_RWTUN, &sc->sc_debug, 0, "bitmask to control debugging");
10426 CTLFLAG_RD, &sc->qfullmsk, 0, "queue fullmask");
10430 CTLFLAG_RD, &sc->txq[0].queued, 0, "queue 0");
10433 CTLFLAG_RD, &sc->txq[1].queued, 0, "queue 1");
10436 CTLFLAG_RD, &sc->txq[2].queued, 0, "queue 2");
10439 CTLFLAG_RD, &sc->txq[3].queued, 0, "queue 3");
10442 CTLFLAG_RD, &sc->txq[4].queued, 0, "queue 4");
10445 CTLFLAG_RD, &sc->txq[5].queued, 0, "queue 5");
10448 CTLFLAG_RD, &sc->txq[6].queued, 0, "queue 6");
10451 CTLFLAG_RD, &sc->txq[7].queued, 0, "queue 7");
10453 ic->ic_softc = sc;
10454 ic->ic_name = device_get_nameunit(sc->sc_dev);
10455 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
10456 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
10459 ic->ic_caps =
10469 ic->ic_flags_ext = IEEE80211_FEXT_SCAN_OFFLOAD;
10471 ic->ic_txstream = 2;
10472 ic->ic_rxstream = 2;
10473 ic->ic_htcaps |= IEEE80211_HTC_HT
10478 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
10480 | IEEE80211_HTCAP_MAXAMSDU_3839; /* max A-MSDU length */
10482 ic->ic_cryptocaps |= IEEE80211_CRYPTO_AES_CCM;
10485 * XXX: setupcurchan() expects vhtcaps to be non-zero
10488 ic->ic_vht_cap.vht_cap_info |= IEEE80211_VHTCAP_MAX_MPDU_LENGTH_3895
10494 ic->ic_flags_ext |= IEEE80211_FEXT_VHT;
10503 ic->ic_vht_cap.supp_mcs.tx_mcs_map = htole16(mcsmap);
10504 ic->ic_vht_cap.supp_mcs.rx_mcs_map = htole16(mcsmap);
10506 callout_init_mtx(&sc->watchdog_to, &sc->sc_mtx, 0);
10507 for (i = 0; i < nitems(sc->sc_rxba_data); i++) {
10508 struct iwx_rxba_data *rxba = &sc->sc_rxba_data[i];
10509 rxba->baid = IWX_RX_REORDER_DATA_INVALID_BAID;
10510 rxba->sc = sc;
10511 for (j = 0; j < nitems(rxba->entries); j++)
10512 mbufq_init(&rxba->entries[j].frames, ifqmaxlen);
10515 sc->sc_preinit_hook.ich_func = iwx_attach_hook;
10516 sc->sc_preinit_hook.ich_arg = sc;
10517 if (config_intrhook_establish(&sc->sc_preinit_hook) != 0) {
10526 while (--txq_i >= 0)
10527 iwx_free_tx_ring(sc, &sc->txq[txq_i]);
10528 iwx_free_rx_ring(sc, &sc->rxq);
10529 if (sc->ict_dma.vaddr != NULL)
10530 iwx_dma_contig_free(&sc->ict_dma);
10533 iwx_dma_contig_free(&sc->ctxt_info_dma);
10534 iwx_dma_contig_free(&sc->prph_scratch_dma);
10535 iwx_dma_contig_free(&sc->prph_info_dma);
10547 taskqueue_drain_all(sc->sc_tq);
10548 taskqueue_free(sc->sc_tq);
10550 ieee80211_ifdetach(&sc->sc_ic);
10552 callout_drain(&sc->watchdog_to);
10554 for (txq_i = 0; txq_i < nitems(sc->txq); txq_i++)
10555 iwx_free_tx_ring(sc, &sc->txq[txq_i]);
10556 iwx_free_rx_ring(sc, &sc->rxq);
10558 if (sc->sc_fwp != NULL) {
10559 firmware_put(sc->sc_fwp, FIRMWARE_UNLOAD);
10560 sc->sc_fwp = NULL;
10563 if (sc->sc_pnvm != NULL) {
10564 firmware_put(sc->sc_pnvm, FIRMWARE_UNLOAD);
10565 sc->sc_pnvm = NULL;
10568 if (sc->sc_irq != NULL) {
10569 bus_teardown_intr(dev, sc->sc_irq, sc->sc_ih);
10571 rman_get_rid(sc->sc_irq), sc->sc_irq);
10574 if (sc->sc_mem != NULL)
10576 rman_get_rid(sc->sc_mem), sc->sc_mem);
10586 struct ieee80211com *ic = &sc->sc_ic;
10589 "->%s begin\n", __func__);
10592 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
10594 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
10598 "->%s end\n", __func__);
10610 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
10613 vap = &ivp->iv_vap;
10615 vap->iv_bmissthreshold = 10; /* override default */
10617 ivp->iv_newstate = vap->iv_newstate;
10618 vap->iv_newstate = iwx_newstate;
10620 ivp->id = IWX_DEFAULT_MACID;
10621 ivp->color = IWX_DEFAULT_COLOR;
10623 ivp->have_wme = TRUE;
10624 ivp->ps_disabled = FALSE;
10626 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K;
10627 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_4;
10630 vap->iv_key_alloc = iwx_key_alloc;
10631 vap->iv_key_delete = iwx_key_delete;
10632 vap->iv_key_set = iwx_key_set;
10633 vap->iv_key_update_begin = iwx_key_update_begin;
10634 vap->iv_key_update_end = iwx_key_update_end;
10640 ic->ic_opmode = opmode;
10658 struct iwx_softc *sc = ic->ic_softc;
10661 if (sc->sc_flags & IWX_FLAG_HW_INITED) {
10663 sc->sc_flags &= ~IWX_FLAG_HW_INITED;
10675 struct ieee80211com *ic = &sc->sc_ic;
10677 if (sc->sc_flags & IWX_FLAG_HW_INITED) {
10681 sc->sc_flags &= ~IWX_FLAG_HW_INITED;
10690 struct ieee80211com *ic = &sc->sc_ic;
10717 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
10718 struct iwx_softc *sc = ic->ic_softc;
10722 if ((ic->ic_flags_ext & IEEE80211_FEXT_BGSCAN) == 0)
10751 iwx_endscan(ic->ic_softc);
10758 struct iwx_softc *sc = ic->ic_softc;
10759 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
10770 struct ieee80211com *ic = &sc->sc_ic;
10773 ieee80211_scan_done(TAILQ_FIRST(&ic->ic_vaps));
10786 struct ieee80211com *ic = ni->ni_ic;
10787 struct iwx_softc *sc = ic->ic_softc;
10791 if (sc->sc_flags & IWX_FLAG_STA_ACTIVE) {
10804 struct iwx_softc *sc = ic->ic_softc;
10810 error = mbufq_enqueue(&sc->sc_snd, m);
10825 struct ieee80211com *ic = ni->ni_ic;
10826 struct iwx_softc *sc = ic->ic_softc;
10830 sc->ni_rx_ba[tid].ba_winstart =
10832 sc->ni_rx_ba[tid].ba_winsize =
10834 sc->ni_rx_ba[tid].ba_timeout_val = batimeout;
10836 if (sc->sc_rx_ba_sessions >= IWX_MAX_RX_BA_SESSIONS ||
10840 if (sc->ba_rx.start_tidmask & (1 << tid)) {
10844 DPRINTF(("%s: sc->ba_rx.start_tidmask=%x\n", __func__, sc->ba_rx.start_tidmask));
10846 sc->ba_rx.start_tidmask |= (1 << tid);
10848 DPRINTF(("%s: ba_winstart=%i\n", __func__, sc->ni_rx_ba[tid].ba_winstart));
10849 DPRINTF(("%s: ba_winsize=%i\n", __func__, sc->ni_rx_ba[tid].ba_winsize));
10850 DPRINTF(("%s: ba_timeout_val=%i\n", __func__, sc->ni_rx_ba[tid].ba_timeout_val));
10852 taskqueue_enqueue(sc->sc_tq, &sc->ba_rx_task);
10855 sc->sc_ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
10870 struct iwx_softc *sc = ni->ni_ic->ic_softc;
10875 sc->ba_tx.start_tidmask |= (1 << tid);
10876 taskqueue_enqueue(sc->sc_tq, &sc->ba_tx_task);
10905 if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_AES_CCM) {
10908 if (!(&vap->iv_nw_keys[0] <= k &&
10909 k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) {
10920 if (k->wk_flags & IEEE80211_KEY_GROUP)
10933 struct ieee80211com *ic = vap->iv_ic;
10934 struct iwx_softc *sc = ic->ic_softc;
10940 if (k->wk_cipher->ic_cipher != IEEE80211_CIPHER_AES_CCM) {
10948 * ic->ic_bss so there is no need to validate arguments beyond this:
10953 if (k->wk_flags & IEEE80211_KEY_GROUP) {
10958 if (k >= &vap->iv_nw_keys[0] &&
10959 k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])
10960 id = (k - vap->iv_nw_keys);
10968 if (k->wk_flags & IEEE80211_KEY_GROUP) {
10974 memcpy(cmd.common.key, k->wk_key, MIN(sizeof(cmd.common.key),
10975 k->wk_keylen));
10976 DPRINTF(("%s: wk_keylen=%i\n", __func__, k->wk_keylen));
10977 for (int i=0; i<k->wk_keylen; i++) {
10978 DPRINTF(("%s: key[%d]=%x\n", __func__, i, k->wk_key[i]));
10982 cmd.transmit_seq_cnt = htole64(k->wk_keytsc);
10983 DPRINTF(("%s: k->wk_keytsc=%lu\n", __func__, k->wk_keytsc));