xref: /freebsd/sys/contrib/device-tree/Bindings/dma/intel,ldma.yaml (revision cb7aa33ac6cd46a5434798e50363136e64f3ae98)
15def4c47SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
25def4c47SEmmanuel Vadot%YAML 1.2
35def4c47SEmmanuel Vadot---
45def4c47SEmmanuel Vadot$id: http://devicetree.org/schemas/dma/intel,ldma.yaml#
55def4c47SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
65def4c47SEmmanuel Vadot
75def4c47SEmmanuel Vadottitle: Lightning Mountain centralized DMA controllers.
85def4c47SEmmanuel Vadot
95def4c47SEmmanuel Vadotmaintainers:
105def4c47SEmmanuel Vadot  - chuanhua.lei@intel.com
115def4c47SEmmanuel Vadot  - mallikarjunax.reddy@intel.com
125def4c47SEmmanuel Vadot
135def4c47SEmmanuel VadotallOf:
14*cb7aa33aSEmmanuel Vadot  - $ref: dma-controller.yaml#
155def4c47SEmmanuel Vadot
165def4c47SEmmanuel Vadotproperties:
175def4c47SEmmanuel Vadot  compatible:
185def4c47SEmmanuel Vadot    enum:
195def4c47SEmmanuel Vadot      - intel,lgm-cdma
205def4c47SEmmanuel Vadot      - intel,lgm-dma2tx
215def4c47SEmmanuel Vadot      - intel,lgm-dma1rx
225def4c47SEmmanuel Vadot      - intel,lgm-dma1tx
235def4c47SEmmanuel Vadot      - intel,lgm-dma0tx
245def4c47SEmmanuel Vadot      - intel,lgm-dma3
255def4c47SEmmanuel Vadot      - intel,lgm-toe-dma30
265def4c47SEmmanuel Vadot      - intel,lgm-toe-dma31
275def4c47SEmmanuel Vadot
285def4c47SEmmanuel Vadot  reg:
295def4c47SEmmanuel Vadot    maxItems: 1
305def4c47SEmmanuel Vadot
315def4c47SEmmanuel Vadot  "#dma-cells":
325def4c47SEmmanuel Vadot    const: 3
335def4c47SEmmanuel Vadot    description:
345def4c47SEmmanuel Vadot      The first cell is the peripheral's DMA request line.
355def4c47SEmmanuel Vadot      The second cell is the peripheral's (port) number corresponding to the channel.
365def4c47SEmmanuel Vadot      The third cell is the burst length of the channel.
375def4c47SEmmanuel Vadot
385def4c47SEmmanuel Vadot  dma-channels:
395def4c47SEmmanuel Vadot    minimum: 1
405def4c47SEmmanuel Vadot    maximum: 16
415def4c47SEmmanuel Vadot
425def4c47SEmmanuel Vadot  dma-channel-mask:
435def4c47SEmmanuel Vadot    maxItems: 1
445def4c47SEmmanuel Vadot
455def4c47SEmmanuel Vadot  clocks:
465def4c47SEmmanuel Vadot    maxItems: 1
475def4c47SEmmanuel Vadot
485def4c47SEmmanuel Vadot  resets:
495def4c47SEmmanuel Vadot    maxItems: 1
505def4c47SEmmanuel Vadot
515def4c47SEmmanuel Vadot  reset-names:
525def4c47SEmmanuel Vadot    items:
535def4c47SEmmanuel Vadot      - const: ctrl
545def4c47SEmmanuel Vadot
555def4c47SEmmanuel Vadot  interrupts:
565def4c47SEmmanuel Vadot    maxItems: 1
575def4c47SEmmanuel Vadot
585def4c47SEmmanuel Vadot  intel,dma-poll-cnt:
595def4c47SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
605def4c47SEmmanuel Vadot    description:
615def4c47SEmmanuel Vadot      DMA descriptor polling counter is used to control the poling mechanism
625def4c47SEmmanuel Vadot      for the descriptor fetching for all channels.
635def4c47SEmmanuel Vadot
645def4c47SEmmanuel Vadot  intel,dma-byte-en:
655def4c47SEmmanuel Vadot    type: boolean
665def4c47SEmmanuel Vadot    description:
675def4c47SEmmanuel Vadot      DMA byte enable is only valid for DMA write(RX).
685def4c47SEmmanuel Vadot      Byte enable(1) means DMA write will be based on the number of dwords
695def4c47SEmmanuel Vadot      instead of the whole burst.
705def4c47SEmmanuel Vadot
715def4c47SEmmanuel Vadot  intel,dma-drb:
725def4c47SEmmanuel Vadot    type: boolean
735def4c47SEmmanuel Vadot    description:
745def4c47SEmmanuel Vadot      DMA descriptor read back to make sure data and desc synchronization.
755def4c47SEmmanuel Vadot
765def4c47SEmmanuel Vadot  intel,dma-dburst-wr:
775def4c47SEmmanuel Vadot    type: boolean
785def4c47SEmmanuel Vadot    description:
795def4c47SEmmanuel Vadot      Enable RX dynamic burst write. When it is enabled, the DMA does RX dynamic burst;
805def4c47SEmmanuel Vadot      if it is disabled, the DMA RX will still support programmable fixed burst size of 2,4,8,16.
815def4c47SEmmanuel Vadot      It only applies to RX DMA and memcopy DMA.
825def4c47SEmmanuel Vadot
835def4c47SEmmanuel Vadotrequired:
845def4c47SEmmanuel Vadot  - compatible
855def4c47SEmmanuel Vadot  - reg
865def4c47SEmmanuel Vadot
875def4c47SEmmanuel VadotadditionalProperties: false
885def4c47SEmmanuel Vadot
895def4c47SEmmanuel Vadotexamples:
905def4c47SEmmanuel Vadot  - |
915def4c47SEmmanuel Vadot    dma0: dma-controller@e0e00000 {
925def4c47SEmmanuel Vadot      compatible = "intel,lgm-cdma";
935def4c47SEmmanuel Vadot      reg = <0xe0e00000 0x1000>;
945def4c47SEmmanuel Vadot      #dma-cells = <3>;
955def4c47SEmmanuel Vadot      dma-channels = <16>;
965def4c47SEmmanuel Vadot      dma-channel-mask = <0xFFFF>;
975def4c47SEmmanuel Vadot      interrupt-parent = <&ioapic1>;
985def4c47SEmmanuel Vadot      interrupts = <82 1>;
995def4c47SEmmanuel Vadot      resets = <&rcu0 0x30 0>;
1005def4c47SEmmanuel Vadot      reset-names = "ctrl";
1015def4c47SEmmanuel Vadot      clocks = <&cgu0 80>;
1025def4c47SEmmanuel Vadot      intel,dma-poll-cnt = <4>;
1035def4c47SEmmanuel Vadot      intel,dma-byte-en;
1045def4c47SEmmanuel Vadot      intel,dma-drb;
1055def4c47SEmmanuel Vadot    };
1065def4c47SEmmanuel Vadot  - |
1075def4c47SEmmanuel Vadot    dma3: dma-controller@ec800000 {
1085def4c47SEmmanuel Vadot      compatible = "intel,lgm-dma3";
1095def4c47SEmmanuel Vadot      reg = <0xec800000 0x1000>;
1105def4c47SEmmanuel Vadot      clocks = <&cgu0 71>;
1115def4c47SEmmanuel Vadot      resets = <&rcu0 0x10 9>;
1125def4c47SEmmanuel Vadot      #dma-cells = <3>;
1135def4c47SEmmanuel Vadot      intel,dma-poll-cnt = <16>;
1145def4c47SEmmanuel Vadot      intel,dma-byte-en;
1155def4c47SEmmanuel Vadot      intel,dma-dburst-wr;
1165def4c47SEmmanuel Vadot    };
117