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/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dother.json3 "PublicDescription": "This event counts the occurrence count of the micro-operation split.",
4 "EventCode": "0x139",
6 "BriefDescription": "This event counts the occurrence count of the micro-operation split."
9 …"PublicDescription": "This event counts every cycle that no operation was committed because the ol…
10 "EventCode": "0x180",
12 …"BriefDescription": "This event counts every cycle that no operation was committed because the old…
15 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
16 "EventCode": "0x181",
18 …"BriefDescription": "This event counts every cycle that no instruction was committed because the o…
21 …"PublicDescription": "This event counts every cycle that no instruction was committed because the …
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A Dpipeline.json9 … operation issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empt…
10 "EventCode": "0xE1",
12 … operation issued due to the frontend, cache miss.This event counts every cycle the DPU IQ is empt…
15 …No operation issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empt…
16 "EventCode": "0xE2",
18 …No operation issued due to the frontend, TLB miss.This event counts every cycle the DPU IQ is empt…
21 …ion issued due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empty…
22 "EventCode": "0xE3",
24 …ion issued due to the frontend, pre-decode error.This event counts every cycle the DPU IQ is empty…
27 …"No operation issued due to the backend interlock.This event counts every cycle that issue is stal…
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json21 …operation issued due to the frontend, cache miss. This event counts every cycle that the Data Proc…
22 "EventCode": "0xE1",
24 …operation issued due to the frontend, cache miss. This event counts every cycle that the Data Proc…
27 …o operation issued due to the frontend, TLB miss. This event counts every cycle that the DPU instr…
28 "EventCode": "0xE2",
30 …o operation issued due to the frontend, TLB miss. This event counts every cycle that the DPU instr…
33 "PublicDescription": "No operation issued due to the frontend, pre-decode error",
34 "EventCode": "0xE3",
36 "BriefDescription": "No operation issued due to the frontend, pre-decode error"
39 …No operation issued due to the backend interlock. This event counts every cycle where the issue of…
[all …]
/linux/drivers/staging/vme_user/
H A Dvme_fake.c1 // SPDX-License-Identifier: GPL-2.0-or-later
49 u32 cycle; member
57 u32 cycle; member
99 bridge = fake_bridge->driver_priv; in fake_VIRQ_tasklet()
101 vme_irq_handler(fake_bridge, bridge->int_level, bridge->int_statid); in fake_VIRQ_tasklet()
132 bridge = fake_bridge->driver_priv; in fake_irq_generate()
134 mutex_lock(&bridge->vme_int); in fake_irq_generate()
136 bridge->int_level = level; in fake_irq_generate()
138 bridge->int_statid = statid; in fake_irq_generate()
144 tasklet_schedule(&bridge->int_tasklet); in fake_irq_generate()
[all …]
H A Dvme_tsi148.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Support for the Tundra TSI148 VME-PCI Bridge Chip
20 #include <linux/dma-mapping.h>
67 *low = (unsigned int)variable & 0xFFFFFFFF; in reg_split()
77 u32 serviced = 0; in tsi148_DMA_irqhandler()
80 wake_up(&bridge->dma_queue[0]); in tsi148_DMA_irqhandler()
84 wake_up(&bridge->dma_queue[1]); in tsi148_DMA_irqhandler()
97 u32 serviced = 0; in tsi148_LM_irqhandler()
99 for (i = 0; i < 4; i++) { in tsi148_LM_irqhandler()
102 bridge->lm_callback[i](bridge->lm_data[i]); in tsi148_LM_irqhandler()
[all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen3/
H A Dfloating-point.json4 "EventCode": "0x00",
6 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
7 "UMask": "0x0f"
11 "EventCode": "0x00",
13 … Each increment represents a one-cycle dispatch event. This event is a speculative event. Since th…
14 "UMask": "0x08"
18 "EventCode": "0x00",
20 … Each increment represents a one- cycle dispatch event. This event is a speculative event. Since t…
21 "UMask": "0x04"
25 "EventCode": "0x00",
[all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json4 "EventCode": "0x00",
5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
7 "UMask": "0xf0"
11 "EventCode": "0x00",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …-pipe uOps dispatched to each of the 4 FPU execution pipelines. This event reflects how busy the F…
14 "UMask": "0x80"
18 "EventCode": "0x00",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
[all …]
/linux/drivers/ata/
H A Dlibata-pata-timings.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
6 * Copyright 2003-2004 Jeff Garzik
15 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
18 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
19 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
26 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
27 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
28 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
29 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
[all …]
/linux/arch/alpha/lib/
H A Dev6-csum_ipv6_magic.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-csum_ipv6_magic.S
4 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
15 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
17 * E - either cluster
18 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
29 * Swap <proto> (takes form 0xaabb)
31 * 0xbbaa0000 00000000
32 * Then turn it back into a sign extended 32-bit item
[all …]
/linux/scripts/
H A Dheaderdep.pl2 # SPDX-License-Identifier: GPL-2.0
43 print "Usage: $0 [options] file...\n";
46 print " --all\n";
47 print " --graph\n";
49 print " -I includedir\n";
52 print " $0 --graph include/linux/kernel.h | dot -Tpng -o graph.png\n";
78 return $filename if -f $filename;
82 return $path if -f $path;
103 for my $i (0 .. $#lines) {
114 # $cycle[n] includes $cycle[n + 1];
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/linux/tools/testing/selftests/tc-testing/tc-tests/actions/
H A Dgate.json4 "name": "Add gate action with priority and sched-entry",
15 0,
20 … "cmdUnderTest": "$TC action add action gate priority 1 sched-entry close 100000000ns index 100",
21 "expExitCode": "0",
23 "matchPattern": "action order [0-9]*: .*priority 1.*index 100 ref",
31 "name": "Add gate action with base-time",
42 0,
47 …"cmdUnderTest": "$TC action add action gate base-time 200000000000ns sched-entry close 100000000ns…
48 "expExitCode": "0",
50 "matchPattern": "action order [0-9]*: .*base-time 200s.*index 10 ref",
[all …]
/linux/drivers/net/dsa/sja1105/
H A Dsja1105_tas.c1 // SPDX-License-Identifier: GPL-2.0
6 #define SJA1105_TAS_CLKSRC_DISABLED 0
10 #define SJA1105_GATE_MASK GENMASK_ULL(SJA1105_NUM_TC - 1, 0)
19 struct sja1105_tas_data *tas_data = &priv->tas_data; in sja1105_tas_set_runtime_params()
20 struct sja1105_gating_config *gating_cfg = &tas_data->gating_cfg; in sja1105_tas_set_runtime_params()
21 struct dsa_switch *ds = priv->ds; in sja1105_tas_set_runtime_params()
23 s64 latest_base_time = 0; in sja1105_tas_set_runtime_params()
24 s64 its_cycle_time = 0; in sja1105_tas_set_runtime_params()
25 s64 max_cycle_time = 0; in sja1105_tas_set_runtime_params()
28 tas_data->enabled = false; in sja1105_tas_set_runtime_params()
[all …]
/linux/Documentation/hwmon/
H A Ddme1737.rst10 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
18 Addresses scanned: none, address read from Super-I/O config space
26 Addresses scanned: I2C 0x2c, 0x2d, 0x2e
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
[all …]
/linux/drivers/pwm/
H A Dpwm-sl28cpld.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * enough to be briefly explained. It consists of one 8-bit counter. The PWM
14 * Let cnt[7:0] be the counter, clocked at 32kHz:
15 * +-----------+--------+--------------+-----------+---------------+
17 * +-----------+--------+--------------+-----------+---------------+
18 * | 0 | cnt[7] | cnt[6:0] | 250 Hz | 4000000 ns |
19 * | 1 | cnt[6] | cnt[5:0] | 500 Hz | 2000000 ns |
20 * | 2 | cnt[5] | cnt[4:0] | 1 kHz | 1000000 ns |
21 * | 3 | cnt[4] | cnt[3:0] | 2 kHz | 500000 ns |
22 * +-----------+--------+--------------+-----------+---------------+
[all …]
H A Dpwm-ntxec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * e-book readers designed by the original design manufacturer Netronix, Inc.
13 * - The get_state callback is not implemented, because the current state of
15 * - The hardware can only generate normal polarity output.
16 * - The period and duty cycle can't be changed together in one atomic action.
35 #define NTXEC_REG_AUTO_OFF_HI 0xa1
36 #define NTXEC_REG_AUTO_OFF_LO 0xa2
37 #define NTXEC_REG_ENABLE 0xa3
38 #define NTXEC_REG_PERIOD_LOW 0xa4
39 #define NTXEC_REG_PERIOD_HIGH 0xa5
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
23 is given to the user if the assumptions made in continuous-voltage mode do
[all …]
/linux/kernel/locking/
H A Dtest-ww_mutex.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Module-based API test facility for ww_mutexes
22 (a)->deadlock_inject_countdown = ~0U; \
23 } while (0)
35 #define TEST_MTX_SPIN BIT(0)
44 complete(&mtx->ready); in test_mutex_work()
45 wait_for_completion(&mtx->go); in test_mutex_work()
47 if (mtx->flags & TEST_MTX_TRY) { in test_mutex_work()
48 while (!ww_mutex_trylock(&mtx->mutex, NULL)) in test_mutex_work()
51 ww_mutex_lock(&mtx->mutex, NULL); in test_mutex_work()
[all …]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A Dfloating-point.json4 "Counter": "0,1,2,3",
6 "EventCode": "0xCA",
10 "UMask": "0x1e"
14 "Counter": "0,1,2,3",
15 "EventCode": "0xCA",
19 "UMask": "0x10"
23 "Counter": "0,1,2,3",
24 "EventCode": "0xCA",
28 "UMask": "0x8"
32 "Counter": "0,1,2,3",
[all …]
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Dfloating-point.json4 "Counter": "0,1,2,3",
6 "EventCode": "0xCA",
10 "UMask": "0x1e"
14 "Counter": "0,1,2,3",
15 "EventCode": "0xCA",
19 "UMask": "0x10"
23 "Counter": "0,1,2,3",
24 "EventCode": "0xCA",
28 "UMask": "0x8"
32 "Counter": "0,1,2,3",
[all …]
/linux/sound/firewire/
H A Damdtp-stream.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Audio and Music Data Transmission Protocol (IEC 61883-6) streams
4 * with Common Isochronous Packet (IEC 61883-1) headers
12 #include <linux/firewire-constants.h>
17 #include "amdtp-stream.h"
27 #include "amdtp-stream-trace.h"
29 #define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
33 #define TAG_NO_CIP_HEADER 0
40 #define CIP_EOH_MASK 0x80000000
42 #define CIP_SID_MASK 0x3f000000
[all …]
/linux/Documentation/devicetree/bindings/input/
H A Dpwm-vibrator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/pwm-vibrator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
14 strength increases based on the duty cycle of the enable PWM channel
15 (100% duty cycle meaning strongest vibration, 0% meaning no vibration).
18 driven at fixed duty cycle. If available this is can be used to increase
23 const: pwm-vibrator
25 pwm-names:
[all …]
/linux/Documentation/admin-guide/perf/
H A Dalibaba_pmu.rst2 Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
5 The Yitian 710, custom-built by Alibaba Group's chip development business,
6 T-Head, implements uncore PMU for performance and functional debugging to
9 DDR Sub-System Driveway (DRW) PMU Driver
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
15 implements separate PMUs for each sub-channel to monitor various performance
20 sub-channels of the same channel in die 0. And the PMU device of die 1 is
23 Each sub-channel has 36 PMU counters in total, which is classified into
26 - Group 0: PMU Cycle Counter. This group has one pair of counters
27 pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count
[all …]
/linux/tools/power/cpupower/bench/
H A Dbenchmark.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* cpufreq-bench CPUFreq microbenchmark
17 if (config->output != stdout) { \
37 unsigned int rounds = 0; in calculate_timespace()
38 unsigned int timed = 0; in calculate_timespace()
40 if (config->verbose) in calculate_timespace()
48 timed = (unsigned int)(then - now); in calculate_timespace()
52 for (i = 0; i < 4; i++) { in calculate_timespace()
59 timed = (unsigned int)(then - now); in calculate_timespace()
62 if (config->verbose) in calculate_timespace()
[all …]
/linux/tools/perf/pmu-events/arch/x86/elkhartlake/
H A Dpipeline.json4 "Counter": "0,1,2,3",
5 "EventCode": "0xc4",
13 "Counter": "0,1,2,3",
14 "EventCode": "0xc4",
18 "UMask": "0xf9"
22 "Counter": "0,1,2,3",
23 "EventCode": "0xc4",
27 "UMask": "0xbf"
31 "Counter": "0,1,2,3",
32 "EventCode": "0xc4",
[all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Dpipeline.json4 "Counter": "0,1,2,3",
5 "EventCode": "0xc4",
13 "Counter": "0,1,2,3",
14 "EventCode": "0xc4",
18 "UMask": "0xf9"
22 "Counter": "0,1,2,3",
23 "EventCode": "0xc4",
27 "UMask": "0xbf"
31 "Counter": "0,1,2,3",
32 "EventCode": "0xc4",
[all …]

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