Lines Matching +full:cycle +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
6 * Copyright 2003-2004 Jeff Garzik
15 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
18 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
19 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
26 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
27 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
28 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
29 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
30 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
31 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
32 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
33 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
35 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
36 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
37 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
39 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
40 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
41 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
42 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
43 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
45 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
46 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
47 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
48 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
49 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
50 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
51 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
52 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
54 { 0xFF }
57 #define ENOUGH(v, unit) (((v)-1)/(unit)+1)
58 #define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0)
63 q->setup = EZ(t->setup, T); in ata_timing_quantize()
64 q->act8b = EZ(t->act8b, T); in ata_timing_quantize()
65 q->rec8b = EZ(t->rec8b, T); in ata_timing_quantize()
66 q->cyc8b = EZ(t->cyc8b, T); in ata_timing_quantize()
67 q->active = EZ(t->active, T); in ata_timing_quantize()
68 q->recover = EZ(t->recover, T); in ata_timing_quantize()
69 q->dmack_hold = EZ(t->dmack_hold, T); in ata_timing_quantize()
70 q->cycle = EZ(t->cycle, T); in ata_timing_quantize()
71 q->udma = EZ(t->udma, UT); in ata_timing_quantize()
78 m->setup = max(a->setup, b->setup); in ata_timing_merge()
80 m->act8b = max(a->act8b, b->act8b); in ata_timing_merge()
82 m->rec8b = max(a->rec8b, b->rec8b); in ata_timing_merge()
84 m->cyc8b = max(a->cyc8b, b->cyc8b); in ata_timing_merge()
86 m->active = max(a->active, b->active); in ata_timing_merge()
88 m->recover = max(a->recover, b->recover); in ata_timing_merge()
90 m->dmack_hold = max(a->dmack_hold, b->dmack_hold); in ata_timing_merge()
92 m->cycle = max(a->cycle, b->cycle); in ata_timing_merge()
94 m->udma = max(a->udma, b->udma); in ata_timing_merge()
102 while (xfer_mode > t->mode) in ata_timing_find_mode()
105 if (xfer_mode == t->mode) in ata_timing_find_mode()
108 WARN_ONCE(true, "%s: unable to find timing for xfer_mode 0x%x\n", in ata_timing_find_mode()
118 const u16 *id = adev->id; in ata_timing_compute()
127 return -EINVAL; in ata_timing_compute()
133 * PIO/MW_DMA cycle timing. in ata_timing_compute()
137 memset(&p, 0, sizeof(p)); in ata_timing_compute()
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; in ata_timing_compute()
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; in ata_timing_compute()
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; in ata_timing_compute()
160 * DMA cycle timing is slower/equal than the fastest PIO timing. in ata_timing_compute()
164 ata_timing_compute(adev, adev->pio_mode, &p, T, UT); in ata_timing_compute()
169 * Lengthen active & recovery time so that cycle time is correct. in ata_timing_compute()
172 if (t->act8b + t->rec8b < t->cyc8b) { in ata_timing_compute()
173 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; in ata_timing_compute()
174 t->rec8b = t->cyc8b - t->act8b; in ata_timing_compute()
177 if (t->active + t->recover < t->cycle) { in ata_timing_compute()
178 t->active += (t->cycle - (t->active + t->recover)) / 2; in ata_timing_compute()
179 t->recover = t->cycle - t->active; in ata_timing_compute()
184 * leave t->cycle too low for the sum of active and recovery in ata_timing_compute()
187 if (t->active + t->recover > t->cycle) in ata_timing_compute()
188 t->cycle = t->active + t->recover; in ata_timing_compute()
190 return 0; in ata_timing_compute()