Lines Matching +full:cycle +full:- +full:0
2 Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
5 The Yitian 710, custom-built by Alibaba Group's chip development business,
6 T-Head, implements uncore PMU for performance and functional debugging to
9 DDR Sub-System Driveway (DRW) PMU Driver
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
15 implements separate PMUs for each sub-channel to monitor various performance
20 sub-channels of the same channel in die 0. And the PMU device of die 1 is
23 Each sub-channel has 36 PMU counters in total, which is classified into
26 - Group 0: PMU Cycle Counter. This group has one pair of counters
27 pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count
30 - Group 1: PMU Bandwidth Counters. This group has 8 counters that are used
35 - Group 2: PMU Retry Counters. This group has 10 counters, that intend to
38 - Group 3: PMU Common Counters. This group has 16 counters, that are used
41 For now, the Driveway PMU driver only uses counters in group 0 and group 3.
45 receives transactions Host Interface (HIF) which is custom-defined by Synopsys.
58 -e ali_drw_21000/hif_wr/ \
59 -e ali_drw_21000/hif_rd/ \
60 -e ali_drw_21000/hif_rmw/ \
61 -e ali_drw_21000/cycle/ \
62 -e ali_drw_21080/hif_wr/ \
63 -e ali_drw_21080/hif_rd/ \
64 -e ali_drw_21080/hif_rmw/ \
65 -e ali_drw_21080/cycle/ \
66 -e ali_drw_23000/hif_wr/ \
67 -e ali_drw_23000/hif_rd/ \
68 -e ali_drw_23000/hif_rmw/ \
69 -e ali_drw_23000/cycle/ \
70 -e ali_drw_23080/hif_wr/ \
71 -e ali_drw_23080/hif_rd/ \
72 -e ali_drw_23080/hif_rmw/ \
73 -e ali_drw_23080/cycle/ \
74 -e ali_drw_25000/hif_wr/ \
75 -e ali_drw_25000/hif_rd/ \
76 -e ali_drw_25000/hif_rmw/ \
77 -e ali_drw_25000/cycle/ \
78 -e ali_drw_25080/hif_wr/ \
79 -e ali_drw_25080/hif_rd/ \
80 -e ali_drw_25080/hif_rmw/ \
81 -e ali_drw_25080/cycle/ \
82 -e ali_drw_27000/hif_wr/ \
83 -e ali_drw_27000/hif_rd/ \
84 -e ali_drw_27000/hif_rmw/ \
85 -e ali_drw_27000/cycle/ \
86 -e ali_drw_27080/hif_wr/ \
87 -e ali_drw_27080/hif_rd/ \
88 -e ali_drw_27080/hif_rmw/ \
89 -e ali_drw_27080/cycle/ -- sleep 10
93 perf stat -M ddr_read_bandwidth.all -- sleep 10
94 perf stat -M ddr_write_bandwidth.all -- sleep 10
98 - Read Bandwidth = perf_hif_rd * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle
99 - Write Bandwidth = (perf_hif_wr + perf_hif_rmw) * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle