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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dcpm.txt7 * Root CPM node
10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
11 - reg : A 48-byte region beginning with CPCR.
14 cpm@119c0 {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 #interrupt-cells = <2>;
18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
22 * Properties common to multiple CPM/QE devices
24 - fsl,cpm-command : This value is ORed with the opcode and command flag
[all …]
H A Dfsl,qe-muram.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-muram.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QUICC Engine Multi-User RAM (MURAM)
10 - Frank Li <Frank.Li@nxp.com>
12 description: Multi-User RAM (MURAM)
17 - const: fsl,qe-muram
18 - const: fsl,cpm-muram
23 "#address-cells":
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H A Dfsl,qe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
16 in with the CPM binding later in this document.
27 - const: fsl,qe
28 - const: simple-bus
38 enum: [QE, CPM, CPM2]
40 bus-frequency:
44 fsl,qe-num-riscs:
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/linux/drivers/soc/fsl/qe/
H A Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Common CPM code
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
57 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
60 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init()
62 pr_err("Cannot find CPM muram data node"); in cpm_muram_init()
63 ret = -ENODEV; in cpm_muram_init()
68 muram_pool = gen_pool_create(0, -1); in cpm_muram_init()
70 pr_err("Cannot allocate memory pool for CPM/QE muram"); in cpm_muram_init()
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/linux/arch/powerpc/boot/dts/
H A Dmgcoge.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
28 d-cache-line-size = <32>;
29 i-cache-line-size = <32>;
30 d-cache-size = <16384>;
31 i-cache-size = <16384>;
[all …]
H A Dmpc866ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>; // 16 bytes
25 i-cache-line-size = <16>; // 16 bytes
26 d-cache-size = <0x2000>; // L1, 8K
27 i-cache-size = <0x4000>; // L1, 16K
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H A Dep8248e.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
16 planetcore-SMC1 = &smc1;
17 planetcore-SCC1 = &scc1;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
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H A Dadder875-uboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree Source for MPC885 ADS running U-Boot
9 /dts-v1/;
12 compatible = "analogue-and-micro,adder875";
13 #address-cells = <1>;
14 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
29 d-cache-line-size = <16>;
30 i-cache-line-size = <16>;
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H A Dadder875-redboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
12 compatible = "analogue-and-micro,adder875";
13 #address-cells = <1>;
14 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
29 d-cache-line-size = <16>;
30 i-cache-line-size = <16>;
31 d-cache-size = <8192>;
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H A Dtqm8xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <16>; // 16 bytes
32 i-cache-line-size = <16>; // 16 bytes
33 d-cache-size = <0x1000>; // L1, 4K
34 i-cache-size = <0x1000>; // L1, 4K
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H A Dep88xc.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>;
25 i-cache-line-size = <16>;
26 d-cache-size = <8192>;
27 i-cache-size = <8192>;
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H A Dmpc885ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>;
25 i-cache-line-size = <16>;
26 d-cache-size = <8192>;
27 i-cache-size = <8192>;
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H A Dksi8560.dts15 /dts-v1/;
22 #address-cells = <1>;
23 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
38 d-cache-line-size = <32>;
39 i-cache-line-size = <32>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
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H A Dstx_gp3_8560.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STX GP3 - 8560 ADS Device Tree Source
8 /dts-v1/;
14 compatible = "stx,gp3-8560", "stx,gp3";
15 #address-cells = <1>;
16 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
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H A Dtqm8560.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
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H A Dtqm8541.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
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H A Dtqm8555.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
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H A Dmpc832x_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
33 d-cache-size = <16384>; // L1, 16K
34 i-cache-size = <16384>; // L1, 16K
[all …]
H A Dmpc836x_rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2008 MontaVista Software, Inc.
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
[all …]
H A Dstxssa8555.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8555-based STx GP3 Device Tree Source
10 /dts-v1/;
16 compatible = "stx,gp3-8560", "stx,gp3";
17 #address-cells = <1>;
18 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
[all …]
/linux/arch/powerpc/boot/
H A Dcpm-serial.c1 // SPDX-License-Identifier: GPL-2.0
3 * CPM serial console support.
113 out_be16(&smc->smcmr, in_be16(&smc->smcmr) & ~3); in smc_disable_port()
119 out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) & ~0x30); in scc_disable_port()
124 out_be16(&smc->smcmr, in_be16(&smc->smcmr) | 3); in smc_enable_port()
130 out_be32(&scc->gsmrl, in_be32(&scc->gsmrl) | 0x30); in scc_enable_port()
138 out_8(&param->rfcr, 0x10); in cpm_serial_open()
139 out_8(&param->tfcr, 0x10); in cpm_serial_open()
140 out_be16(&param->mrblr, 1); in cpm_serial_open()
141 out_be16(&param->maxidl, 0); in cpm_serial_open()
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dt1024si-post.dtsi35 #include "t1023si-post.dtsi"
44 #address-cells = <1>;
45 #size-cells = <1>;
50 fsl,qe-num-riscs = <1>;
51 fsl,qe-num-snums = <28>;
52 brg-frequency = <0>;
53 bus-frequency = <0>;
59 compatible = "fsl,t1024-diu", "fsl,diu";
66 qeic: interrupt-controller@80 {
67 interrupt-controller;
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H A Dp1021si-post.dtsi4 * Copyright 2011-2012 Freescale Semiconductor Inc.
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
55 #interrupt-cells = <1>;
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H A Dmpc8568si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
57 compatible = "fsl,mpc8548-pcie";
59 #size-cells = <2>;
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H A Dmpc8569si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
56 #interrupt-cells = <1>;
57 #size-cells = <2>;
[all …]

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