Lines Matching +full:cpm +full:- +full:muram
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STX GP3 - 8560 ADS Device Tree Source
8 /dts-v1/;
14 compatible = "stx,gp3-8560", "stx,gp3";
15 #address-cells = <1>;
16 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
36 timebase-frequency = <0>;
37 bus-frequency = <0>;
38 clock-frequency = <0>;
39 next-level-cache = <&L2>;
49 #address-cells = <1>;
50 #size-cells = <1>;
53 bus-frequency = <0>;
54 compatible = "fsl,mpc8560-immr", "simple-bus";
56 ecm-law@0 {
57 compatible = "fsl,ecm-law";
59 fsl,num-laws = <8>;
63 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
66 interrupt-parent = <&mpic>;
69 memory-controller@2000 {
70 compatible = "fsl,mpc8540-memory-controller";
72 interrupt-parent = <&mpic>;
76 L2: l2-cache-controller@20000 {
77 compatible = "fsl,mpc8540-l2-cache-controller";
79 cache-line-size = <32>;
80 cache-size = <0x40000>; // L2, 256K
81 interrupt-parent = <&mpic>;
86 #address-cells = <1>;
87 #size-cells = <0>;
88 cell-index = <0>;
89 compatible = "fsl-i2c";
92 interrupt-parent = <&mpic>;
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
102 cell-index = <0>;
103 dma-channel@0 {
104 compatible = "fsl,mpc8560-dma-channel",
105 "fsl,eloplus-dma-channel";
107 cell-index = <0>;
108 interrupt-parent = <&mpic>;
111 dma-channel@80 {
112 compatible = "fsl,mpc8560-dma-channel",
113 "fsl,eloplus-dma-channel";
115 cell-index = <1>;
116 interrupt-parent = <&mpic>;
119 dma-channel@100 {
120 compatible = "fsl,mpc8560-dma-channel",
121 "fsl,eloplus-dma-channel";
123 cell-index = <2>;
124 interrupt-parent = <&mpic>;
127 dma-channel@180 {
128 compatible = "fsl,mpc8560-dma-channel",
129 "fsl,eloplus-dma-channel";
131 cell-index = <3>;
132 interrupt-parent = <&mpic>;
138 #address-cells = <1>;
139 #size-cells = <1>;
140 cell-index = <0>;
146 local-mac-address = [ 00 00 00 00 00 00 ];
148 interrupt-parent = <&mpic>;
149 tbi-handle = <&tbi0>;
150 phy-handle = <&phy2>;
153 #address-cells = <1>;
154 #size-cells = <0>;
155 compatible = "fsl,gianfar-mdio";
158 phy2: ethernet-phy@2 {
159 interrupt-parent = <&mpic>;
163 phy4: ethernet-phy@4 {
164 interrupt-parent = <&mpic>;
168 tbi0: tbi-phy@11 {
170 device_type = "tbi-phy";
176 #address-cells = <1>;
177 #size-cells = <1>;
178 cell-index = <1>;
184 local-mac-address = [ 00 00 00 00 00 00 ];
186 interrupt-parent = <&mpic>;
187 tbi-handle = <&tbi1>;
188 phy-handle = <&phy4>;
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "fsl,gianfar-tbi";
196 tbi1: tbi-phy@11 {
198 device_type = "tbi-phy";
204 interrupt-controller;
205 #address-cells = <0>;
206 #interrupt-cells = <2>;
208 compatible = "chrp,open-pic";
209 device_type = "open-pic";
212 cpm@919c0 {
213 #address-cells = <1>;
214 #size-cells = <1>;
215 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
219 muram@80000 {
220 #address-cells = <1>;
221 #size-cells = <1>;
225 compatible = "fsl,cpm-muram-data";
231 compatible = "fsl,mpc8560-brg",
232 "fsl,cpm2-brg",
233 "fsl,cpm-brg";
235 clock-frequency = <0>;
239 interrupt-controller;
240 #address-cells = <0>;
241 #interrupt-cells = <2>;
243 interrupt-parent = <&mpic>;
245 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
250 compatible = "fsl,mpc8560-scc-uart",
251 "fsl,cpm2-scc-uart";
253 fsl,cpm-brg = <2>;
254 fsl,cpm-command = <0x4a00000>;
256 interrupt-parent = <&cpmpic>;
262 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
263 interrupt-map = <
289 interrupt-parent = <&mpic>;
291 bus-range = <0 0>;
294 clock-frequency = <66666666>;
295 #interrupt-cells = <1>;
296 #size-cells = <2>;
297 #address-cells = <3>;
299 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";