| /linux/Documentation/devicetree/bindings/net/can/ |
| H A D | rockchip,rk3568v2-canfd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/can/rockchip,rk3568v2-canfd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 Rockchip CAN-FD controller 11 - Marc Kleine-Budde <mkl@pengutronix.de> 14 - $ref: can-controller.yaml# 19 - const: rockchip,rk3568v2-canfd 20 - items: 21 - const: rockchip,rk3568v3-canfd [all …]
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| H A D | xilinx,can.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 Xilinx CAN and CANFD controller 11 - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> 16 - xlnx,zynq-can-1.0 17 - xlnx,axi-can-1.00.a 18 - xlnx,canfd-1.0 19 - xlnx,canfd-2.0 29 maxItems: 2 [all …]
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| H A D | renesas,rcar-can.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car CAN Controller 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 15 - items: 16 - enum: 17 - renesas,can-r8a7778 # R-Car M1-A 18 - renesas,can-r8a7779 # R-Car H1 [all …]
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| H A D | ctu,ctucanfd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: CTU CAN FD Open-source IP Core 10 Open-source CAN FD IP core developed at the Czech Technical University in Prague 14 [2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf 18 [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top 21 …tps://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-ca… 24 - Pavel Pisa <pisa@cmp.felk.cvut.cz> 25 - Ondrej Ille <ondrej.ille@gmail.com> [all …]
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| /linux/drivers/net/can/rcar/ |
| H A D | rcar_canfd.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Renesas R-Car CAN FD device driver 7 /* The R-Car CAN FD controller can operate in either one of the below two modes 8 * - CAN FD only mode 9 * - Classical CAN (CAN 2.0) only mode 16 * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is 63 #define RCANFD_GCTR_GSLPR BIT(2) [all...] |
| /linux/drivers/net/can/ |
| H A D | xilinx_can.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2012 - 2022 Xilinx, Inc. 6 * Copyright (C) 2017 - 2018 Sandvik Mining and Construction Oy 9 * This driver is developed for AXI CAN IP, AXI CANFD IP, CANPS and CANFD PS Controller. 95 /* CAN register bit masks - XCAN [all...] |
| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk356x-base.dtsi" 11 cpu0_opp_table: opp-table-0 { 12 compatible = "operating-points-v2"; 13 opp-shared; 15 opp-408000000 { 16 opp-hz = /bits/ 64 <408000000>; 17 opp-microvolt = <850000 850000 1150000>; 18 clock-latency-ns = <40000>; 21 opp-600000000 { [all …]
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| /linux/drivers/net/can/usb/etas_es58x/ |
| H A D | es58x_fd.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 /* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces. 19 #define ES582_1_NUM_CAN_CH 2 21 #define ES58X_FD_NUM_CAN_CH 2 34 /* Command IDs for ES58X_FD_CMD_TYPE_{CAN,CANFD}. */ 54 * enum es58x_fd_ctrlmode - Controller mode. 58 * @ES58X_FD_CTRLMODE_FD: CAN FD according to ISO11898-1. 63 * dominant. (c.f. ISO 11898-1:2015, section 10.4.2.4 "Control 83 __le16 tseg1; /* range: [tseg1_min-1..tseg1_max-1] */ 84 __le16 tseg2; /* range: [tseg2_min-1..tseg2_max-1] */ [all …]
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| /linux/drivers/net/can/usb/ |
| H A D | gs_usb.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-2016 Geschwister Schneider Technologie-, 6 * Entwicklungs- und Vertriebs UG (Haftungsbeschränkt). 8 * Copyright (c) 2023 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de> 28 #include <linux/can/rx-offload.h> 55 CYCLECOUNTER_MASK(32) / GS_USB_TIMESTAMP_TIMER_HZ / 2); 109 * Technologie Entwicklungs- und Vertriebs UG exchanges all data 133 #define GS_CAN_MODE_TRIPLE_SAMPLE BIT(2) 175 #define GS_CAN_FEATURE_TRIPLE_SAMPLE BIT(2) 189 /* internal quirks - keep in GS_CAN_FEATURE space for now */ [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | white-hawk-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 9 #include "white-hawk-csi-dsi.dtsi" 10 #include "white-hawk-ethernet.dtsi" 13 can_transceiver0: can-phy0 { 15 #phy-cells = <0>; 16 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 17 max-bitrate = <5000000>; 22 clock-frequency = <40000000>; 25 &canfd { 26 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; [all …]
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| H A D | renesas-smarc2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the RZ SMARC Carrier-II Board. 13 * 0 - SMARC SDIO signal is connected to uSD1 14 * 1 - SMARC SDIO signal is connected to M.2 Key E connector 20 * 0 - Connect to GPIO8 PMOD (default) 21 * 1 - Connect to CAN0 transceiver STB pin 24 * 0 - Connect to GPIO9 PMOD (default) 25 * 1 - Connect to CAN1 transceiver STB pin 32 model = "Renesas RZ SMARC Carrier-II Board"; 33 compatible = "renesas,smarc2-evk"; [all …]
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| H A D | rzg2ul-smarc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts 8 #include <dt-bindings/gpio/gpio.h> 9 #include "rzg2ul-smarc-pinfunction.dtsi" 10 #include "rz-smarc-common.dtsi" 13 &canfd { 14 /delete-property/ pinctrl-0; 15 /delete-property/ pinctrl-names; 21 sound-dai = <&ssi1>; 25 clock-frequency = <400000>; [all …]
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| H A D | ebisu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the Ebisu/Ebisu-4D board 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 33 stdout-path = "serial0:115200n8"; 36 audio_clkout: audio-clkout { 39 * but needed to avoid cs2000/rcar_sound probe dead-lock 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <11289600>; [all …]
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| H A D | r9a07g043.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/r9a07g043-cpg.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 audio_clk1: audio1-clk { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 19 clock-frequency = <0>; 22 audio_clk2: audio2-clk { 23 compatible = "fixed-clock"; [all …]
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| H A D | rz-smarc-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 12 * SSI-WM8978 32 stdout-path = "serial0:115200n8"; 36 compatible = "simple-audio-card"; 37 simple-audio-card,format = "i2s"; 38 simple-audio-card,bitclock-master = <&cpu_dai>; 39 simple-audio-card,frame-master = <&cpu_dai>; 40 simple-audio-card,mclk-fs = <256>; [all …]
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| H A D | r8a77970.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3M (R8A77970) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/power/r8a77970-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 18 interrupt-parent = <&gic>; [all …]
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| H A D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 15 interrupt-parent = <&gic>; 17 audio_clk1: audio1-clk { 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; 21 clock-frequency = <0>; [all …]
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| H A D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 15 interrupt-parent = <&gic>; 17 audio_clk1: audio1-clk { 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; 21 clock-frequency = <0>; [all …]
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| H A D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3H (R8A77980) SoC 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/r8a77980-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 18 interrupt-parent = <&gic>; 20 /* External CAN clock - to be overridden by boards that provide it */ [all …]
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| H A D | r8a77995.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car D3 (R8A77995) SoC 9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/r8a77995-sysc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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| H A D | r8a77970-eagle.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the Eagle board with R-Car V3M 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 29 stdout-path = "serial0:115200n8"; 32 d1p8: regulator-fixed { 33 compatible = "regulator-fixed"; 34 regulator-name = "fixed-1.8V"; 35 regulator-min-microvolt = <1800000>; [all …]
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| /linux/drivers/net/can/rockchip/ |
| H A D | rockchip_canfd-core.c | 1 // SPDX-License-Identifier: GPL-2.0 4 // Marc Kleine-Budde <kernel@pengutronix.de> 8 // Rockchip CANFD driver 38 /* The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00 68 return __rkcanfd_get_model_str(priv->devtype_data.model); in rkcanfd_get_model_str() 75 * Tsclk = 2 x Tclk x (brp + 1) 78 * for the arbitration and data bit timing) to take the "2 x" into 88 .brp_min = 2, /* valu [all...] |
| /linux/Documentation/networking/device_drivers/can/ctu/ |
| H A D | ctucanfd-driver.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later 10 ------------------------ 19 `Vivado integration <https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top>`_ 20 and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board 21 `QSys integration <https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd>`_ 23 `PCIe integration <https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd>`_ of the core. 33 version of emulation support can be cloned from ctu-canfd branch of QEMU local 34 development `repository <https://gitlab.fel.cvut.cz/canbus/qemu-canbus>`_. 38 --------------- 59 it allows for device hot-plug. [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-mx8menlo.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 3 * Copyright 2021-2022 Marek Vasut <marex@denx.de> 6 /dts-v1/; 8 #include "imx8mm-verdin.dtsi" 13 "toradex,verdin-imx8mm-nonwifi", 14 "toradex,verdin-imx8mm", 17 /delete-node/ gpio-keys; 20 compatible = "gpio-leds"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&pinctrl_led>; [all …]
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| /linux/drivers/clk/renesas/ |
| H A D | r8a77995-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0 7 * Based on r8a7795-cpg-mssr.c 16 #include <linux/soc/renesas/rcar-rst.h> 18 #include <dt-bindings/clock/r8a77995-cpg-mssr.h> 20 #include "renesas-cpg-mssr.h" 21 #include "rcar-gen3-cpg.h" 63 DEF_FIXED(".pll0d2", CLK_PLL0D2, CLK_PLL0, 2, 1), 66 DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1), 68 DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1), 72 DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1, 2, 1), [all …]
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