| /freebsd/sys/contrib/edk2/Include/Protocol/ |
| H A D | PciPlatform.h | 3 the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific
7 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
40 /// - EFI_RESERVE_NONE_IO_ALIAS:<BR>
46 /// - EFI_RESERVE_ISA_IO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS:<BR>
47 /// Sets aside the ISA I/O range and all the aliases during PCI
49 /// ranges. In this scheme, seventy-five percent of the I/O space remains unused.
52 /// ISA range and its aliases
53 /// Legacy VGA range and its aliases
54 /// The PCI bus driver will not allocate I/O addresses out of the ISA I/O
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| H A D | PciHostBridgeResourceAllocation.h | 6 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
38 /// support separate windows for Non-prefetchable and Prefetchable
39 /// memory. A PCI bus driver needs to include requests for Prefetchable
40 /// memory in the Non-prefetchable memory pool.
47 /// the PCI bus driver needs to include requests for 64 bit
87 /// The bus allocation phase is about to begin. No specific action
94 /// The bus allocation and bus programming phase is complete. No specific
120 /// De-allocate previously allocated resources previously for all the PCI
144 /// This notification is only applicable to PCI-PCI bridges and
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| H A D | PciRootBridgeIo.h | 4 PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
6 defferent types of bus mastering DMA.
8 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9 SPDX-License-Identifier: BSD-2-Clause-Patent
53 /// A read operation from system memory by a bus master that is not capable of producing
58 /// A write operation from system memory by a bus master that is not capable of producing
63 /// Provides both read and write access to system memory by both the processor and a bus
68 /// A read operation from system memory by a bus master that is capable of producing PCI
73 /// A write operation to system memory by a bus master that is capable of producing PCI
78 /// Provides both read and write access to system memory by both the processor and a bus
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| H A D | PciIo.h | 5 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
49 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit de…
50 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater…
52 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit …
53 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x…
54 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F…
55 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x37…
56 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are co…
60 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w acces…
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| /freebsd/sys/kern/ |
| H A D | bus_if.m | 1 #-
2 # Copyright (c) 1998-2004 Doug Rabson
30 #include <sys/bus.h>
33 * @defgroup BUS bus - KObj methods for drivers of devices with children
38 INTERFACE bus;
53 null_remap_intr(device_t bus, device_t dev, u_int irq)
62 null_add_child(device_t bus, int order, const char *name,
67 "unit %d", device_get_nameunit(bus), name, unit);
71 null_reset_post(device_t bus, device_t dev)
77 null_reset_prepare(device_t bus, device_t dev)
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| /freebsd/tools/bus_space/examples/ |
| H A D | am79c900_diag.py | 55 import bus
56 from bus import dma as busdma
121 pcicfg = bus.map(dev, 'pcicfg')
124 vendor = bus.read_2(pcicfg, 0)
125 device = bus.read_2(pcicfg, 2)
127 logging.error('Not an AMD PCnet-PCI (vendor=%x, device=%x)' %
131 command = bus.read_2(pcicfg, 4)
135 bus.write_2(pcicfg, 4, command)
138 logging.info('enabling bus mastering')
140 bus.write_2(pcicfg, 4, command)
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| /freebsd/sys/dev/pci/ |
| H A D | pci_pci.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
41 #include <sys/bus.h>
86 int *bus, int *slot, int *func);
104 /* Bus interface */
147 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
151 * sub-allocated from one of our window resource managers.
158 if (rman_is_region_manager(r, &sc->io.rman)) in pcib_get_resource_window()
159 return (&sc->io); in pcib_get_resource_window()
164 rman_is_region_manager(r, &sc->pmem.rman)) in pcib_get_resource_window()
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| H A D | pci_host_generic.c | 1 /*-
42 #include <sys/bus.h>
50 #include <machine/bus.h>
71 static uint32_t generic_pcie_read_config(device_t dev, u_int bus, u_int slot,
73 static void generic_pcie_write_config(device_t dev, u_int bus, u_int slot,
97 sc->dev = dev; in pci_host_generic_core_attach()
108 sc->coherent ? BUS_DMA_COHERENT : 0, /* flags */ in pci_host_generic_core_attach()
110 &sc->dmat); in pci_host_generic_core_attach()
119 (void)bus_dma_tag_set_domain(sc->dmat, domain); in pci_host_generic_core_attach()
121 if ((sc->quirks & PCIE_CUSTOM_CONFIG_SPACE_QUIRK) == 0) { in pci_host_generic_core_attach()
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | renesas,pci-rcar-gen2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
11 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
21 - items:
22 - enum:
23 - renesas,pci-r8a7742 # RZ/G1H
24 - renesas,pci-r8a7743 # RZ/G1M
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| H A D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
21 Configuration Space is assumed to be memory-mapped (as opposed to being
23 geography of a PCI bus address by concatenating the various components to
26 For CAM, this 24-bit offset is:
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| H A D | pci-rcar-gen2.txt | 2 -------------------------
9 - compatible: "renesas,pci-r8a7742" for the R8A7742 SoC;
10 "renesas,pci-r8a7743" for the R8A7743 SoC;
11 "renesas,pci-r8a7744" for the R8A7744 SoC;
12 "renesas,pci-r8a7745" for the R8A7745 SoC;
13 "renesas,pci-r8a7790" for the R8A7790 SoC;
14 "renesas,pci-r8a7791" for the R8A7791 SoC;
15 "renesas,pci-r8a7793" for the R8A7793 SoC;
16 "renesas,pci-r8a7794" for the R8A7794 SoC;
17 "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or
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| H A D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings:
5 "mediatek,mt2701-pcie"
6 "mediatek,mt2712-pcie"
7 "mediatek,mt7622-pcie"
8 "mediatek,mt7623-pcie"
9 "mediatek,mt7629-pcie"
10 "airoha,en7523-pcie"
11 - device_type: Must be "pci"
12 - reg: Base addresses and lengths of the root ports.
13 - reg-names: Names of the above areas to use during resource lookup.
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| /freebsd/stand/efi/include/ |
| H A D | efipciio.h | 5 Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
9 http://opensource.org/licenses/bsd-license.php
56 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 ///< I/O cycles 0x0000-0x00FF (10 bit dec…
57 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 ///< I/O cycles 0x0100-0x03FF or greater …
59 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 ///< MEM cycles 0xA0000-0xBFFFF (24 bit d…
60 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3…
61 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7…
62 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 ///< I/O cycles 0x170-0x177, 0x376, 0x377…
63 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 ///< Map a memory range so writes are com…
67 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 ///< Map a memory range so all r/w access…
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| /freebsd/sys/dev/acpica/ |
| H A D | acpi_pcib_acpi.c | 1 /*-
33 #include <sys/bus.h>
66 int ap_bus; /* bios-assigned bus number */
67 int ap_addr; /* device/func of PCI-Host bridge */
73 static int acpi_pcib_acpi_probe(device_t bus);
74 static int acpi_pcib_acpi_attach(device_t bus);
79 static uint32_t acpi_pcib_read_config(device_t dev, u_int bus,
81 static void acpi_pcib_write_config(device_t dev, u_int bus,
107 static bus_dma_tag_t acpi_pcib_get_dma_tag(device_t bus, device_t child);
117 /* Bus interface */
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| /freebsd/sys/arm64/cavium/ |
| H A D | thunder_pcie_common.c | 1 /*-
38 #include <sys/bus.h>
41 #include <machine/bus.h>
76 if (addr >= r->pci_base && in range_addr_is_pci()
77 addr < (r->pci_base + r->size) && in range_addr_is_pci()
78 size < r->size) { in range_addr_is_pci()
79 /* Address is within PCI range */ in range_addr_is_pci()
84 /* Address is outside PCI range */ in range_addr_is_pci()
96 if (addr >= r->phys_base && in range_addr_is_phys()
97 addr < (r->phys_base + r->size) && in range_addr_is_phys()
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| /freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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| /freebsd/sys/contrib/device-tree/src/arm64/apple/ |
| H A D | t8112-j473.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 * target-type: J473
10 /dts-v1/;
13 #include "t8112-jxxx.dtsi"
16 compatible = "apple,j473", "apple,t8112", "apple,arm-platform";
25 * Force the bus number assignments so that we can declare some of the
26 * on-board devices and properties that are populated by the bootloader
30 bus-range = <1 1>;
34 bus-range = <2 2>;
39 bus-range = <3 3>;
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| H A D | t600x-j375.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 * target-type: J375c / J375d
19 #address-cells = <2>;
20 #size-cells = <2>;
23 stdout-path = "serial0";
26 compatible = "apple,simple-framebuffer", "simple-framebuffer";
45 hpm0: usb-pd@38 {
48 interrupt-parent = <&pinctrl_ap>;
50 interrupt-names = "irq";
53 hpm1: usb-pd@3f {
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | ti,tmp513.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Eric Tremblay <etremblay@distech-controls.com>
14 The TMP512 (dual-channel) and TMP513 (triple-channel) are system monitors
15 that include remote sensors, a local temperature sensor, and a high-side
17 remote temperatures, on-chip temperatures, and system voltage/power/current
28 - ti,tmp512
29 - ti,tmp513
34 shunt-resistor-micro-ohms:
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | aspeed,i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rayn Chen <rayn_chen@aspeedtech.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - aspeed,ast2400-i2c-bus
19 - aspeed,ast2500-i2c-bus
20 - aspeed,ast2600-i2c-bus
25 - description: address offset and range of bus
26 - description: address offset and range of bus buffer
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | usb251xb.txt | 1 Microchip USB 2.0 Hi-Speed Hub Controller
4 Hi-Speed Controller.
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
11 - reg : I2C address on the selected bus (default is <0x2C>)
14 - reset-gpios : Should specify the gpio for hub reset
15 - vdd-supply : Should specify the phandle to the regulator supplying vdd
16 - skip-config : Skip Hub configuration, but only send the USB-Attach command
17 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
18 - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
19 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
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| H A D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
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| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | ifm-csi.txt | 1 IFM camera sensor interface on mpc5200 LocalPlus bus
4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
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| /freebsd/usr.sbin/usbconfig/ |
| H A D | usbconfig.8 | 2 .\" Copyright (c) 2008-2019 Hans Petter Selasky. All rights reserved.
54 .Bl -tag -width "-u unit"
56 Limit device range to the given USB device index.
64 Limit device range to USB devices connected to the given unit and address.
78 Limit device range to USB devices connected to the given USBUS unit.
91 .Bl -tag -width indent
94 Valid values range from zero to the number reported as the
101 but without going into power saving mode or detaching from the bus.
173 This is the default for non-hub devices.
176 This forces the USB stack to reenumerate the bus.
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