xref: /freebsd/sys/contrib/edk2/Include/Protocol/PciRootBridgeIo.h (revision f439973d6726c3be929c8fb3b1545b8b1744abc3)
1*f439973dSWarner Losh /** @file
2*f439973dSWarner Losh   PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.
3*f439973dSWarner Losh 
4*f439973dSWarner Losh   PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
5*f439973dSWarner Losh   and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
6*f439973dSWarner Losh   defferent types of bus mastering DMA.
7*f439973dSWarner Losh 
8*f439973dSWarner Losh   Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9*f439973dSWarner Losh   SPDX-License-Identifier: BSD-2-Clause-Patent
10*f439973dSWarner Losh 
11*f439973dSWarner Losh **/
12*f439973dSWarner Losh 
13*f439973dSWarner Losh #ifndef __PCI_ROOT_BRIDGE_IO_H__
14*f439973dSWarner Losh #define __PCI_ROOT_BRIDGE_IO_H__
15*f439973dSWarner Losh 
16*f439973dSWarner Losh #include <Library/BaseLib.h>
17*f439973dSWarner Losh 
18*f439973dSWarner Losh #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
19*f439973dSWarner Losh   { \
20*f439973dSWarner Losh     0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
21*f439973dSWarner Losh   }
22*f439973dSWarner Losh 
23*f439973dSWarner Losh typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
24*f439973dSWarner Losh 
25*f439973dSWarner Losh ///
26*f439973dSWarner Losh /// *******************************************************
27*f439973dSWarner Losh /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
28*f439973dSWarner Losh /// *******************************************************
29*f439973dSWarner Losh ///
30*f439973dSWarner Losh typedef enum {
31*f439973dSWarner Losh   EfiPciWidthUint8,
32*f439973dSWarner Losh   EfiPciWidthUint16,
33*f439973dSWarner Losh   EfiPciWidthUint32,
34*f439973dSWarner Losh   EfiPciWidthUint64,
35*f439973dSWarner Losh   EfiPciWidthFifoUint8,
36*f439973dSWarner Losh   EfiPciWidthFifoUint16,
37*f439973dSWarner Losh   EfiPciWidthFifoUint32,
38*f439973dSWarner Losh   EfiPciWidthFifoUint64,
39*f439973dSWarner Losh   EfiPciWidthFillUint8,
40*f439973dSWarner Losh   EfiPciWidthFillUint16,
41*f439973dSWarner Losh   EfiPciWidthFillUint32,
42*f439973dSWarner Losh   EfiPciWidthFillUint64,
43*f439973dSWarner Losh   EfiPciWidthMaximum
44*f439973dSWarner Losh } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;
45*f439973dSWarner Losh 
46*f439973dSWarner Losh ///
47*f439973dSWarner Losh /// *******************************************************
48*f439973dSWarner Losh /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION
49*f439973dSWarner Losh /// *******************************************************
50*f439973dSWarner Losh ///
51*f439973dSWarner Losh typedef enum {
52*f439973dSWarner Losh   ///
53*f439973dSWarner Losh   /// A read operation from system memory by a bus master that is not capable of producing
54*f439973dSWarner Losh   /// PCI dual address cycles.
55*f439973dSWarner Losh   ///
56*f439973dSWarner Losh   EfiPciOperationBusMasterRead,
57*f439973dSWarner Losh   ///
58*f439973dSWarner Losh   /// A write operation from system memory by a bus master that is not capable of producing
59*f439973dSWarner Losh   /// PCI dual address cycles.
60*f439973dSWarner Losh   ///
61*f439973dSWarner Losh   EfiPciOperationBusMasterWrite,
62*f439973dSWarner Losh   ///
63*f439973dSWarner Losh   /// Provides both read and write access to system memory by both the processor and a bus
64*f439973dSWarner Losh   /// master that is not capable of producing PCI dual address cycles.
65*f439973dSWarner Losh   ///
66*f439973dSWarner Losh   EfiPciOperationBusMasterCommonBuffer,
67*f439973dSWarner Losh   ///
68*f439973dSWarner Losh   /// A read operation from system memory by a bus master that is capable of producing PCI
69*f439973dSWarner Losh   /// dual address cycles.
70*f439973dSWarner Losh   ///
71*f439973dSWarner Losh   EfiPciOperationBusMasterRead64,
72*f439973dSWarner Losh   ///
73*f439973dSWarner Losh   /// A write operation to system memory by a bus master that is capable of producing PCI
74*f439973dSWarner Losh   /// dual address cycles.
75*f439973dSWarner Losh   ///
76*f439973dSWarner Losh   EfiPciOperationBusMasterWrite64,
77*f439973dSWarner Losh   ///
78*f439973dSWarner Losh   /// Provides both read and write access to system memory by both the processor and a bus
79*f439973dSWarner Losh   /// master that is capable of producing PCI dual address cycles.
80*f439973dSWarner Losh   ///
81*f439973dSWarner Losh   EfiPciOperationBusMasterCommonBuffer64,
82*f439973dSWarner Losh   EfiPciOperationMaximum
83*f439973dSWarner Losh } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;
84*f439973dSWarner Losh 
85*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO    0x0001
86*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_ISA_IO                0x0002
87*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO        0x0004
88*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VGA_MEMORY            0x0008
89*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VGA_IO                0x0010
90*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO        0x0020
91*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO      0x0040
92*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE  0x0080
93*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED         0x0800
94*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE        0x1000
95*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE    0x8000
96*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_ISA_IO_16             0x10000
97*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16     0x20000
98*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VGA_IO_16             0x40000
99*f439973dSWarner Losh 
100*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER  (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
101*f439973dSWarner Losh 
102*f439973dSWarner Losh #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER  (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
103*f439973dSWarner Losh 
104*f439973dSWarner Losh #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
105*f439973dSWarner Losh   (UINT64) ( \
106*f439973dSWarner Losh   (((UINTN) bus) << 24) | \
107*f439973dSWarner Losh   (((UINTN) dev) << 16) | \
108*f439973dSWarner Losh   (((UINTN) func) << 8) | \
109*f439973dSWarner Losh   (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
110*f439973dSWarner Losh 
111*f439973dSWarner Losh typedef struct {
112*f439973dSWarner Losh   UINT8     Register;
113*f439973dSWarner Losh   UINT8     Function;
114*f439973dSWarner Losh   UINT8     Device;
115*f439973dSWarner Losh   UINT8     Bus;
116*f439973dSWarner Losh   UINT32    ExtendedRegister;
117*f439973dSWarner Losh } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;
118*f439973dSWarner Losh 
119*f439973dSWarner Losh /**
120*f439973dSWarner Losh   Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
121*f439973dSWarner Losh   satisfied or after a defined duration.
122*f439973dSWarner Losh 
123*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
124*f439973dSWarner Losh   @param  Width                 Signifies the width of the memory or I/O operations.
125*f439973dSWarner Losh   @param  Address               The base address of the memory or I/O operations.
126*f439973dSWarner Losh   @param  Mask                  Mask used for the polling criteria.
127*f439973dSWarner Losh   @param  Value                 The comparison value used for the polling exit criteria.
128*f439973dSWarner Losh   @param  Delay                 The number of 100 ns units to poll.
129*f439973dSWarner Losh   @param  Result                Pointer to the last value read from the memory location.
130*f439973dSWarner Losh 
131*f439973dSWarner Losh   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
132*f439973dSWarner Losh   @retval EFI_TIMEOUT           Delay expired before a match occurred.
133*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
134*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
135*f439973dSWarner Losh 
136*f439973dSWarner Losh **/
137*f439973dSWarner Losh typedef
138*f439973dSWarner Losh EFI_STATUS
139*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(
140*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,
141*f439973dSWarner Losh   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,
142*f439973dSWarner Losh   IN  UINT64                                   Address,
143*f439973dSWarner Losh   IN  UINT64                                   Mask,
144*f439973dSWarner Losh   IN  UINT64                                   Value,
145*f439973dSWarner Losh   IN  UINT64                                   Delay,
146*f439973dSWarner Losh   OUT UINT64                                   *Result
147*f439973dSWarner Losh   );
148*f439973dSWarner Losh 
149*f439973dSWarner Losh /**
150*f439973dSWarner Losh   Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
151*f439973dSWarner Losh 
152*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
153*f439973dSWarner Losh   @param  Width                 Signifies the width of the memory operations.
154*f439973dSWarner Losh   @param  Address               The base address of the memory operations.
155*f439973dSWarner Losh   @param  Count                 The number of memory operations to perform.
156*f439973dSWarner Losh   @param  Buffer                For read operations, the destination buffer to store the results. For write
157*f439973dSWarner Losh                                 operations, the source buffer to write data from.
158*f439973dSWarner Losh 
159*f439973dSWarner Losh   @retval EFI_SUCCESS           The data was read from or written to the PCI root bridge.
160*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
161*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
162*f439973dSWarner Losh 
163*f439973dSWarner Losh **/
164*f439973dSWarner Losh typedef
165*f439973dSWarner Losh EFI_STATUS
166*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(
167*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,
168*f439973dSWarner Losh   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,
169*f439973dSWarner Losh   IN     UINT64                                   Address,
170*f439973dSWarner Losh   IN     UINTN                                    Count,
171*f439973dSWarner Losh   IN OUT VOID                                     *Buffer
172*f439973dSWarner Losh   );
173*f439973dSWarner Losh 
174*f439973dSWarner Losh typedef struct {
175*f439973dSWarner Losh   ///
176*f439973dSWarner Losh   /// Read PCI controller registers in the PCI root bridge memory space.
177*f439973dSWarner Losh   ///
178*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM    Read;
179*f439973dSWarner Losh   ///
180*f439973dSWarner Losh   /// Write PCI controller registers in the PCI root bridge memory space.
181*f439973dSWarner Losh   ///
182*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM    Write;
183*f439973dSWarner Losh } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;
184*f439973dSWarner Losh 
185*f439973dSWarner Losh /**
186*f439973dSWarner Losh   Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
187*f439973dSWarner Losh   root bridge memory space.
188*f439973dSWarner Losh 
189*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
190*f439973dSWarner Losh   @param  Width                 Signifies the width of the memory operations.
191*f439973dSWarner Losh   @param  DestAddress           The destination address of the memory operation.
192*f439973dSWarner Losh   @param  SrcAddress            The source address of the memory operation.
193*f439973dSWarner Losh   @param  Count                 The number of memory operations to perform.
194*f439973dSWarner Losh 
195*f439973dSWarner Losh   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
196*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
197*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
198*f439973dSWarner Losh 
199*f439973dSWarner Losh **/
200*f439973dSWarner Losh typedef
201*f439973dSWarner Losh EFI_STATUS
202*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(
203*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,
204*f439973dSWarner Losh   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,
205*f439973dSWarner Losh   IN     UINT64                                   DestAddress,
206*f439973dSWarner Losh   IN     UINT64                                   SrcAddress,
207*f439973dSWarner Losh   IN     UINTN                                    Count
208*f439973dSWarner Losh   );
209*f439973dSWarner Losh 
210*f439973dSWarner Losh /**
211*f439973dSWarner Losh   Provides the PCI controller-specific addresses required to access system memory from a
212*f439973dSWarner Losh   DMA bus master.
213*f439973dSWarner Losh 
214*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
215*f439973dSWarner Losh   @param  Operation             Indicates if the bus master is going to read or write to system memory.
216*f439973dSWarner Losh   @param  HostAddress           The system memory address to map to the PCI controller.
217*f439973dSWarner Losh   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
218*f439973dSWarner Losh                                 that were mapped.
219*f439973dSWarner Losh   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
220*f439973dSWarner Losh                                 access the hosts HostAddress.
221*f439973dSWarner Losh   @param  Mapping               A resulting value to pass to Unmap().
222*f439973dSWarner Losh 
223*f439973dSWarner Losh   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
224*f439973dSWarner Losh   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
225*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
226*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
227*f439973dSWarner Losh   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
228*f439973dSWarner Losh 
229*f439973dSWarner Losh **/
230*f439973dSWarner Losh typedef
231*f439973dSWarner Losh EFI_STATUS
232*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(
233*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL                *This,
234*f439973dSWarner Losh   IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation,
235*f439973dSWarner Losh   IN     VOID                                       *HostAddress,
236*f439973dSWarner Losh   IN OUT UINTN                                      *NumberOfBytes,
237*f439973dSWarner Losh   OUT    EFI_PHYSICAL_ADDRESS                       *DeviceAddress,
238*f439973dSWarner Losh   OUT    VOID                                       **Mapping
239*f439973dSWarner Losh   );
240*f439973dSWarner Losh 
241*f439973dSWarner Losh /**
242*f439973dSWarner Losh   Completes the Map() operation and releases any corresponding resources.
243*f439973dSWarner Losh 
244*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
245*f439973dSWarner Losh   @param  Mapping               The mapping value returned from Map().
246*f439973dSWarner Losh 
247*f439973dSWarner Losh   @retval EFI_SUCCESS           The range was unmapped.
248*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
249*f439973dSWarner Losh   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
250*f439973dSWarner Losh 
251*f439973dSWarner Losh **/
252*f439973dSWarner Losh typedef
253*f439973dSWarner Losh EFI_STATUS
254*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(
255*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,
256*f439973dSWarner Losh   IN  VOID                                     *Mapping
257*f439973dSWarner Losh   );
258*f439973dSWarner Losh 
259*f439973dSWarner Losh /**
260*f439973dSWarner Losh   Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
261*f439973dSWarner Losh   EfiPciOperationBusMasterCommonBuffer64 mapping.
262*f439973dSWarner Losh 
263*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
264*f439973dSWarner Losh   @param  Type                  This parameter is not used and must be ignored.
265*f439973dSWarner Losh   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
266*f439973dSWarner Losh                                 EfiRuntimeServicesData.
267*f439973dSWarner Losh   @param  Pages                 The number of pages to allocate.
268*f439973dSWarner Losh   @param  HostAddress           A pointer to store the base system memory address of the
269*f439973dSWarner Losh                                 allocated range.
270*f439973dSWarner Losh   @param  Attributes            The requested bit mask of attributes for the allocated range.
271*f439973dSWarner Losh 
272*f439973dSWarner Losh   @retval EFI_SUCCESS           The requested memory pages were allocated.
273*f439973dSWarner Losh   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
274*f439973dSWarner Losh                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
275*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
276*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
277*f439973dSWarner Losh 
278*f439973dSWarner Losh **/
279*f439973dSWarner Losh typedef
280*f439973dSWarner Losh EFI_STATUS
281*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(
282*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,
283*f439973dSWarner Losh   IN     EFI_ALLOCATE_TYPE                        Type,
284*f439973dSWarner Losh   IN     EFI_MEMORY_TYPE                          MemoryType,
285*f439973dSWarner Losh   IN     UINTN                                    Pages,
286*f439973dSWarner Losh   IN OUT VOID                                     **HostAddress,
287*f439973dSWarner Losh   IN     UINT64                                   Attributes
288*f439973dSWarner Losh   );
289*f439973dSWarner Losh 
290*f439973dSWarner Losh /**
291*f439973dSWarner Losh   Frees memory that was allocated with AllocateBuffer().
292*f439973dSWarner Losh 
293*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
294*f439973dSWarner Losh   @param  Pages                 The number of pages to free.
295*f439973dSWarner Losh   @param  HostAddress           The base system memory address of the allocated range.
296*f439973dSWarner Losh 
297*f439973dSWarner Losh   @retval EFI_SUCCESS           The requested memory pages were freed.
298*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
299*f439973dSWarner Losh                                 was not allocated with AllocateBuffer().
300*f439973dSWarner Losh 
301*f439973dSWarner Losh **/
302*f439973dSWarner Losh typedef
303*f439973dSWarner Losh EFI_STATUS
304*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(
305*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,
306*f439973dSWarner Losh   IN  UINTN                                    Pages,
307*f439973dSWarner Losh   IN  VOID                                     *HostAddress
308*f439973dSWarner Losh   );
309*f439973dSWarner Losh 
310*f439973dSWarner Losh /**
311*f439973dSWarner Losh   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
312*f439973dSWarner Losh 
313*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
314*f439973dSWarner Losh 
315*f439973dSWarner Losh   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
316*f439973dSWarner Losh                                 bridge to system memory.
317*f439973dSWarner Losh   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
318*f439973dSWarner Losh                                 host bridge due to a hardware error.
319*f439973dSWarner Losh 
320*f439973dSWarner Losh **/
321*f439973dSWarner Losh typedef
322*f439973dSWarner Losh EFI_STATUS
323*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(
324*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This
325*f439973dSWarner Losh   );
326*f439973dSWarner Losh 
327*f439973dSWarner Losh /**
328*f439973dSWarner Losh   Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
329*f439973dSWarner Losh   attributes that a PCI root bridge is currently using.
330*f439973dSWarner Losh 
331*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
332*f439973dSWarner Losh   @param  Supports              A pointer to the mask of attributes that this PCI root bridge supports
333*f439973dSWarner Losh                                 setting with SetAttributes().
334*f439973dSWarner Losh   @param  Attributes            A pointer to the mask of attributes that this PCI root bridge is currently
335*f439973dSWarner Losh                                 using.
336*f439973dSWarner Losh 
337*f439973dSWarner Losh   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI root
338*f439973dSWarner Losh                                 bridge supports is returned in Supports. If Attributes is
339*f439973dSWarner Losh                                 not NULL, then the attributes that the PCI root bridge is currently
340*f439973dSWarner Losh                                 using is returned in Attributes.
341*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
342*f439973dSWarner Losh 
343*f439973dSWarner Losh 
344*f439973dSWarner Losh **/
345*f439973dSWarner Losh typedef
346*f439973dSWarner Losh EFI_STATUS
347*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(
348*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,
349*f439973dSWarner Losh   OUT UINT64                                   *Supports,
350*f439973dSWarner Losh   OUT UINT64                                   *Attributes
351*f439973dSWarner Losh   );
352*f439973dSWarner Losh 
353*f439973dSWarner Losh /**
354*f439973dSWarner Losh   Sets attributes for a resource range on a PCI root bridge.
355*f439973dSWarner Losh 
356*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
357*f439973dSWarner Losh   @param  Attributes            The mask of attributes to set.
358*f439973dSWarner Losh   @param  ResourceBase          A pointer to the base address of the resource range to be modified by the
359*f439973dSWarner Losh                                 attributes specified by Attributes.
360*f439973dSWarner Losh   @param  ResourceLength        A pointer to the length of the resource range to be modified by the
361*f439973dSWarner Losh                                 attributes specified by Attributes.
362*f439973dSWarner Losh 
363*f439973dSWarner Losh   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
364*f439973dSWarner Losh                                 range specified by ResourceBase and ResourceLength
365*f439973dSWarner Losh                                 were set on the PCI root bridge, and the actual resource range is
366*f439973dSWarner Losh                                 returned in ResuourceBase and ResourceLength.
367*f439973dSWarner Losh   @retval EFI_UNSUPPORTED       A bit is set in Attributes that is not supported by the PCI Root
368*f439973dSWarner Losh                                 Bridge.
369*f439973dSWarner Losh   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
370*f439973dSWarner Losh                                 resource range specified by BaseAddress and Length.
371*f439973dSWarner Losh   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
372*f439973dSWarner Losh 
373*f439973dSWarner Losh **/
374*f439973dSWarner Losh typedef
375*f439973dSWarner Losh EFI_STATUS
376*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(
377*f439973dSWarner Losh   IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,
378*f439973dSWarner Losh   IN     UINT64                                   Attributes,
379*f439973dSWarner Losh   IN OUT UINT64                                   *ResourceBase,
380*f439973dSWarner Losh   IN OUT UINT64                                   *ResourceLength
381*f439973dSWarner Losh   );
382*f439973dSWarner Losh 
383*f439973dSWarner Losh /**
384*f439973dSWarner Losh   Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI
385*f439973dSWarner Losh   resource descriptors.
386*f439973dSWarner Losh 
387*f439973dSWarner Losh   @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
388*f439973dSWarner Losh   @param  Resources             A pointer to the resource descriptors that describe the current
389*f439973dSWarner Losh                                 configuration of this PCI root bridge.
390*f439973dSWarner Losh 
391*f439973dSWarner Losh   @retval EFI_SUCCESS           The current configuration of this PCI root bridge was returned in
392*f439973dSWarner Losh                                 Resources.
393*f439973dSWarner Losh   @retval EFI_UNSUPPORTED       The current configuration of this PCI root bridge could not be
394*f439973dSWarner Losh                                 retrieved.
395*f439973dSWarner Losh 
396*f439973dSWarner Losh **/
397*f439973dSWarner Losh typedef
398*f439973dSWarner Losh EFI_STATUS
399*f439973dSWarner Losh (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(
400*f439973dSWarner Losh   IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL          *This,
401*f439973dSWarner Losh   OUT VOID                                     **Resources
402*f439973dSWarner Losh   );
403*f439973dSWarner Losh 
404*f439973dSWarner Losh ///
405*f439973dSWarner Losh /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are
406*f439973dSWarner Losh /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.
407*f439973dSWarner Losh ///
408*f439973dSWarner Losh struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {
409*f439973dSWarner Losh   ///
410*f439973dSWarner Losh   /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.
411*f439973dSWarner Losh   ///
412*f439973dSWarner Losh   EFI_HANDLE                                         ParentHandle;
413*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM        PollMem;
414*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM        PollIo;
415*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS             Mem;
416*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS             Io;
417*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS             Pci;
418*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM           CopyMem;
419*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP                Map;
420*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP              Unmap;
421*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER    AllocateBuffer;
422*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER        FreeBuffer;
423*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH              Flush;
424*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES     GetAttributes;
425*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES     SetAttributes;
426*f439973dSWarner Losh   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION      Configuration;
427*f439973dSWarner Losh 
428*f439973dSWarner Losh   ///
429*f439973dSWarner Losh   /// The segment number that this PCI root bridge resides.
430*f439973dSWarner Losh   ///
431*f439973dSWarner Losh   UINT32                                             SegmentNumber;
432*f439973dSWarner Losh };
433*f439973dSWarner Losh 
434*f439973dSWarner Losh extern EFI_GUID  gEfiPciRootBridgeIoProtocolGuid;
435*f439973dSWarner Losh 
436*f439973dSWarner Losh #endif
437