Lines Matching +full:bus +full:- +full:range
3 the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific
7 Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
8 SPDX-License-Identifier: BSD-2-Clause-Patent
40 /// - EFI_RESERVE_NONE_IO_ALIAS:<BR>
46 /// - EFI_RESERVE_ISA_IO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS:<BR>
47 /// Sets aside the ISA I/O range and all the aliases during PCI
49 /// ranges. In this scheme, seventy-five percent of the I/O space remains unused.
52 /// ISA range and its aliases
53 /// Legacy VGA range and its aliases
54 /// The PCI bus driver will not allocate I/O addresses out of the ISA I/O
55 /// range and its aliases. The following are the ISA I/O ranges:
56 /// - n100..n3FF
57 /// - n500..n7FF
58 /// - n900..nBFF
59 /// - nD00..nFFF
61 /// In this case, the PCI bus driver will ask the PCI host bridge driver for
64 /// The first device that requests the legacy VGA range will get all the
65 /// legacy VGA range plus its aliased addresses forwarded to it. The first
66 /// device that requests the legacy ISA range will get all the legacy ISA
67 /// range, plus its aliased addresses, forwarded to it.
68 /// - EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS:<BR>
69 /// Sets aside the ISA I/O range (0x100 - 0x3FF) during PCI enumeration
73 /// wants to support non-VGA devices that ask for the ISA range (0x100 -
74 /// 3FF), but not if it also asks for the ISA aliases. The PCI bus driver will
75 /// not allocate I/O addresses out of the legacy ISA I/O range (0x100 -
76 /// 0x3FF) range or the aliases of the VGA I/O range. If a PCI device
78 /// turned down. The first device that requests the legacy VGA range will
79 /// get all the legacy VGA range plus its aliased addresses forwarded to
81 /// aliases, all the upstream PCI-to-PCI bridges must be set up to perform
82 /// 10-bit decode on legacy VGA ranges. To prevent two bridges from
83 /// positively decoding the same address, all PCI-to-PCI bridges that are
87 /// of PCI-to-PCI bridges and is described in the white paper PCI-to-PCI
88 /// Bridges and Card Bus Controllers on Windows 2000, Windows XP,
91 /// - EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS:<BR>
92 /// Sets aside the ISA I/O range (0x100 - 0x3FF) during PCI enumeration.
93 /// VGA I/O ranges are included in the ISA range. By using this selection,
95 /// the ISA range and legacy VGA range, but it does not want to support
97 /// bus driver will not allocate I/O addresses out of the legacy ISA I/O
98 /// range (0x100-0x3FF). If a PCI device driver asks for the ISA I/O
102 /// require VGA aliases. To truly support 16-bit VGA decode, all the PCIto-
104 /// upstream to the parent PCI root bridge, must support 16-bit VGA I/O
105 /// decode. See the PCI-to-PCI Bridge Architecture Specification for
106 /// information regarding the 16-bit VGA decode support. This
108 /// of these bridges does not support 16-bit VGA decode, it will positively
122 /// Sets aside ISA I/O range and all aliases:
123 /// - n100..n3FF
124 /// - n500..n7FF
125 /// - n900..nBFF
126 /// - nD00..nFFF.
131 /// Sets aside ISA I/O range 0x100-0x3FF.
147 /// platform-specific code.
151 /// The phase that indicates the entry point to the PCI Bus Notify phase. This
152 /// platform hook is called before the PCI bus driver calls the
157 /// The phase that indicates the entry point to the PCI Bus Notify phase. This
158 /// platform hook is called before the PCI bus driver calls the
164 /// returning to the PCI Bus Driver Notify phase. This platform hook is called after
165 /// the PCI bus driver calls the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
171 /// returning to the PCI Bus Driver Notify phase. This platform hook is called after
172 /// the PCI bus driver calls the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
182 The notification from the PCI bus enumerator to the platform that it is
186 it can perform platform-specific actions. No specific actions are required.
188 may be added as required in the future. The PCI bus driver calls the platform driver
189 twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol
199 @param[in] Phase The phase of the PCI bus enumeration.
215 The notification from the PCI bus enumerator to the platform for each PCI
219 it can perform platform-specific actions. No specific actions are required.
221 added as required in the future. The PCI bus driver calls the platform driver twice for
222 every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
233 @param[in] PciAddress The address of the PCI device on the PCI bus.
255 enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol
273 Gets the PCI device's option ROM from a platform-specific location.
275 The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.
280 stored in platform-specific storage, and this member function can retrieve it from that storage
281 and return it to the PCI bus driver. The PCI bus driver will call this member function before
311 /// This protocol provides the interface between the PCI bus driver/PCI Host
312 /// Bridge Resource Allocation driver and a platform-specific driver to describe
317 /// The notification from the PCI bus enumerator to the platform that it is about to
322 /// The notification from the PCI bus enumerator to the platform for each PCI
331 /// Gets the PCI device's option ROM from a platform-specific location.