Lines Matching +full:bus +full:- +full:range

4   PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
6   defferent types of bus mastering DMA.
8   Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
9   SPDX-License-Identifier: BSD-2-Clause-Patent
53   /// A read operation from system memory by a bus master that is not capable of producing
58   /// A write operation from system memory by a bus master that is not capable of producing
63   /// Provides both read and write access to system memory by both the processor and a bus
68   /// A read operation from system memory by a bus master that is capable of producing PCI
73   /// A write operation to system memory by a bus master that is capable of producing PCI
78   /// Provides both read and write access to system memory by both the processor and a bus
104 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \  argument
106   (((UINTN) bus) << 24) | \
115   UINT8     Bus;  member
211   Provides the PCI controller-specific addresses required to access system memory from a
212   DMA bus master.
215 …@param  Operation             Indicates if the bus master is going to read or write to system memo…
219 …@param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
223   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
247   @retval EFI_SUCCESS           The range was unmapped.
269                                 allocated range.
270   @param  Attributes            The requested bit mask of attributes for the allocated range.
295   @param  HostAddress           The base system memory address of the allocated range.
298   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
354   Sets attributes for a resource range on a PCI root bridge.
358 …@param  ResourceBase          A pointer to the base address of the resource range to be modified b…
360   @param  ResourceLength        A pointer to the length of the resource range to be modified by the
364                                 range specified by ResourceBase and ResourceLength
365                                 were set on the PCI root bridge, and the actual resource range is
370                                 resource range specified by BaseAddress and Length.