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12

/linux/Documentation/devicetree/bindings/timer/
H A Dsnps,arc-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,arc-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys ARC Local Timer
10 - Vineet Gupta <vgupta@synopsys.com>
13 Synopsys ARC Local Timer with Interrupt Capabilities
15 - Found on all ARC CPUs (ARC700/ARCHS)
16 - Can be optionally programmed to interrupt on Limit
17 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
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H A Dsnps,archs-gfrc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,archs-gfrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
10 - Vineet Gupta <vgupta@synopsys.com>
14 const: snps,archs-gfrc
20 - compatible
21 - clocks
26 - |
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H A Dsnps,archs-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/snps,archs-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
10 - Vineet Gupta <vgupta@synopsys.com>
14 const: snps,archs-rtc
20 - compatible
21 - clocks
26 - |
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/linux/drivers/clocksource/
H A Darc_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
11 * ARCv2 based HS38 cores have RTC (in-core) and GFRC (inside ARConnect/MCIP)
18 #include <linux/clk-provider.h>
26 #include <soc/arc/timers.h>
27 #include <soc/arc/mcip.h>
39 pr_err("timer missing clk\n"); in arc_get_timer_clk()
65 * MCIP_CMD/MCIP_READBACK however micro-architecturally there's in arc_read_gfrc()
66 * an instance PER ARC CORE (not per cluster), and there are dedicated in arc_read_gfrc()
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/linux/arch/arc/boot/dts/
H A Dskeleton_hs.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 compatible = "snps,arc";
8 #address-cells = <1>;
9 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
27 compatible = "snps,arc-timer";
29 interrupt-parent = <&core_intc>;
33 /* 64-bit Local RTC: preferred clocksource for UP */
35 compatible = "snps,archs-timer-rtc";
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H A Dskeleton.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "snps,arc";
13 #address-cells = <1>;
14 #size-cells = <1>;
19 #address-cells = <1>;
20 #size-cells = <0>;
32 compatible = "snps,arc-timer";
34 interrupt-parent = <&core_intc>;
40 compatible = "snps,arc-timer";
H A Dskeleton_hs_idu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 compatible = "snps,arc";
8 #address-cells = <1>;
9 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
45 compatible = "snps,arc-timer";
47 interrupt-parent = <&core_intc>;
51 /* 64-bit Global Free Running Counter */
53 compatible = "snps,archs-timer-gfrc";
H A Dabilis_tb10x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-timer";
30 interrupt-parent = <&intc>;
36 compatible = "snps,arc-timer";
41 #address-cells = <1>;
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H A Dhsdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 * Device Tree for ARC HS Development Kit
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/reset/snps,hsdk-reset.h>
18 #address-cells = <2>;
19 #size-cells = <2>;
22 … "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
30 #address-cells = <1>;
31 #size-cells = <0>;
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/linux/arch/mips/include/asm/dec/
H A Dkn02ca.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-mips/dec/kn02ca.h
5 * Personal DECstation 5000/xx (Maxine or KN02-CA) definitions.
21 #define KN02CA_CPU_INR_TIMER 2 /* ARC periodic timer */
24 * I/O ASIC interrupt bits. Star marks denote non-IRQ status bits.
28 #define KN02CA_IO_INR_POWERON 13 /* (*) ACCESS.Bus/power-on reset */
30 #define KN02CA_IO_INR_TIMER 12 /* ARC periodic timer (?) */
48 #define KN02CA_MER_INTR (1<<27) /* ARC IRQ status & ack */
53 #define KN02CA_MSR_INTREN (1<<26) /* ARC periodic IRQ enable */
H A Dinterrupts.h3 * with the machine-specific interrupt routines.
46 #define DEC_IRQ_TIMER 19 /* ARC periodic timer */
72 #define DEC_IRQ_TC5 DEC_IRQ_ASC /* virtual PMAZ-AA */
73 #define DEC_IRQ_TC6 DEC_IRQ_LANCE /* virtual PMAD-AA */
/linux/include/soc/arc/
H A Dtimers.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
9 #include <soc/arc/arc_aux.h>
11 /* Timer related Aux registers */
12 #define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
13 #define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
14 #define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
15 #define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
16 #define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
17 #define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
/linux/arch/mips/sgi-ip32/
H A Dip32-setup.c10 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
30 #include "ip32-common.h"
34 * This is taken care of in here 'cause they say using Arc later on is
41 return c - '0'; in str2hexnum()
43 return c - 'a' + 10; in str2hexnum()
68 printk(KERN_INFO "Calibrating system timer... "); in plat_time_init()
70 crime->timer = 0; in plat_time_init()
71 while (crime->timer < CRIME_MASTER_FREQ * WAIT_MS / 1000) ; in plat_time_init()
/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/clock/meson8-ddr-clkc.h>
7 #include <dt-bindings/clock/meson8b-clkc.h>
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include <dt-bindings/power/meson8-power.h>
10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
20 #address-cells = <1>;
21 #size-cells = <0>;
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H A Dmeson8b.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
18 #address-cells = <1>;
19 #size-cells = <0>;
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/linux/arch/arc/kernel/
H A Dintc-compact.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
18 * -Platform independent, needed for each CPU (not foldable into init_IRQ)
19 * -Called very early (start_kernel -> setup_arch -> setup_processor)
22 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
28 /* Is timer high priority Interrupt (Level2 in ARCompact jargon) */ in arc_init_IRQ()
38 pr_info("Level-2 interrupts bitset %x\n", level_mask); in arc_init_IRQ()
54 * ARC700 core includes a simple on-chip intc supporting
55 * -per IRQ enable/disable
56 * -2 levels of interrupts (high/low)
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H A Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
31 #include <asm/dsp-impl.h>
32 #include <soc/arc/mcip.h>
38 /* Part of U-boot ABI: see head.S */
100 if (info->arcver < 0x34) in arcompact_mumbojumbo()
105 n += scnprintf(buf + n, len - n, "processor [%d]\t: %s (%s ISA) %s%s%s\n", in arcompact_mumbojumbo()
108 IS_AVAIL1(be, "[Big-Endian]")); in arcompact_mumbojumbo()
114 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n", in arcompact_mumbojumbo()
120 bpu_cache = 256 << (bpu.ent - 1); in arcompact_mumbojumbo()
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H A Dsignal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Signal Handling for ARC
5 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
7 * vineetg: Jan 2010 (Restarting of timer related syscalls)
10 * -do_signal() supports TIF_RESTORE_SIGMASK
11 * -do_signal() no longer needs oldset, required by OLD sys_sigsuspend
12 * -sys_rt_sigsuspend() now comes from generic code, so discard arch
14 * -sys_sigsuspend() no longer needs to fudge ptregs, hence that arg removed
15 * -sys_sigsuspend() no longer loops for do_signal(), sets TIF_xxx and leaves
19 * -Modified Code to support the uClibc provided userland sigreturn stub
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H A Dentry-compact.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Low Level Interrupts/Traps/Exceptions(non-TLB) Handling for ARCompact ISA
5 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
6 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
9 * -Userspace unaligned access emulation
12 * -traced syscall return code (r0) was not saved into pt_regs for restoring
13 * into user reg-file when traded task rets to user space.
14 * -syscalls needing arch-wrappers (mainly for passing sp as pt_regs)
15 * were not invoking post-syscall trace hook (jumping directly into
19 * -Vector table jumps (@8 bytes) converted into branches (@4 bytes)
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/linux/drivers/input/serio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
100 This driver provides support for the PS/2 ports on PA-RISC machines
115 built-in keyboard (as opposed to an external keyboard).
129 in the left-hand column will be interpreted as the corresponding key
130 in the right-hand column.
133 right-hand column will be interpreted as the key shown in the
134 left-hand column.
144 The SDC itself contains a 10ms resolution timer/clock capable
145 of delivering interrupts on a periodic and one-shot basis.
146 The SDC may also be connected to a battery-backed real-time
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/linux/drivers/net/arcnet/
H A Darcnet.c2 * Linux ARCnet driver - device-independent routines
5 * Written 1994-1999 by Avery Pennarun.
6 * Written 1999-2000 by Martin Mares <mj@ucw.cz>.
27 * - Crynwr arcnet.com/arcether.com packet drivers.
28 * - arcnet.c v0.00 dated 1/1/94 and apparently by
29 * Donald Becker - it didn't work :)
30 * - skeleton.c v0.05 dated 11/16/93 by Donald Becker
32 * - RFC's 1201 and 1051 - re: TCP/IP over ARCnet
33 * - The official ARCnet COM9026 data sheets (!) thanks to
35 * - The official ARCnet COM20020 data sheets.
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/linux/include/linux/
H A Dparport.h51 /* ARC has no state. */
61 /* IBM PC-style virtual registers. */
124 * refuses. Do not call parport_release() - the kernel will do this
127 * 2) a wake-up function, called by the resource manager to tell drivers
151 unsigned long waiting; /* long req'd for set_bit --RR */
186 unsigned long base_hi; /* base address (hi - ECR) */
190 int irq; /* interrupt (or -1 for none) */
200 /* If this is a non-default mux
223 struct timer_list timer; member
227 struct parport_device_info probe_info[5]; /* 0-3 + non-IEEE1284.3 */
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/linux/drivers/net/wireless/intel/ipw2x00/
H A Dipw2100.c1 // SPDX-License-Identifier: GPL-2.0-only
4 Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
12 Extensions 0.26 package and copyright (c) 1997-2003 Jean Tourrilhes
16 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
18 Copyright (c) 2002-2003, Jouni Malinen <j@w1.fi>
34 Tx - Commands and Data
84 There are two locks utilized. The first is the low level lock (priv->low_lock)
87 - Access to the Tx/Rx queue lists via priv->low_lock. The lists are as follows:
89 tx_free_list : Holds pre-allocated Tx buffers.
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/linux/
H A DMAINTAINERS5 ----------
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/linux/drivers/usb/host/
H A Doxu210hp-hcd.c1 // SPDX-License-Identifier: GPL-2.0+
6 * This code is *strongly* based on EHCI-HCD code by David Brownell since
7 * the chip is a quasi-EHCI compatible.
20 #include <linux/timer.h>
26 #include <linux/dma-mapping.h>
83 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
86 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
102 u32 hcs_params; /* HCSPARAMS - offset 0x4 */
111 u32 hcc_params; /* HCCPARAMS - offset 0x8 */
117 #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
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