/linux/arch/riscv/boot/dts/microchip/ |
H A D | mpfs.dtsi | 217 interrupt-parent = <&plic>; 231 plic: interrupt-controller@c000000 { label 232 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 248 interrupt-parent = <&plic>; 299 interrupt-parent = <&plic>; 311 interrupt-parent = <&plic>; 323 interrupt-parent = <&plic>; 335 interrupt-parent = <&plic>; 347 interrupt-parent = <&plic>; 358 interrupt-parent = <&plic>; [all …]
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H A D | mpfs-polarberry-fabric.dtsi | 27 interrupt-parent = <&plic>;
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H A D | mpfs-m100pfs-fabric.dtsi | 27 interrupt-parent = <&plic>;
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/linux/arch/riscv/boot/dts/sophgo/ |
H A D | cv1800b.dtsi | 21 interrupt-parent = <&plic>; 38 plic: interrupt-controller@70000000 { label 39 compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
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H A D | sg2002.dtsi | 23 interrupt-parent = <&plic>; 40 plic: interrupt-controller@70000000 { label 41 compatible = "sophgo,sg2002-plic", "thead,c900-plic";
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H A D | cv1812h.dtsi | 23 interrupt-parent = <&plic>; 40 plic: interrupt-controller@70000000 { label 41 compatible = "sophgo,cv1812h-plic", "thead,c900-plic";
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/linux/drivers/irqchip/ |
H A D | irq-sifive-plic.c | 6 #define pr_fmt(fmt) "riscv-plic: " fmt 25 * This driver implements a version of the RISC-V PLIC with the actual layout 30 * The largest number supported by devices marked as 'sifive,plic-1.0.0', is 196 .name = "SiFive PLIC", 211 .name = "SiFive PLIC", 431 { .compatible = "sifive,plic-1.0.0" }, 435 { .compatible = "thead,c900-plic", 464 pr_err("%pfwP: no PLIC context available\n", fwnode); in plic_parse_nr_irqs_and_contexts() 479 pr_err("%pfwP: no PLIC context available\n", fwnode); in plic_parse_nr_irqs_and_contexts() 654 * We can have multiple PLIC instances so setup global state in plic_probe() [all …]
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H A D | irq-riscv-intc.c | 98 * (such as PLIC, SBI IPI, CLINT, APLIC, IMSIC, etc) implement in riscv_intc_irq_eoi() 231 * interrupt controllers (such as PLIC, IMSIC and APLIC in riscv_intc_init()
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/linux/arch/riscv/boot/dts/allwinner/ |
H A D | sun20i-d1s.dtsi | 57 interrupt-parent = <&plic>; 67 plic: interrupt-controller@10000000 { label 68 compatible = "allwinner,sun20i-d1-plic", 69 "thead,c900-plic";
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | riscv,cpu-intc.yaml | 23 (PLIC). 28 tree entry, though external interrupt controllers (like the PLIC, for 30 This means a PLIC interrupt property will typically list the HLICs for all
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H A D | sophgo,sg2042-msi.yaml | 14 PCIe MSI to PLIC interrupts. 62 msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>;
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H A D | starfive,jh8100-intc.yaml | 12 interrupt signal to RISC-V PLIC.
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H A D | andestech,plicsw.yaml | 10 In the Andes platform such as QiLai SoC, the PLIC module is instantiated a
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/linux/arch/riscv/boot/dts/renesas/ |
H A D | r9a07g043f.dtsi | 55 interrupt-parent = <&plic>; 132 plic: interrupt-controller@12c00000 { label 133 compatible = "renesas,r9a07g043-plic", "andestech,nceplic100";
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/linux/arch/riscv/boot/dts/andes/ |
H A D | qilai.dtsi | 126 interrupt-parent = <&plic>; 161 plic: interrupt-controller@2000000 { label 162 compatible = "andestech,qilai-plic",
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | spacemit,sdhci.yaml | 50 interrupt-parent = <&plic>;
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/linux/arch/m68k/include/asm/ |
H A D | m5272sim.h | 110 #define MCF_IRQ_PLIP 75 /* PLIC 2Khz Periodic */ 111 #define MCF_IRQ_PLIA 76 /* PLIC Asynchronous */
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | microchip,mpfs-spi.yaml | 83 interrupt-parent = <&plic>;
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H A D | spi-sifive.yaml | 78 interrupt-parent = <&plic>;
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/linux/arch/powerpc/include/asm/ |
H A D | paca.h | 5 * There are some pointers defined that are utilized by PLIC. 70 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
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/linux/tools/perf/pmu-events/arch/riscv/thead/c900-legacy/ |
H A D | microarch.json | 62 "BriefDescription": "PLIC arbitration time when the interrupt is not responded",
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm-sifive.yaml | 69 interrupt-parent = <&plic>;
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | sifive,gpio.yaml | 82 interrupt-parent = <&plic>;
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H A D | microchip,mpfs-gpio.yaml | 82 interrupt-parent = <&plic>;
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/linux/arch/riscv/boot/dts/sifive/ |
H A D | fu540-c000.dtsi | 182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
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