| /linux/include/linux/phy/ |
| H A D | phy.h | 3 * phy.h -- generic phy header file
19 #include <linux/phy/phy-dp.h>
20 #include <linux/phy/phy-lvds.h>
21 #include <linux/phy/phy-mipi-dphy.h>
23 struct phy;
55 * union phy_configure_opts - Opaque generic phy configuration
58 * the MIPI_DPHY phy mode.
62 * the LVDS phy mode.
71 * struct phy_ops - set of function pointers for performing phy operations
72 * @init: operation to be performed for initializing phy
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| /linux/drivers/phy/ |
| H A D | phy-core.c | 3 * phy-core.c -- Generic Phy framework.
18 #include <linux/phy/phy.h>
25 .name = "phy",
37 struct phy *phy = *(struct phy **)res; in devm_phy_release() local
39 phy_put(dev, phy); in devm_phy_release()
51 struct phy *phy = *(struct phy **)res; in devm_phy_consume() local
53 phy_destroy(phy); in devm_phy_consume()
58 struct phy **phy = res; in devm_phy_match() local
60 return *phy == match_data; in devm_phy_match()
64 * phy_create_lookup() - allocate and register PHY/device association
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| /linux/Documentation/translations/zh_CN/driver-api/phy/ |
| H A D | phy.rst | 4 :Original: Documentation/driver-api/phy/phy.rst
16 本文档解释了 PHY 的通用框架和提供的API，以及使用方法。
21 *PHY* 是物理层的缩写，它被用来把设备连接到一个物理媒介，例如USB控制器
22 有一个提供序列化、反序列化、编码、解码和负责获取所需的数据传输速率的 PHY。
23 注意，有些USB控制器内嵌了 PHY 的功能，其它的则使用了一个外置的PHY，此外
24 使用 PHY 的设备还有无线网、以太网、SATA等（控制器）。
26 创建这个框架的目的是将遍布 Linux 内核的 PHY 驱动程序融入到 drivers/phy，
29 该框架仅适用于使用外部 PHY（PHY 功能未嵌入控制器内）的设备。
34 PHY provider是指实现一个或多个 PHY 实例的实体。对于 PHY provider 仅
35 实现单个 PHY 实例的简单情况，框架在 of_phy_simple_xlate 中提供其自己
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| /linux/drivers/scsi/libsas/ |
| H A D | sas_phy.c | 3 * Serial Attached SCSI (SAS) Phy class
15 /* ---------- Phy events ---------- */
20 struct asd_sas_phy *phy = ev->phy; in sas_phye_loss_of_signal() local
22 phy->error = 0; in sas_phye_loss_of_signal()
23 sas_deform_port(phy, 1); in sas_phye_loss_of_signal()
29 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_done() local
31 phy->error = 0; in sas_phye_oob_done()
37 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_error() local
38 struct sas_ha_struct *sas_ha = phy->ha; in sas_phye_oob_error()
39 struct asd_sas_port *port = phy->port; in sas_phye_oob_error()
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| H A D | sas_port.c | 15 static bool phy_is_wideport_member(struct asd_sas_port *port, struct asd_sas_phy *phy) in phy_is_wideport_member() argument
17 struct sas_ha_struct *sas_ha = phy->ha; in phy_is_wideport_member()
19 if (memcmp(port->attached_sas_addr, phy->attached_sas_addr, in phy_is_wideport_member()
21 memcmp(port->sas_addr, phy->sas_addr, SAS_ADDR_SIZE) != 0)) in phy_is_wideport_member()
26 static void sas_resume_port(struct asd_sas_phy *phy) in sas_resume_port() argument
29 struct asd_sas_port *port = phy->port; in sas_resume_port()
30 struct sas_ha_struct *sas_ha = phy->ha; in sas_resume_port()
34 si->dft->lldd_port_formed(phy); in sas_resume_port()
60 struct ex_phy *phy = &dev->ex_dev.ex_phy[i]; in sas_resume_port() local
62 phy->phy_change_count = -1; in sas_resume_port()
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| /linux/drivers/net/ |
| H A D | sungem_phy.c | 3 * PHY drivers for the sungem ethernet driver.
35 /* Link modes of the BCM5400 PHY */
47 static inline int __sungem_phy_read(struct mii_phy* phy, int id, int reg) in __sungem_phy_read() argument
49 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read()
52 static inline void __sungem_phy_write(struct mii_phy* phy, int id, int reg, int val) in __sungem_phy_write() argument
54 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write()
57 static inline int sungem_phy_read(struct mii_phy* phy, int reg) in sungem_phy_read() argument
59 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read()
62 static inline void sungem_phy_write(struct mii_phy* phy, int reg, int val) in sungem_phy_write() argument
64 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write()
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| /linux/drivers/net/ethernet/ibm/emac/ |
| H A D | phy.c | 3 * drivers/net/ethernet/ibm/emac/phy.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support.
30 #include "phy.h"
35 static inline int _phy_read(struct mii_phy *phy, int reg) in _phy_read() argument
37 return phy->mdio_read(phy->dev, phy->address, reg); in _phy_read()
40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument
42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write()
45 static inline int gpcs_phy_read(struct mii_phy *phy, int reg) in gpcs_phy_read() argument
47 return phy->mdio_read(phy->dev, phy->gpcs_address, reg); in gpcs_phy_read()
50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument
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| /linux/drivers/phy/hisilicon/ |
| H A D | phy-hi3670-pcie.c | 3 * PCIe phy driver for Kirin 970
29 #include <linux/phy/phy.h>
49 /* PCIe PHY registers */
173 static inline void hi3670_apb_phy_writel(struct hi3670_pcie_phy *phy, u32 val,
176 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
179 static inline u32 hi3670_apb_phy_readl(struct hi3670_pcie_phy *phy, u32 reg) in hi3670_apb_phy_updatel() argument
181 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_updatel()
184 static inline void hi3670_apb_phy_updatel(struct hi3670_pcie_phy *phy, in hi3670_apb_phy_updatel()
189 regval = hi3670_apb_phy_readl(phy, re in hi3670_apb_phy_updatel()
168 hi3670_apb_phy_writel(struct hi3670_pcie_phy * phy,u32 val,u32 reg) hi3670_apb_phy_writel() argument
174 hi3670_apb_phy_readl(struct hi3670_pcie_phy * phy,u32 reg) hi3670_apb_phy_readl() argument
190 kirin_apb_natural_phy_writel(struct hi3670_pcie_phy * phy,u32 val,u32 reg) kirin_apb_natural_phy_writel() argument
196 kirin_apb_natural_phy_readl(struct hi3670_pcie_phy * phy,u32 reg) kirin_apb_natural_phy_readl() argument
202 hi3670_pcie_phy_oe_enable(struct hi3670_pcie_phy * phy,bool enable) hi3670_pcie_phy_oe_enable() argument
215 hi3670_pcie_get_eyeparam(struct hi3670_pcie_phy * phy) hi3670_pcie_get_eyeparam() argument
233 hi3670_pcie_set_eyeparam(struct hi3670_pcie_phy * phy) hi3670_pcie_set_eyeparam() argument
278 hi3670_pcie_natural_cfg(struct hi3670_pcie_phy * phy) hi3670_pcie_natural_cfg() argument
306 hi3670_pcie_pll_init(struct hi3670_pcie_phy * phy) hi3670_pcie_pll_init() argument
334 hi3670_pcie_pll_ctrl(struct hi3670_pcie_phy * phy,bool enable) hi3670_pcie_pll_ctrl() argument
374 hi3670_pcie_hp_debounce_gt(struct hi3670_pcie_phy * phy,bool open) hi3670_pcie_hp_debounce_gt() argument
386 hi3670_pcie_phyref_gt(struct hi3670_pcie_phy * phy,bool open) hi3670_pcie_phyref_gt() argument
403 hi3670_pcie_oe_ctrl(struct hi3670_pcie_phy * phy,bool en_flag) hi3670_pcie_oe_ctrl() argument
429 hi3670_pcie_ioref_gt(struct hi3670_pcie_phy * phy,bool open) hi3670_pcie_ioref_gt() argument
462 hi3670_pcie_allclk_ctrl(struct hi3670_pcie_phy * phy,bool clk_on) hi3670_pcie_allclk_ctrl() argument
503 is_pipe_clk_stable(struct hi3670_pcie_phy * phy) is_pipe_clk_stable() argument
524 hi3670_pcie_noc_power(struct hi3670_pcie_phy * phy,bool enable) hi3670_pcie_noc_power() argument
554 hi3670_pcie_get_resources_from_pcie(struct hi3670_pcie_phy * phy) hi3670_pcie_get_resources_from_pcie() argument
590 kirin_pcie_clk_ctrl(struct hi3670_pcie_phy * phy,bool enable) kirin_pcie_clk_ctrl() argument
639 struct hi3670_pcie_phy *phy = phy_get_drvdata(generic_phy); hi3670_pcie_phy_init() local
662 struct hi3670_pcie_phy *phy = phy_get_drvdata(generic_phy); hi3670_pcie_phy_power_on() local
717 struct hi3670_pcie_phy *phy = phy_get_drvdata(generic_phy); hi3670_pcie_phy_power_off() local
745 hi3670_pcie_phy_get_resources(struct hi3670_pcie_phy * phy,struct platform_device * pdev) hi3670_pcie_phy_get_resources() argument
798 struct hi3670_pcie_phy *phy; hi3670_pcie_phy_probe() local
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| /linux/drivers/phy/ralink/ |
| H A D | phy-ralink-usb.c | 17 #include <linux/phy/phy.h>
56 struct phy *phy; member
61 static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg) in u2_phy_w32() argument
63 writel(val, phy->base + reg); in u2_phy_w32()
66 static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg) in u2_phy_r32() argument
68 return readl(phy->base + reg); in u2_phy_r32()
71 static void ralink_usb_phy_init(struct ralink_usb_phy *phy) in ralink_usb_phy_init() argument
73 u2_phy_r32(phy, OFS_U2_PHY_AC2); in ralink_usb_phy_init()
74 u2_phy_r32(phy, OFS_U2_PHY_ACR0); in ralink_usb_phy_init()
75 u2_phy_r32(phy, OFS_U2_PHY_DCR0); in ralink_usb_phy_init()
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| H A D | phy-mt7621-pci.c | 3 * Mediatek MT7621 PCI PHY Driver
7 #include <dt-bindings/phy/phy.h>
13 #include <linux/phy/phy.h>
66 * struct mt7621_pci_phy - Mt7621 Pcie PHY core
69 * @phy: pointer to the kernel PHY device
72 * @has_dual_port: if the phy has dual ports.
79 struct phy *phy; member
86 static inline void mt7621_phy_rmw(struct mt7621_pci_phy *phy, in mt7621_phy_rmw() argument
98 regmap_read(phy->regmap, reg, &val); in mt7621_phy_rmw()
101 regmap_write(phy->regmap, reg, val); in mt7621_phy_rmw()
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| /linux/drivers/media/platform/ti/cal/ |
| H A D | cal-camerarx.c | 33 static inline u32 camerarx_read(struct cal_camerarx *phy, u32 offset) in camerarx_read() argument
35 return ioread32(phy->base + offset); in camerarx_read()
38 static inline void camerarx_write(struct cal_camerarx *phy, u32 offset, u32 val) in camerarx_write() argument
40 iowrite32(val, phy->base + offset); in camerarx_write()
48 static s64 cal_camerarx_get_ext_link_freq(struct cal_camerarx *phy) in cal_camerarx_get_ext_link_freq() argument
50 struct v4l2_mbus_config_mipi_csi2 *mipi_csi2 = &phy->endpoint.bus.mipi_csi2; in cal_camerarx_get_ext_link_freq()
58 state = v4l2_subdev_get_locked_active_state(&phy->subdev); in cal_camerarx_get_ext_link_freq()
68 freq = v4l2_get_link_freq(phy->source->ctrl_handler, bpp, 2 * num_lanes); in cal_camerarx_get_ext_link_freq()
70 phy_err(phy, "failed to get link freq for subdev '%s'\n", in cal_camerarx_get_ext_link_freq()
71 phy->source->name); in cal_camerarx_get_ext_link_freq()
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| /linux/Documentation/driver-api/phy/ |
| H A D | phy.rst | 2 PHY subsystem
7 This document explains the Generic PHY Framework along with the APIs provided,
13 *PHY* is the abbreviation for physical layer. It is used to connect a device
14 to the physical medium e.g., the USB controller has a PHY to provide functions
17 controllers have PHY functionality embedded into it and others use an external
18 PHY. Other peripherals that use PHY include Wireless LAN, Ethernet,
21 The intention of creating this framework is to bring the PHY drivers spread
22 all over the Linux kernel to drivers/phy to increase code re-use and for
25 This framework will be of use only to devices that use external PHY (PHY
28 Registering/Unregistering the PHY provider
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| /linux/drivers/net/phy/ |
| H A D | phy_led_triggers.c | 4 #include <linux/phy.h>
8 static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy, in phy_speed_to_led_trigger() argument
13 for (i = 0; i < phy->phy_num_led_triggers; i++) { in phy_speed_to_led_trigger()
14 if (phy->phy_led_triggers[i].speed == speed) in phy_speed_to_led_trigger()
15 return &phy->phy_led_triggers[i]; in phy_speed_to_led_trigger()
20 static void phy_led_trigger_no_link(struct phy_device *phy) in phy_led_trigger_no_link() argument
22 if (phy->last_triggered) { in phy_led_trigger_no_link()
23 led_trigger_event(&phy->last_triggered->trigger, LED_OFF); in phy_led_trigger_no_link()
24 led_trigger_event(&phy->led_link_trigger->trigger, LED_OFF); in phy_led_trigger_no_link()
25 phy->last_triggered = NULL; in phy_led_trigger_no_link()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_combo_phy.c | 56 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in icl_get_procmon_ref_values() argument
60 val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy)); in icl_get_procmon_ref_values()
79 enum phy phy) in icl_set_procmon_ref_values() argument
83 procmon = icl_get_procmon_ref_values(dev_priv, phy); in icl_set_procmon_ref_values()
85 intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy), in icl_set_procmon_ref_values()
88 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
89 intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10); in icl_set_procmon_ref_values()
93 enum phy phy, i915_reg_t reg, u32 mask, in check_phy_reg() argument
100 "Combo PHY %c reg %08x state mismatch: " in check_phy_reg()
102 phy_name(phy), in check_phy_reg()
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| H A D | intel_combo_phy_regs.h | 17 #define _ICL_COMBOPHY(phy) _PICK(phy, _ICL_COMBOPHY_A, \ argument
24 #define _ICL_PORT_CL_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
27 #define ICL_PORT_CL_DW5(phy) _MMIO(_ICL_PORT_CL_DW(5, phy)) argument
31 #define ICL_PORT_CL_DW10(phy) _MMIO(_ICL_PORT_CL_DW(10, phy)) argument
46 #define ICL_PORT_CL_DW12(phy) _MMIO(_ICL_PORT_CL_DW(12, phy)) argument
51 #define _ICL_PORT_COMP_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
54 #define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy)) argument
57 #define ICL_PORT_COMP_DW1(phy) _MMIO(_ICL_PORT_COMP_DW(1, phy)) argument
59 #define ICL_PORT_COMP_DW3(phy) _MMIO(_ICL_PORT_COMP_DW(3, phy)) argument
69 #define ICL_PORT_COMP_DW8(phy) _MMIO(_ICL_PORT_COMP_DW(8, phy)) argument
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| /linux/drivers/nfc/pn544/ |
| H A D | i2c.c | 186 static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy) in pn544_hci_i2c_platform_init() argument
192 nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n"); in pn544_hci_i2c_platform_init()
195 gpiod_set_value_cansleep(phy->gpiod_fw, 0); in pn544_hci_i2c_platform_init()
198 phy->en_polarity = polarity; in pn544_hci_i2c_platform_init()
202 gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity); in pn544_hci_i2c_platform_init()
206 gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity); in pn544_hci_i2c_platform_init()
210 dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n"); in pn544_hci_i2c_platform_init()
211 ret = i2c_master_send(phy->i2c_dev, rset_cmd, count); in pn544_hci_i2c_platform_init()
213 nfc_info(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
221 nfc_err(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
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| /linux/drivers/phy/allwinner/ |
| H A D | phy-sun9i-usb.c | 3 * Allwinner sun9i USB phy driver
7 * Based on phy-sun4i-usb.c from
18 #include <linux/phy/phy.h>
36 struct phy *phy; member
44 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable) in sun9i_usb_phy_passby() argument
52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby()
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
66 static int sun9i_usb_phy_init(struct phy *_phy) in sun9i_usb_phy_init()
68 struct sun9i_usb_phy *phy = phy_get_drvdata(_phy); in sun9i_usb_phy_init() local
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| H A D | phy-sun50i-usb3.c | 3 * Allwinner sun50i(H6) USB 3.0 phy driver
7 * Based on phy-sun9i-usb.c, which is:
21 #include <linux/phy/phy.h>
38 /* PHY External Control Register */
43 /* PHY Tune High Register */
56 struct phy *phy; member
62 static void sun50i_usb3_phy_open(struct sun50i_usb3_phy *phy) in sun50i_usb3_phy_open() argument
66 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
69 writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
71 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
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| /linux/drivers/net/ethernet/intel/igb/ |
| H A D | e1000_phy.c | 31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
51 * Reads the PHY registers and stores the PHY ID and possibly the PHY
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id() local
60 /* ensure PHY page selection to fix misconfigured i210 */ in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
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| /linux/arch/arm64/boot/dts/microchip/ |
| H A D | sparx5_pcb135_board.dtsi | 202 phy0: ethernet-phy@0 {
205 phy1: ethernet-phy@1 {
208 phy2: ethernet-phy@2 {
211 phy3: ethernet-phy@3 {
214 phy4: ethernet-phy@4 {
217 phy5: ethernet-phy@5 {
220 phy6: ethernet-phy@6 {
223 phy7: ethernet-phy@7 {
226 phy8: ethernet-phy@8 {
229 phy9: ethernet-phy@9 {
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| /linux/drivers/net/ethernet/chelsio/cxgb3/ |
| H A D | ael1002.c | 62 /* PHY module I2C device address */
68 /* PHY transceiver type */
84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument
90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs()
93 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs()
100 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument
103 phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon()
106 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon()
111 * Read an 8-bit word from a device attached to the PHY's i2c bus.
113 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) in ael_i2c_rd() argument
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| /linux/drivers/phy/starfive/ |
| H A D | phy-jh7110-usb.c | 3 * StarFive JH7110 USB 2.0 PHY driver
15 #include <linux/phy/phy.h>
28 struct phy *phy; member
36 static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set) in usb2_set_ls_keepalive() argument
41 val = readl(phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
47 writel(val, phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
50 static int usb2_phy_set_mode(struct phy *_phy, in usb2_phy_set_mode()
53 struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy); in usb2_phy_set_mode() local
64 if (mode != phy->mode) { in usb2_phy_set_mode()
65 dev_dbg(&_phy->dev, "Changing phy to %d\n", mode); in usb2_phy_set_mode()
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| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-snps-eusb2.c | 11 #include <linux/phy/phy.h>
125 struct phy *phy; member
135 struct phy *repeater;
138 static int qcom_snps_eusb2_hsphy_set_mode(struct phy *p, enum phy_mode mode, int submode) in qcom_snps_eusb2_hsphy_set_mode()
140 struct qcom_snps_eusb2_hsphy *phy = phy_get_drvdata(p); in qcom_snps_eusb2_hsphy_set_mode() local
142 phy->mode = mode; in qcom_snps_eusb2_hsphy_set_mode()
144 return phy_set_mode_ext(phy->repeater, mode, submode); in qcom_snps_eusb2_hsphy_set_mode()
161 static void qcom_eusb2_default_parameters(struct qcom_snps_eusb2_hsphy *phy) in qcom_eusb2_default_parameters() argument
164 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
169 qcom_snps_eusb2_hsphy_write_mask(phy->base, USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
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| H A D | phy-qcom-ipq4019-usb.c | 17 #include <linux/phy/phy.h>
23 struct phy *phy; member
29 static int ipq4019_ss_phy_power_off(struct phy *_phy) in ipq4019_ss_phy_power_off()
31 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_ss_phy_power_off() local
33 reset_control_assert(phy->por_rst); in ipq4019_ss_phy_power_off()
39 static int ipq4019_ss_phy_power_on(struct phy *_phy) in ipq4019_ss_phy_power_on()
41 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_ss_phy_power_on() local
45 reset_control_deassert(phy->por_rst); in ipq4019_ss_phy_power_on()
55 static int ipq4019_hs_phy_power_off(struct phy *_phy) in ipq4019_hs_phy_power_off()
57 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_hs_phy_power_off() local
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| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun8i_hdmi_phy.c | 127 static void sun8i_hdmi_phy_set_polarity(struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_set_polarity() argument
138 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG, in sun8i_hdmi_phy_set_polarity()
147 struct sun8i_hdmi_phy *phy = data; in sun8i_a83t_hdmi_phy_config() local
149 sun8i_hdmi_phy_set_polarity(phy, mode); in sun8i_a83t_hdmi_phy_config()
151 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_a83t_hdmi_phy_config()
211 struct sun8i_hdmi_phy *phy = data; in sun8i_a83t_hdmi_phy_disable() local
216 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_a83t_hdmi_phy_disable()
233 struct sun8i_hdmi_phy *phy = data; in sun8i_h3_hdmi_phy_config() local
242 if (phy->variant->has_phy_clk) in sun8i_h3_hdmi_phy_config()
243 clk_set_rate(phy->clk_phy, clk_rate); in sun8i_h3_hdmi_phy_config()
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