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/linux/drivers/phy/
H A Dphy-core.c3 * phy-core.c -- Generic Phy framework.
18 #include <linux/phy/phy.h>
25 .name = "phy",
37 struct phy *phy = *(struct phy **)res; in devm_phy_release() local
39 phy_put(dev, phy); in devm_phy_release()
51 struct phy *phy = *(struct phy **)res; in devm_phy_consume() local
53 phy_destroy(phy); in devm_phy_consume()
58 struct phy **phy = res; in devm_phy_match() local
60 return *phy == match_data; in devm_phy_match()
64 * phy_create_lookup() - allocate and register PHY/device association
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H A Dphy-snps-eusb2.c11 #include <linux/phy/phy.h>
158 int (*phy_init)(struct phy *p);
164 struct phy *phy; member
175 struct phy *repeater;
180 static int snps_eusb2_hsphy_set_mode(struct phy *p, enum phy_mode mode, int submode) in snps_eusb2_hsphy_set_mode()
182 struct snps_eusb2_hsphy *phy = phy_get_drvdata(p); in snps_eusb2_hsphy_set_mode() local
184 phy->mode = mode; in snps_eusb2_hsphy_set_mode()
186 return phy_set_mode_ext(phy->repeater, mode, submode); in snps_eusb2_hsphy_set_mode()
203 static void qcom_eusb2_default_parameters(struct snps_eusb2_hsphy *phy) in qcom_eusb2_default_parameters() argument
206 snps_eusb2_hsphy_write_mask(phy->base, QCOM_USB_PHY_CFG_CTRL_9, in qcom_eusb2_default_parameters()
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/linux/Documentation/translations/zh_CN/driver-api/phy/
H A Dphy.rst4 :Original: Documentation/driver-api/phy/phy.rst
16 本文档解释了 PHY 的通用框架和提供的API，以及使用方法。
21 *PHY* 是物理层的缩写，它被用来把设备连接到一个物理媒介，例如USB控制器
22 有一个提供序列化、反序列化、编码、解码和负责获取所需的数据传输速率的 PHY。
23 注意，有些USB控制器内嵌了 PHY 的功能，其它的则使用了一个外置的PHY，此外
24 使用 PHY 的设备还有无线网、以太网、SATA等（控制器）。
26 创建这个框架的目的是将遍布 Linux 内核的 PHY 驱动程序融入到 drivers/phy，
29 该框架仅适用于使用外部 PHY（PHY 功能未嵌入控制器内）的设备。
34 PHY provider是指实现一个或多个 PHY 实例的实体。对于 PHY provider 仅
35 实现单个 PHY 实例的简单情况，框架在 of_phy_simple_xlate 中提供其自己
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/linux/drivers/scsi/libsas/
H A Dsas_phy.c3 * Serial Attached SCSI (SAS) Phy class
15 /* ---------- Phy events ---------- */
20 struct asd_sas_phy *phy = ev->phy; in sas_phye_loss_of_signal() local
22 phy->error = 0; in sas_phye_loss_of_signal()
23 sas_deform_port(phy, true); in sas_phye_loss_of_signal()
29 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_done() local
31 phy->error = 0; in sas_phye_oob_done()
37 struct asd_sas_phy *phy = ev->phy; in sas_phye_oob_error() local
38 struct sas_ha_struct *sas_ha = phy->ha; in sas_phye_oob_error()
39 struct asd_sas_port *port = phy->port; in sas_phye_oob_error()
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H A Dsas_port.c15 static bool phy_is_wideport_member(struct asd_sas_port *port, struct asd_sas_phy *phy) in phy_is_wideport_member() argument
17 struct sas_ha_struct *sas_ha = phy->ha; in phy_is_wideport_member()
19 if (memcmp(port->attached_sas_addr, phy->attached_sas_addr, in phy_is_wideport_member()
21 memcmp(port->sas_addr, phy->sas_addr, SAS_ADDR_SIZE) != 0)) in phy_is_wideport_member()
26 static void sas_resume_port(struct asd_sas_phy *phy) in sas_resume_port() argument
29 struct asd_sas_port *port = phy->port; in sas_resume_port()
30 struct sas_ha_struct *sas_ha = phy->ha; in sas_resume_port()
34 si->dft->lldd_port_formed(phy); in sas_resume_port()
60 struct ex_phy *phy = &dev->ex_dev.ex_phy[i]; in sas_resume_port() local
62 phy->phy_change_count = -1; in sas_resume_port()
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/linux/drivers/net/ethernet/ibm/emac/
H A Dphy.c3 * drivers/net/ethernet/ibm/emac/phy.c
5 * Driver for PowerPC 4xx on-chip ethernet controller, PHY support.
30 #include "phy.h"
35 static inline int _phy_read(struct mii_phy *phy, int reg) in _phy_read() argument
37 return phy->mdio_read(phy->dev, phy->address, reg); in _phy_read()
40 static inline void _phy_write(struct mii_phy *phy, int reg, int val) in _phy_write() argument
42 phy->mdio_write(phy->dev, phy->address, reg, val); in _phy_write()
45 static inline int gpcs_phy_read(struct mii_phy *phy, int reg) in gpcs_phy_read() argument
47 return phy->mdio_read(phy->dev, phy->gpcs_address, reg); in gpcs_phy_read()
50 static inline void gpcs_phy_write(struct mii_phy *phy, int reg, int val) in gpcs_phy_write() argument
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/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
7 title: Qualcomm QMP PHY controller (PCIe, SC8280XP)
13 The QMP PHY controller supports physical layer functionality for a number of
19 - qcom,glymur-qmp-gen4x2-pcie-phy
20 - qcom,glymur-qmp-gen5x4-pcie-phy
21 - qcom,kaanapali-qmp-gen3x2-pcie-phy
22 - qcom,qcs615-qmp-gen3x1-pcie-phy
23 - qcom,qcs8300-qmp-gen4x2-pcie-phy
24 - qcom,sa8775p-qmp-gen4x2-pcie-phy
25 - qcom,sa8775p-qmp-gen4x4-pcie-phy
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/linux/drivers/phy/ralink/
H A Dphy-ralink-usb.c17 #include <linux/phy/phy.h>
56 struct phy *phy; member
61 static void u2_phy_w32(struct ralink_usb_phy *phy, u32 val, u32 reg) in u2_phy_w32() argument
63 writel(val, phy->base + reg); in u2_phy_w32()
66 static u32 u2_phy_r32(struct ralink_usb_phy *phy, u32 reg) in u2_phy_r32() argument
68 return readl(phy->base + reg); in u2_phy_r32()
71 static void ralink_usb_phy_init(struct ralink_usb_phy *phy) in ralink_usb_phy_init() argument
73 u2_phy_r32(phy, OFS_U2_PHY_AC2); in ralink_usb_phy_init()
74 u2_phy_r32(phy, OFS_U2_PHY_ACR0); in ralink_usb_phy_init()
75 u2_phy_r32(phy, OFS_U2_PHY_DCR0); in ralink_usb_phy_init()
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H A Dphy-mt7621-pci.c3 * Mediatek MT7621 PCI PHY Driver
7 #include <dt-bindings/phy/phy.h>
13 #include <linux/phy/phy.h>
66 * struct mt7621_pci_phy - Mt7621 Pcie PHY core
69 * @phy: pointer to the kernel PHY device
72 * @has_dual_port: if the phy has dual ports.
79 struct phy *phy; member
86 static inline void mt7621_phy_rmw(struct mt7621_pci_phy *phy, in mt7621_phy_rmw() argument
98 regmap_read(phy->regmap, reg, &val); in mt7621_phy_rmw()
101 regmap_write(phy->regmap, reg, val); in mt7621_phy_rmw()
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/linux/drivers/phy/ti/
H A Dphy-omap-usb2.c3 * omap-usb2.c - USB PHY, talking to USB controller on TI SoCs.
17 #include <linux/phy/omap_control_phy.h>
18 #include <linux/phy/omap_usb.h>
19 #include <linux/phy/phy.h>
55 struct usb_phy phy; member
71 #define phy_to_omapusb(x) container_of((x), struct omap_usb, phy)
93 * omap_usb2_set_comparator() - links the comparator present in the system with this phy
95 * @comparator: the companion phy(comparator) for this phy
97 * The phy companion driver should call this API passing the phy_companion
98 * filled with set_vbus and start_srp to be used by usb phy.
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H A Dphy-ti-pipe3.c3 * phy-ti-pipe3 - PIPE3 PHY driver.
13 #include <linux/phy/phy.h>
20 #include <linux/phy/omap_control_phy.h>
300 static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy) in ti_pipe3_get_dpll_params() argument
303 struct pipe3_dpll_map *dpll_map = phy->dpll_map; in ti_pipe3_get_dpll_params()
305 rate = clk_get_rate(phy->sys_clk); in ti_pipe3_get_dpll_params()
312 dev_err(phy->dev, "No DPLL configuration for %lu Hz SYS CLK\n", rate); in ti_pipe3_get_dpll_params()
317 static int ti_pipe3_enable_clocks(struct ti_pipe3 *phy);
318 static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy);
320 static int ti_pipe3_power_off(struct phy *x) in ti_pipe3_power_off()
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H A Dphy-dm816x-usb.c15 #include <linux/phy/phy.h>
22 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
32 * Finally, the phy on dm814x and am335x is different from dm816x.
35 #define DM816X_USB_CTRL_PHYSLEEP1 BIT(1) /* Enable the first phy */
36 #define DM816X_USB_CTRL_PHYSLEEP0 BIT(0) /* Enable the second phy */
47 struct usb_phy phy; member
71 static int dm816x_usb_phy_init(struct phy *x) in dm816x_usb_phy_init()
73 struct dm816x_usb_phy *phy = phy_get_drvdata(x); in dm816x_usb_phy_init() local
76 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
77 dev_warn(phy->dev, "nonstandard phy refclk\n"); in dm816x_usb_phy_init()
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/linux/drivers/net/phy/
H A Dphy_led_triggers.c4 #include <linux/phy.h>
10 static struct phy_led_trigger *phy_speed_to_led_trigger(struct phy_device *phy, in phy_speed_to_led_trigger() argument
15 for (i = 0; i < phy->phy_num_led_triggers; i++) { in phy_speed_to_led_trigger()
16 if (phy->phy_led_triggers[i].speed == speed) in phy_speed_to_led_trigger()
17 return &phy->phy_led_triggers[i]; in phy_speed_to_led_trigger()
22 static void phy_led_trigger_no_link(struct phy_device *phy) in phy_led_trigger_no_link() argument
24 if (phy->last_triggered) { in phy_led_trigger_no_link()
25 led_trigger_event(&phy->last_triggered->trigger, LED_OFF); in phy_led_trigger_no_link()
26 led_trigger_event(&phy->led_link_trigger->trigger, LED_OFF); in phy_led_trigger_no_link()
27 phy->last_triggered = NULL; in phy_led_trigger_no_link()
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/linux/drivers/nfc/pn544/
H A Di2c.c186 static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy) in pn544_hci_i2c_platform_init() argument
192 nfc_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n"); in pn544_hci_i2c_platform_init()
195 gpiod_set_value_cansleep(phy->gpiod_fw, 0); in pn544_hci_i2c_platform_init()
198 phy->en_polarity = polarity; in pn544_hci_i2c_platform_init()
202 gpiod_set_value_cansleep(phy->gpiod_en, !phy->en_polarity); in pn544_hci_i2c_platform_init()
206 gpiod_set_value_cansleep(phy->gpiod_en, phy->en_polarity); in pn544_hci_i2c_platform_init()
210 dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n"); in pn544_hci_i2c_platform_init()
211 ret = i2c_master_send(phy->i2c_dev, rset_cmd, count); in pn544_hci_i2c_platform_init()
213 nfc_info(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
221 nfc_err(&phy->i2c_dev->dev, in pn544_hci_i2c_platform_init()
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/linux/drivers/net/ethernet/intel/igb/
H A De1000_phy.c31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
51 * Reads the PHY registers and stores the PHY ID and possibly the PHY
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id() local
60 /* ensure PHY page selection to fix misconfigured i210 */ in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
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/linux/drivers/phy/allwinner/
H A Dphy-sun9i-usb.c3 * Allwinner sun9i USB phy driver
7 * Based on phy-sun4i-usb.c from
18 #include <linux/phy/phy.h>
36 struct phy *phy; member
44 static void sun9i_usb_phy_passby(struct sun9i_usb_phy *phy, int enable) in sun9i_usb_phy_passby() argument
52 if (phy->type == USBPHY_INTERFACE_MODE_HSIC) in sun9i_usb_phy_passby()
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
66 static int sun9i_usb_phy_init(struct phy *_phy) in sun9i_usb_phy_init()
68 struct sun9i_usb_phy *phy = phy_get_drvdata(_phy); in sun9i_usb_phy_init() local
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H A Dphy-sun50i-usb3.c3 * Allwinner sun50i(H6) USB 3.0 phy driver
7 * Based on phy-sun9i-usb.c, which is:
21 #include <linux/phy/phy.h>
38 /* PHY External Control Register */
43 /* PHY Tune High Register */
56 struct phy *phy; member
62 static void sun50i_usb3_phy_open(struct sun50i_usb3_phy *phy) in sun50i_usb3_phy_open() argument
66 val = readl(phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
69 writel(val, phy->regs + SUNXI_PHY_EXTERNAL_CONTROL); in sun50i_usb3_phy_open()
71 val = readl(phy->regs + SUNXI_PIPE_CLOCK_CONTROL); in sun50i_usb3_phy_open()
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/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5_pcb135_board.dtsi202 phy0: ethernet-phy@0 {
205 phy1: ethernet-phy@1 {
208 phy2: ethernet-phy@2 {
211 phy3: ethernet-phy@3 {
214 phy4: ethernet-phy@4 {
217 phy5: ethernet-phy@5 {
220 phy6: ethernet-phy@6 {
223 phy7: ethernet-phy@7 {
226 phy8: ethernet-phy@8 {
229 phy9: ethernet-phy@9 {
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/linux/drivers/phy/samsung/
H A Dphy-samsung-ufs.c3 * UFS PHY driver for Samsung SoC
18 #include <linux/phy/phy.h>
22 #include "phy-samsung-ufs.h"
24 #define for_each_phy_lane(phy, i) \ argument
25 for (i = 0; i < (phy)->lane_cnt; i++)
31 void samsung_ufs_phy_config(struct samsung_ufs_phy *phy, in samsung_ufs_phy_config() argument
39 writel(cfg->val, (phy)->reg_pma + cfg->off_0); in samsung_ufs_phy_config()
43 writel(cfg->val, (phy)->reg_pma + cfg->off_1); in samsung_ufs_phy_config()
48 int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy, u8 lane) in samsung_ufs_phy_wait_for_lock_acq() argument
50 struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy); in samsung_ufs_phy_wait_for_lock_acq()
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/linux/drivers/net/ethernet/chelsio/cxgb3/
H A Dael1002.c62 /* PHY module I2C device address */
68 /* PHY transceiver type */
84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument
90 err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr, in set_phy_regs()
93 err = t3_mdio_change_bits(phy, rv->mmd_addr, in set_phy_regs()
100 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument
103 phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon()
106 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon()
111 * Read an 8-bit word from a device attached to the PHY's i2c bus.
113 static int ael_i2c_rd(struct cphy *phy, int dev_addr, int word_addr) in ael_i2c_rd() argument
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/linux/drivers/phy/starfive/
H A Dphy-jh7110-usb.c3 * StarFive JH7110 USB 2.0 PHY driver
15 #include <linux/phy/phy.h>
30 struct phy *phy; member
38 static void usb2_set_ls_keepalive(struct jh7110_usb2_phy *phy, bool set) in usb2_set_ls_keepalive() argument
43 val = readl(phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
49 writel(val, phy->regs + USB_LS_KEEPALIVE_OFF); in usb2_set_ls_keepalive()
52 static int usb2_phy_set_mode(struct phy *_phy, in usb2_phy_set_mode()
55 struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy); in usb2_phy_set_mode() local
66 if (mode != phy->mode) { in usb2_phy_set_mode()
67 dev_dbg(&_phy->dev, "Changing phy to %d\n", mode); in usb2_phy_set_mode()
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/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_hdmi_phy.c127 static void sun8i_hdmi_phy_set_polarity(struct sun8i_hdmi_phy *phy, in sun8i_hdmi_phy_set_polarity() argument
138 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_DBG_CTRL_REG, in sun8i_hdmi_phy_set_polarity()
147 struct sun8i_hdmi_phy *phy = data; in sun8i_a83t_hdmi_phy_config() local
149 sun8i_hdmi_phy_set_polarity(phy, mode); in sun8i_a83t_hdmi_phy_config()
151 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_a83t_hdmi_phy_config()
211 struct sun8i_hdmi_phy *phy = data; in sun8i_a83t_hdmi_phy_disable() local
216 regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_REXT_CTRL_REG, in sun8i_a83t_hdmi_phy_disable()
233 struct sun8i_hdmi_phy *phy = data; in sun8i_h3_hdmi_phy_config() local
242 if (phy->variant->has_phy_clk) in sun8i_h3_hdmi_phy_config()
243 clk_set_rate(phy->clk_phy, clk_rate); in sun8i_h3_hdmi_phy_config()
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-ipq4019-usb.c17 #include <linux/phy/phy.h>
23 struct phy *phy; member
29 static int ipq4019_ss_phy_power_off(struct phy *_phy) in ipq4019_ss_phy_power_off()
31 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_ss_phy_power_off() local
33 reset_control_assert(phy->por_rst); in ipq4019_ss_phy_power_off()
39 static int ipq4019_ss_phy_power_on(struct phy *_phy) in ipq4019_ss_phy_power_on()
41 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_ss_phy_power_on() local
45 reset_control_deassert(phy->por_rst); in ipq4019_ss_phy_power_on()
55 static int ipq4019_hs_phy_power_off(struct phy *_phy) in ipq4019_hs_phy_power_off()
57 struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy); in ipq4019_hs_phy_power_off() local
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/linux/drivers/nfc/pn533/
H A Dusb.c61 struct pn533_usb_phy *phy = urb->context; in pn533_recv_response() local
67 nfc_err(&phy->udev->dev, "failed to alloc memory\n"); in pn533_recv_response()
74 pn533_recv_frame(phy->priv, skb, urb->status); in pn533_recv_response()
77 static int pn533_submit_urb_for_response(struct pn533_usb_phy *phy, gfp_t flags) in pn533_submit_urb_for_response() argument
79 phy->in_urb->complete = pn533_recv_response; in pn533_submit_urb_for_response()
81 return usb_submit_urb(phy->in_urb, flags); in pn533_submit_urb_for_response()
86 struct pn533_usb_phy *phy = urb->context; in pn533_recv_ack() local
87 struct pn533 *priv = phy->priv; in pn533_recv_ack()
99 dev_dbg(&phy->udev->dev, in pn533_recv_ack()
105 nfc_err(&phy->udev->dev, in pn533_recv_ack()
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/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8-mipi-dphy.c19 #include <linux/phy/phy.h>
70 /* PHY power on is active low */
91 bool is_combo; /* MIPI DPHY and LVDS PHY combo */
142 static int phy_write(struct phy *phy, u32 value, unsigned int reg) in phy_write() argument
144 struct mixel_dphy_priv *priv = phy_get_drvdata(phy); in phy_write()
149 dev_err(&phy->dev, "Failed to write DPHY reg %d: %d\n", reg, in phy_write()
186 static int mixel_dphy_config_from_opts(struct phy *phy, in mixel_dphy_config_from_opts() argument
190 struct mixel_dphy_priv *priv = dev_get_drvdata(phy->dev.parent); in mixel_dphy_config_from_opts()
205 dev_err(&phy->dev, "Invalid %d/%d for %ld/%ld\n", in mixel_dphy_config_from_opts()
230 dev_err(&phy->dev, "Invalid CM/CN/CO values: %u/%u/%u\n", in mixel_dphy_config_from_opts()
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