1# SPDX-License-Identifier: GPL-2.0-only 2# 3# PHY 4# 5 6menu "PHY Subsystem" 7 8config PHY_COMMON_PROPS 9 bool 10 help 11 This parses properties common between generic PHYs and Ethernet PHYs. 12 13 Select this from consumer drivers to gain access to helpers for 14 parsing properties from the 15 Documentation/devicetree/bindings/phy/phy-common-props.yaml schema. 16 17config PHY_COMMON_PROPS_TEST 18 tristate "KUnit tests for PHY common props" if !KUNIT_ALL_TESTS 19 select PHY_COMMON_PROPS 20 depends on KUNIT 21 default KUNIT_ALL_TESTS 22 help 23 This builds KUnit tests for the PHY common property API. 24 25 For more information on KUnit and unit tests in general, 26 please refer to the KUnit documentation in Documentation/dev-tools/kunit/. 27 28 When in doubt, say N. 29 30config GENERIC_PHY 31 bool "PHY Core" 32 help 33 Generic PHY support. 34 35 This framework is designed to provide a generic interface for PHY 36 devices present in the kernel. This layer will have the generic 37 API by which phy drivers can create PHY using the phy framework and 38 phy users can obtain reference to the PHY. All the users of this 39 framework should select this config. 40 41config GENERIC_PHY_MIPI_DPHY 42 bool 43 select GENERIC_PHY 44 help 45 Generic MIPI D-PHY support. 46 47 Provides a number of helpers a core functions for MIPI D-PHY 48 drivers to us. 49 50config PHY_GOOGLE_USB 51 tristate "Google Tensor SoC USB PHY driver" 52 select GENERIC_PHY 53 depends on TYPEC 54 help 55 Enable support for the USB PHY on Google Tensor SoCs, starting with 56 the G5 generation (Laguna). This driver provides the PHY interfaces 57 to interact with the SNPS eUSB2 and USB 3.2/DisplayPort Combo PHY, 58 both of which are integrated with the DWC3 USB DRD controller. 59 This driver currently supports USB high-speed. 60 61config PHY_LPC18XX_USB_OTG 62 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" 63 depends on OF && (ARCH_LPC18XX || COMPILE_TEST) 64 depends on MFD_SYSCON 65 select GENERIC_PHY 66 help 67 Enable this to support NXP LPC18xx/43xx internal USB OTG PHY. 68 69 This driver is need for USB0 support on LPC18xx/43xx and takes 70 care of enabling and clock setup. 71 72config PHY_PISTACHIO_USB 73 tristate "IMG Pistachio USB2.0 PHY driver" 74 depends on MIPS || COMPILE_TEST 75 select GENERIC_PHY 76 help 77 Enable this to support the USB2.0 PHY on the IMG Pistachio SoC. 78 79config PHY_SNPS_EUSB2 80 tristate "SNPS eUSB2 PHY Driver" 81 depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST) 82 select GENERIC_PHY 83 help 84 Enable support for the USB high-speed SNPS eUSB2 phy on select 85 SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller. 86 87config PHY_XGENE 88 tristate "APM X-Gene 15Gbps PHY support" 89 depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST) 90 select GENERIC_PHY 91 help 92 This option enables support for APM X-Gene SoC multi-purpose PHY. 93 94config USB_LGM_PHY 95 tristate "INTEL Lightning Mountain USB PHY Driver" 96 depends on USB_SUPPORT 97 depends on X86 || COMPILE_TEST 98 select USB_PHY 99 select REGULATOR 100 select REGULATOR_FIXED_VOLTAGE 101 help 102 Enable this to support Intel DWC3 PHY USB phy. This driver provides 103 interface to interact with USB GEN-II and USB 3.x PHY that is part 104 of the Intel network SOC. 105 106config PHY_CAN_TRANSCEIVER 107 tristate "CAN transceiver PHY" 108 select GENERIC_PHY 109 select MULTIPLEXER 110 help 111 This option enables support for CAN transceivers as a PHY. This 112 driver provides function for putting the transceivers in various 113 functional modes using gpios and sets the attribute max link 114 rate, for CAN drivers. 115 116config PHY_AIROHA_PCIE 117 tristate "Airoha PCIe-PHY Driver" 118 depends on ARCH_AIROHA || COMPILE_TEST 119 depends on OF 120 select GENERIC_PHY 121 help 122 Say Y here to add support for Airoha PCIe PHY driver. 123 This driver create the basic PHY instance and provides initialize 124 callback for PCIe GEN3 port. 125 126config PHY_NXP_PTN3222 127 tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" 128 depends on I2C 129 depends on OF 130 select GENERIC_PHY 131 help 132 Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. 133 This redriver performs translation between eUSB2 and USB2 signalling 134 schemes. It supports all three USB 2.0 data rates: Low Speed, Full 135 Speed and High Speed. 136 137config PHY_SPACEMIT_K1_PCIE 138 tristate "PCIe and combo PHY driver for the SpacemiT K1 SoC" 139 depends on ARCH_SPACEMIT || COMPILE_TEST 140 depends on COMMON_CLK 141 depends on HAS_IOMEM 142 depends on OF 143 select GENERIC_PHY 144 default ARCH_SPACEMIT 145 help 146 Enable support for the PCIe and USB 3 combo PHY and two 147 PCIe-only PHYs used in the SpacemiT K1 SoC. 148 149source "drivers/phy/allwinner/Kconfig" 150source "drivers/phy/amlogic/Kconfig" 151source "drivers/phy/apple/Kconfig" 152source "drivers/phy/broadcom/Kconfig" 153source "drivers/phy/cadence/Kconfig" 154source "drivers/phy/freescale/Kconfig" 155source "drivers/phy/hisilicon/Kconfig" 156source "drivers/phy/ingenic/Kconfig" 157source "drivers/phy/lantiq/Kconfig" 158source "drivers/phy/marvell/Kconfig" 159source "drivers/phy/mediatek/Kconfig" 160source "drivers/phy/microchip/Kconfig" 161source "drivers/phy/motorola/Kconfig" 162source "drivers/phy/mscc/Kconfig" 163source "drivers/phy/nuvoton/Kconfig" 164source "drivers/phy/qualcomm/Kconfig" 165source "drivers/phy/ralink/Kconfig" 166source "drivers/phy/realtek/Kconfig" 167source "drivers/phy/renesas/Kconfig" 168source "drivers/phy/rockchip/Kconfig" 169source "drivers/phy/samsung/Kconfig" 170source "drivers/phy/socionext/Kconfig" 171source "drivers/phy/sophgo/Kconfig" 172source "drivers/phy/spacemit/Kconfig" 173source "drivers/phy/st/Kconfig" 174source "drivers/phy/starfive/Kconfig" 175source "drivers/phy/sunplus/Kconfig" 176source "drivers/phy/tegra/Kconfig" 177source "drivers/phy/ti/Kconfig" 178source "drivers/phy/intel/Kconfig" 179source "drivers/phy/xilinx/Kconfig" 180 181endmenu 182