| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-pcie.c | 80 static void mtk_pcie_efuse_set_lane(struct mtk_pcie_phy *pcie_phy, in mtk_pcie_efuse_set_lane() argument
83 struct mtk_pcie_lane_efuse *data = &pcie_phy->efuse[lane]; in mtk_pcie_efuse_set_lane()
89 addr = pcie_phy->sif_base + PEXTP_ANA_LN0_TRX_REG + in mtk_pcie_efuse_set_lane()
112 struct mtk_pcie_phy *pcie_phy = phy_get_drvdata(phy); in mtk_pcie_phy_init() local
115 if (!pcie_phy->sw_efuse_en) in mtk_pcie_phy_init()
119 mtk_phy_update_field(pcie_phy->sif_base + PEXTP_ANA_GLB_00_REG, in mtk_pcie_phy_init()
120 EFUSE_GLB_INTR_SEL, pcie_phy->efuse_glb_intr); in mtk_pcie_phy_init()
122 for (i = 0; i < pcie_phy->data->num_lanes; i++) in mtk_pcie_phy_init()
123 mtk_pcie_efuse_set_lane(pcie_phy, i); in mtk_pcie_phy_init()
133 static int mtk_pcie_efuse_read_for_lane(struct mtk_pcie_phy *pcie_phy, in mtk_pcie_efuse_read_for_lane() argument
[all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | rockchip,rk3399-pcie-ep.yaml | 63 phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>;
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| H A D | socionext,uniphier-pcie-ep.yaml | 133 phys = <&pcie_phy>;
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| H A D | socionext,uniphier-pcie.yaml | 100 phys = <&pcie_phy>;
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| H A D | samsung,exynos-pcie.yaml | 106 phys = <&pcie_phy>;
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | brcm,sr-pcie-phy.txt | 26 pcie_phy: phy@40000000 {
39 phys = <&pcie_phy 0>;
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| H A D | brcm,cygnus-pcie-phy.yaml | 62 pcie_phy: pcie_phy@301d0a0 {
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| H A D | rockchip-pcie-phy.txt | 28 pcie_phy: pcie-phy {
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| H A D | amlogic,meson-axg-pcie.yaml | 45 pcie_phy: pcie-phy@ff644000 {
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| H A D | samsung,exynos-pcie-phy.yaml | 44 pcie_phy: pcie-phy@15680000 {
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| H A D | hisilicon,phy-hi3670-pcie.yaml | 67 pcie_phy: pcie-phy@fc000000 {
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| H A D | socionext,uniphier-pcie-phy.yaml | 96 pcie_phy: phy@66038000 {
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| H A D | fsl,imx8-pcie-phy.yaml | 89 pcie_phy: pcie-phy@32f00000 {
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| /linux/arch/mips/pci/ |
| H A D | pci-mt7620.c | 128 static void pcie_phy(unsigned long addr, unsigned long val) in pcie_phy() function
224 pcie_phy(0x0, 0x80); in mt7620_pci_hw_init()
225 pcie_phy(0x1, 0x04); in mt7620_pci_hw_init()
228 pcie_phy(0x68, 0xB4); in mt7620_pci_hw_init()
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| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | stingray-pcie.dtsi | 37 phys = <&pcie_phy 8>;
47 pcie_phy: phy@0 { label
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7d.dtsi | 144 clock-names = "pcie", "pcie_bus", "pcie_phy";
156 fsl,imx7d-pcie-phy = <&pcie_phy>;
163 pcie_phy: pcie-phy@306d0000 { label
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | brcm,iproc-clocks.yaml | 126 pcie_phy lcpll0 1 BCM_CYGNUS_LCPLL0_PCIE_PHY_REF_CLK
193 pcie_phy lcpll0 1 BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK
354 - const: pcie_phy
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| H A D | qcom,gcc-apq8084.yaml | 76 <&pcie_phy>;
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-khadas-edge-v.dts | 23 &pcie_phy {
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| H A D | rk3399-khadas-edge-captain.dts | 23 &pcie_phy {
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mm-verdin-yavia.dtsi | 107 &pcie_phy {
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| H A D | imx8mm-verdin-dev.dtsi | 107 &pcie_phy {
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| H A D | imx8mm-verdin-mallow.dtsi | 106 &pcie_phy {
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm5301x.dtsi | 82 clock-output-names = "lcpll0", "pcie_phy",
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7986a-acelink-ew-7886cax.dts | 91 &pcie_phy {
|