xref: /linux/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
18dbb528bSFlorian Fainelli# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
28dbb528bSFlorian Fainelli%YAML 1.2
38dbb528bSFlorian Fainelli---
48dbb528bSFlorian Fainelli$id: http://devicetree.org/schemas/phy/brcm,cygnus-pcie-phy.yaml#
58dbb528bSFlorian Fainelli$schema: http://devicetree.org/meta-schemas/core.yaml#
68dbb528bSFlorian Fainelli
78dbb528bSFlorian Fainellititle: Broadcom Cygnus PCIe PHY
88dbb528bSFlorian Fainelli
98dbb528bSFlorian Fainellimaintainers:
108dbb528bSFlorian Fainelli  - Ray Jui <ray.jui@broadcom.com>
118dbb528bSFlorian Fainelli  - Scott Branden <scott.branden@broadcom.com>
128dbb528bSFlorian Fainelli
138dbb528bSFlorian Fainelliproperties:
148dbb528bSFlorian Fainelli  $nodename:
158dbb528bSFlorian Fainelli    pattern: "^pcie[-|_]phy(@.*)?$"
168dbb528bSFlorian Fainelli
178dbb528bSFlorian Fainelli  compatible:
188dbb528bSFlorian Fainelli    items:
198dbb528bSFlorian Fainelli      - const: brcm,cygnus-pcie-phy
208dbb528bSFlorian Fainelli
218dbb528bSFlorian Fainelli  reg:
228dbb528bSFlorian Fainelli    maxItems: 1
238dbb528bSFlorian Fainelli    description: >
248dbb528bSFlorian Fainelli      Base address and length of the PCIe PHY block
258dbb528bSFlorian Fainelli
268dbb528bSFlorian Fainelli  "#address-cells":
278dbb528bSFlorian Fainelli    const: 1
288dbb528bSFlorian Fainelli
298dbb528bSFlorian Fainelli  "#size-cells":
308dbb528bSFlorian Fainelli    const: 0
318dbb528bSFlorian Fainelli
328dbb528bSFlorian FainellipatternProperties:
338dbb528bSFlorian Fainelli  "^pcie-phy@[0-9]+$":
348dbb528bSFlorian Fainelli    type: object
35*c77c1853SRob Herring    additionalProperties: false
368dbb528bSFlorian Fainelli    description: >
378dbb528bSFlorian Fainelli      PCIe PHY child nodes
388dbb528bSFlorian Fainelli
398dbb528bSFlorian Fainelli    properties:
408dbb528bSFlorian Fainelli      reg:
418dbb528bSFlorian Fainelli        maxItems: 1
428dbb528bSFlorian Fainelli        description: >
438dbb528bSFlorian Fainelli          The PCIe PHY port number
448dbb528bSFlorian Fainelli
458dbb528bSFlorian Fainelli      "#phy-cells":
468dbb528bSFlorian Fainelli        const: 0
478dbb528bSFlorian Fainelli
488dbb528bSFlorian Fainelli    required:
498dbb528bSFlorian Fainelli      - reg
508dbb528bSFlorian Fainelli      - "#phy-cells"
518dbb528bSFlorian Fainelli
528dbb528bSFlorian Fainellirequired:
538dbb528bSFlorian Fainelli  - compatible
548dbb528bSFlorian Fainelli  - reg
558dbb528bSFlorian Fainelli  - "#address-cells"
568dbb528bSFlorian Fainelli  - "#size-cells"
578dbb528bSFlorian Fainelli
588dbb528bSFlorian FainelliadditionalProperties: false
598dbb528bSFlorian Fainelli
608dbb528bSFlorian Fainelliexamples:
618dbb528bSFlorian Fainelli  - |
628dbb528bSFlorian Fainelli    pcie_phy: pcie_phy@301d0a0 {
638dbb528bSFlorian Fainelli      compatible = "brcm,cygnus-pcie-phy";
648dbb528bSFlorian Fainelli      reg = <0x0301d0a0 0x14>;
658dbb528bSFlorian Fainelli      #address-cells = <1>;
668dbb528bSFlorian Fainelli      #size-cells = <0>;
678dbb528bSFlorian Fainelli
688dbb528bSFlorian Fainelli      pcie0_phy: pcie-phy@0 {
698dbb528bSFlorian Fainelli          reg = <0>;
708dbb528bSFlorian Fainelli          #phy-cells = <0>;
718dbb528bSFlorian Fainelli      };
728dbb528bSFlorian Fainelli
738dbb528bSFlorian Fainelli      pcie1_phy: pcie-phy@1 {
748dbb528bSFlorian Fainelli          reg = <1>;
758dbb528bSFlorian Fainelli          #phy-cells = <0>;
768dbb528bSFlorian Fainelli      };
778dbb528bSFlorian Fainelli    };
78