16a57f224SMarcel Ziswiler// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 26a57f224SMarcel Ziswiler/* 36a57f224SMarcel Ziswiler * Copyright 2022 Toradex 46a57f224SMarcel Ziswiler */ 56a57f224SMarcel Ziswiler 66a57f224SMarcel Ziswiler/ { 76a57f224SMarcel Ziswiler sound_card: sound-card { 86a57f224SMarcel Ziswiler compatible = "simple-audio-card"; 96a57f224SMarcel Ziswiler simple-audio-card,bitclock-master = <&dailink_master>; 106a57f224SMarcel Ziswiler simple-audio-card,format = "i2s"; 116a57f224SMarcel Ziswiler simple-audio-card,frame-master = <&dailink_master>; 126c620a30SEmanuele Ghidoli simple-audio-card,mclk-fs = <256>; 13*7f699ed1SHiago De Franco simple-audio-card,name = "verdin-nau8822"; 146a57f224SMarcel Ziswiler simple-audio-card,routing = 156a57f224SMarcel Ziswiler "Headphones", "LHP", 166a57f224SMarcel Ziswiler "Headphones", "RHP", 176a57f224SMarcel Ziswiler "Speaker", "LSPK", 186a57f224SMarcel Ziswiler "Speaker", "RSPK", 196a57f224SMarcel Ziswiler "Line Out", "AUXOUT1", 206a57f224SMarcel Ziswiler "Line Out", "AUXOUT2", 216a57f224SMarcel Ziswiler "LAUX", "Line In", 226a57f224SMarcel Ziswiler "RAUX", "Line In", 236a57f224SMarcel Ziswiler "LMICP", "Mic In", 246a57f224SMarcel Ziswiler "RMICP", "Mic In"; 256a57f224SMarcel Ziswiler simple-audio-card,widgets = 266a57f224SMarcel Ziswiler "Headphones", "Headphones", 276a57f224SMarcel Ziswiler "Line Out", "Line Out", 286a57f224SMarcel Ziswiler "Speaker", "Speaker", 296a57f224SMarcel Ziswiler "Microphone", "Mic In", 306a57f224SMarcel Ziswiler "Line", "Line In"; 316a57f224SMarcel Ziswiler 326a57f224SMarcel Ziswiler dailink_master: simple-audio-card,codec { 336a57f224SMarcel Ziswiler clocks = <&clk IMX8MM_CLK_SAI2_ROOT>; 346a57f224SMarcel Ziswiler sound-dai = <&nau8822_1a>; 356a57f224SMarcel Ziswiler }; 366a57f224SMarcel Ziswiler 376a57f224SMarcel Ziswiler simple-audio-card,cpu { 386a57f224SMarcel Ziswiler sound-dai = <&sai2>; 396a57f224SMarcel Ziswiler }; 406a57f224SMarcel Ziswiler }; 416a57f224SMarcel Ziswiler}; 426a57f224SMarcel Ziswiler 4399d7ad96SPhilippe Schenker/* Verdin SPI_1 */ 4499d7ad96SPhilippe Schenker&ecspi2 { 4599d7ad96SPhilippe Schenker status = "okay"; 4699d7ad96SPhilippe Schenker}; 4799d7ad96SPhilippe Schenker 4899d7ad96SPhilippe Schenker/* EEPROM on display adapter boards */ 4999d7ad96SPhilippe Schenker&eeprom_display_adapter { 5099d7ad96SPhilippe Schenker status = "okay"; 5199d7ad96SPhilippe Schenker}; 5299d7ad96SPhilippe Schenker 5399d7ad96SPhilippe Schenker/* EEPROM on Verdin Development board */ 5499d7ad96SPhilippe Schenker&eeprom_carrier_board { 5599d7ad96SPhilippe Schenker status = "okay"; 5699d7ad96SPhilippe Schenker}; 5799d7ad96SPhilippe Schenker 5899d7ad96SPhilippe Schenker&fec1 { 5999d7ad96SPhilippe Schenker status = "okay"; 6099d7ad96SPhilippe Schenker}; 6199d7ad96SPhilippe Schenker 6299d7ad96SPhilippe Schenker/* Verdin QSPI_1 */ 6399d7ad96SPhilippe Schenker&flexspi { 6499d7ad96SPhilippe Schenker status = "okay"; 6599d7ad96SPhilippe Schenker}; 6699d7ad96SPhilippe Schenker 6799d7ad96SPhilippe Schenker/* Current measurement into module VCC */ 6899d7ad96SPhilippe Schenker&hwmon { 6999d7ad96SPhilippe Schenker status = "okay"; 7099d7ad96SPhilippe Schenker}; 7199d7ad96SPhilippe Schenker 7299d7ad96SPhilippe Schenker&hwmon_temp { 7399d7ad96SPhilippe Schenker vs-supply = <®_1p8v>; 7499d7ad96SPhilippe Schenker status = "okay"; 7599d7ad96SPhilippe Schenker}; 7699d7ad96SPhilippe Schenker 7799d7ad96SPhilippe Schenker&i2c3 { 7899d7ad96SPhilippe Schenker status = "okay"; 7999d7ad96SPhilippe Schenker}; 8099d7ad96SPhilippe Schenker 819f06926eSStefan Eichenberger&gpio5 { 829f06926eSStefan Eichenberger pinctrl-names = "default"; 839f06926eSStefan Eichenberger pinctrl-0 = <&pinctrl_ctrl_sleep_moci>; 849f06926eSStefan Eichenberger}; 859f06926eSStefan Eichenberger 866a57f224SMarcel Ziswiler&gpio_expander_21 { 876a57f224SMarcel Ziswiler status = "okay"; 886a57f224SMarcel Ziswiler}; 896a57f224SMarcel Ziswiler 906a57f224SMarcel Ziswiler/* Verdin I2C_1 */ 916a57f224SMarcel Ziswiler&i2c4 { 9299d7ad96SPhilippe Schenker status = "okay"; 9399d7ad96SPhilippe Schenker 946a57f224SMarcel Ziswiler /* Audio Codec */ 956a57f224SMarcel Ziswiler nau8822_1a: audio-codec@1a { 966a57f224SMarcel Ziswiler compatible = "nuvoton,nau8822"; 976a57f224SMarcel Ziswiler reg = <0x1a>; 9899d7ad96SPhilippe Schenker #sound-dai-cells = <0>; 996a57f224SMarcel Ziswiler }; 1006a57f224SMarcel Ziswiler}; 1016a57f224SMarcel Ziswiler 10299d7ad96SPhilippe Schenker/* Verdin PCIE_1 */ 10399d7ad96SPhilippe Schenker&pcie0 { 10499d7ad96SPhilippe Schenker status = "okay"; 10599d7ad96SPhilippe Schenker}; 10699d7ad96SPhilippe Schenker 10799d7ad96SPhilippe Schenker&pcie_phy { 10899d7ad96SPhilippe Schenker status = "okay"; 10999d7ad96SPhilippe Schenker}; 11099d7ad96SPhilippe Schenker 11199d7ad96SPhilippe Schenker/* Verdin PWM_3_DSI */ 11299d7ad96SPhilippe Schenker&pwm1 { 11399d7ad96SPhilippe Schenker status = "okay"; 11499d7ad96SPhilippe Schenker}; 11599d7ad96SPhilippe Schenker 11699d7ad96SPhilippe Schenker/* Verdin PWM_1 */ 11799d7ad96SPhilippe Schenker&pwm2 { 11899d7ad96SPhilippe Schenker status = "okay"; 11999d7ad96SPhilippe Schenker}; 12099d7ad96SPhilippe Schenker 12199d7ad96SPhilippe Schenker/* Verdin PWM_2 */ 12299d7ad96SPhilippe Schenker&pwm3 { 12399d7ad96SPhilippe Schenker status = "okay"; 12499d7ad96SPhilippe Schenker}; 12599d7ad96SPhilippe Schenker 12699d7ad96SPhilippe Schenker/* Verdin I2S_1 */ 12799d7ad96SPhilippe Schenker&sai2 { 12899d7ad96SPhilippe Schenker status = "okay"; 12999d7ad96SPhilippe Schenker}; 13099d7ad96SPhilippe Schenker 13199d7ad96SPhilippe Schenker/* Verdin UART_3 */ 13299d7ad96SPhilippe Schenker&uart1 { 13399d7ad96SPhilippe Schenker status = "okay"; 13499d7ad96SPhilippe Schenker}; 13599d7ad96SPhilippe Schenker 1366a57f224SMarcel Ziswiler/* Verdin UART_1, connector X50 through RS485 transceiver */ 1376a57f224SMarcel Ziswiler&uart2 { 1386a57f224SMarcel Ziswiler linux,rs485-enabled-at-boot-time; 1396a57f224SMarcel Ziswiler rs485-rts-active-low; 1406a57f224SMarcel Ziswiler rs485-rx-during-tx; 14199d7ad96SPhilippe Schenker status = "okay"; 14299d7ad96SPhilippe Schenker}; 14399d7ad96SPhilippe Schenker 14499d7ad96SPhilippe Schenker/* Verdin UART_2 */ 14599d7ad96SPhilippe Schenker&uart3 { 14699d7ad96SPhilippe Schenker status = "okay"; 14799d7ad96SPhilippe Schenker}; 14899d7ad96SPhilippe Schenker 14999d7ad96SPhilippe Schenker/* Verdin USB_1 */ 15099d7ad96SPhilippe Schenker&usbotg1 { 15199d7ad96SPhilippe Schenker disable-over-current; 15299d7ad96SPhilippe Schenker status = "okay"; 15399d7ad96SPhilippe Schenker}; 15499d7ad96SPhilippe Schenker 15599d7ad96SPhilippe Schenker/* Verdin USB_2 */ 15699d7ad96SPhilippe Schenker&usbotg2 { 15799d7ad96SPhilippe Schenker disable-over-current; 15899d7ad96SPhilippe Schenker status = "okay"; 1596a57f224SMarcel Ziswiler}; 1606a57f224SMarcel Ziswiler 1616a57f224SMarcel Ziswiler/* Limit frequency on dev board due to long traces and bad signal integrity */ 1626a57f224SMarcel Ziswiler&usdhc2 { 1636a57f224SMarcel Ziswiler max-frequency = <100000000>; 16499d7ad96SPhilippe Schenker status = "okay"; 1656a57f224SMarcel Ziswiler}; 166