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/linux/drivers/mailbox/
H A Dpcc.c6 * PCC (Platform Communication Channel) is defined in the ACPI 5.0+
11 * shared memory regions as defined in the PCC table entries. The PCC
12 * specification supports a Doorbell mechanism for the PCC clients
14 * is also specified in each PCC table entry.
18 * PCC Reads:
22 * * Client issues mbox_send_message() which rings the PCC doorbell
23 * for its PCC channel.
28 * PCC Writes:
33 * * Client issues mbox_send_message() which rings the PCC doorbell
34 * for its PCC channel.
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/linux/Documentation/admin-guide/pm/
H A Dcpufreq_drivers.rst80 ``pcc-cpufreq``
86 * pcc-cpufreq.txt - PCC interface documentation
100 1.1 PCC interface
113 Processor Clocking Control (PCC) is an interface between the platform
117 The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC
120 OS utilizes the PCC interface to inform platform firmware what frequency the
126 1.1 PCC interface:
128 The complete PCC specification is available here:
131 PCC relies on a shared memory region that provides a channel for communication
132 between the OS and platform firmware. PCC also implements a "doorbell" that
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/linux/drivers/acpi/
H A Dacpi_pcc.c6 * The PCC Address Space also referred as PCC Operation Region pertains to the
7 * region of PCC subspace that succeeds the PCC signature. The PCC Operation
8 * Region works in conjunction with the PCC Table(Platform Communications
9 * Channel Table). PCC subspaces that are marked for use as PCC Operation
10 * Regions must not be used as PCC subspaces for the standard ACPI features
12 * the PCC Table instead.
14 * This driver sets up the PCC Address Space and installs an handler to enable
15 * handling of PCC OpRegion in the firmware.
24 #include <acpi/pcc.h>
28 * to PCC commands
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H A DKconfig288 select PCC
561 bool "ACPI PCC Address Space"
562 depends on PCC
565 The PCC Address Space also referred as PCC Operation Region pertains
566 to the region of PCC subspace that succeeds the PCC signature.
568 The PCC Operation Region works in conjunction with the PCC Table
569 (Platform Communications Channel Table). PCC subspaces that are
570 marked for use as PCC Operation Regions must not be used as PCC
572 MPST. These standard features must always use the PCC Table instead.
574 Enable this feature if you want to set up and install the PCC Address
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/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dpai_crypto.json727 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING DEA",
728 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-DEA function ending with CC=0"
734 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 128",
735 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-128 function ending with CC=0"
741 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 192",
742 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-192 function ending with CC=0"
748 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED DEA",
749 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA function ending with CC=0"
755 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED TDEA 128",
756 …"PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 function ending with CC…
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/linux/tools/perf/pmu-events/arch/s390/cf_z17/
H A Dpai_crypto.json727 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING DEA",
728 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-DEA function ending with CC=0"
734 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 128",
735 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-128 function ending with CC=0"
741 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING TDEA 192",
742 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-TDEA-192 function ending with CC=0"
748 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED DEA",
749 "PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA function ending with CC=0"
755 "BriefDescription": "PCC COMPUTE LAST BLOCK CMAC USING ENCRYPTED TDEA 128",
756 …"PublicDescription": "PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 function ending with CC…
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/linux/Documentation/devicetree/bindings/clock/
H A Dimx7ulp-pcc-clock.yaml4 $id: http://devicetree.org/schemas/clock/imx7ulp-pcc-clock.yaml#
7 title: Freescale i.MX7ULP Peripheral Clock Control (PCC) modules Clock Controller
14 Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
28 The Peripheral Clock Control (PCC) is responsible for clock selection,
H A Dimx8ulp-pcc-clock.yaml4 $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#
7 title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module
14 under the control of several CGCs & PCCs modules. The PCC modules control
/linux/arch/mips/include/asm/dec/
H A Dkn01.h23 #define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */
50 #define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */
63 #define KN01_CSR_CRSRTST (1<<12) /* PCC test output */
66 #define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dspp.c50 base = ctx->cap->sblk->pcc.base; in dpu_setup_dspp_pcc()
53 DRM_ERROR("invalid ctx %p pcc base 0x%x\n", ctx, base); in dpu_setup_dspp_pcc()
58 DRM_DEBUG_DRIVER("disable pcc feature\n"); in dpu_setup_dspp_pcc()
145 if (c->cap->sblk->pcc.base) in dpu_hw_dspp_init()
H A Ddpu_hw_dspp.h11 * struct dpu_hw_pcc_coeff - PCC coefficient structure for each color
25 * struct dpu_hw_pcc_cfg - pcc feature structure
62 * @setup_pcc: setup_pcc - setup dspp pcc
/linux/kernel/bpf/
H A Dmemalloc.c504 struct bpf_mem_caches *cc; struct bpf_mem_caches __percpu *pcc; in bpf_mem_alloc_init() local
545 pcc = __alloc_percpu_gfp(sizeof(*cc), 8, GFP_KERNEL); in bpf_mem_alloc_init()
546 if (!pcc) in bpf_mem_alloc_init()
553 cc = per_cpu_ptr(pcc, cpu); in bpf_mem_alloc_init()
566 ma->caches = pcc; in bpf_mem_alloc_init()
572 struct bpf_mem_caches __percpu *pcc; in bpf_mem_alloc_percpu_init() local
574 pcc = __alloc_percpu_gfp(sizeof(struct bpf_mem_caches), 8, GFP_KERNEL); in bpf_mem_alloc_percpu_init()
575 if (!pcc) in bpf_mem_alloc_percpu_init()
578 ma->caches = pcc; in bpf_mem_alloc_percpu_init()
586 struct bpf_mem_caches *cc; struct bpf_mem_caches __percpu *pcc; in bpf_mem_alloc_percpu_unit_init() local
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/linux/arch/sh/include/asm/
H A Dhd64461.h139 /* PCC Interface Status Register */
156 /* PCC General Control Register */
166 /* PCC Card Status Change Register */
176 /* PCC Card Status Change Interrupt Enable Register */
190 /* PCC Software Control Register */
/linux/tools/testing/selftests/kvm/s390/
H A Dcpumodel_subfuncs_test.c151 /* Testing Crypto Perform Cryptographic Computation (PCC) CPU subfunction's ASM block */
254 { "PCC", cpu_subfunc.pcc, sizeof(cpu_subfunc.pcc), test_pcc_asm_block, 77 },
/linux/drivers/i2c/busses/
H A Di2c-xgene-slimpro.c12 #include <acpi/pcc.h>
187 /* Copy the message to the PCC comm space */ in slimpro_i2c_pcc_tx_prepare()
472 if (device_property_read_u32(&pdev->dev, "pcc-channel", in xgene_slimpro_i2c_probe()
481 "PCC mailbox channel request failed\n"); in xgene_slimpro_i2c_probe()
488 "PCC IRQ not supported\n"); in xgene_slimpro_i2c_probe()
/linux/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c231 SIOF0, SIOF1, MMC, PCC, enumerator
262 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
275 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
/linux/drivers/acpi/acpica/
H A Dexfield.c205 * Reading from a PCC field unit does not require the handler because in acpi_ex_read_data_from_field()
209 "PCC FieldRead bits %u\n", in acpi_ex_read_data_from_field()
342 "PCC COMD field has been written. Invoking PCC handler now.\n")); in acpi_ex_write_data_to_field()
/linux/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7763.c244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator
281 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
329 { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } },
/linux/arch/m68k/mvme147/
H A Dconfig.c113 .name = "pcc",
126 /* Using pcc tick timer 1 */
/linux/drivers/soc/hisilicon/
H A Dkunpeng_hccs.h201 * Note: Actual available size of data field also depands on the PCC header
217 * Note: Actual available size of data field also depands on the PCC header
/linux/drivers/clk/imx/
H A Dclk-composite-7ulp.c46 * with this pcc clock. in pcc_gate_enable()
97 pr_info("PCC PR is 0 for clk:%s, bypass\n", name); in imx_ulp_clk_hw_composite()
/linux/Documentation/hwmon/
H A Dxgene-hwmon.rst14 For ACPI, it is the PCC mailbox.
/linux/drivers/platform/x86/amd/hfi/
H A Dhfi.c31 #include <acpi/pcc.h>
150 dev_err(amd_hfi_data->dev, "failed to ioremap PCC common region mem\n"); in amd_hfi_fill_metadata()
368 /* get pointer to the first PCC subspace entry */ in amd_hfi_metadata_parser()
/linux/drivers/net/ethernet/
H A Djme.h124 * Dynamic(adaptive)/Static PCC values
526 JME_PCCRX0 = JME_MISC | 0x30, /* PCC Control for RX Queue 0 */
527 JME_PCCTX = JME_MISC | 0x40, /* PCC Control for TX Queues */
534 JME_PCCSRX0 = JME_MISC | 0x80, /* PCC Status of RX0 */
1079 * PCC Control Registers
/linux/arch/arm64/kernel/pi/
H A Drelocate.c4 // Peter Collingbourne <pcc@google.com>

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