1*384740dcSRalf Baechle /* 2*384740dcSRalf Baechle * Hardware info about DECstation DS2100/3100 systems (otherwise known as 3*384740dcSRalf Baechle * pmin/pmax or KN01). 4*384740dcSRalf Baechle * 5*384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 6*384740dcSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 7*384740dcSRalf Baechle * for more details. 8*384740dcSRalf Baechle * 9*384740dcSRalf Baechle * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 10*384740dcSRalf Baechle * are by courtesy of Chris Fraser. 11*384740dcSRalf Baechle * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki 12*384740dcSRalf Baechle */ 13*384740dcSRalf Baechle #ifndef __ASM_MIPS_DEC_KN01_H 14*384740dcSRalf Baechle #define __ASM_MIPS_DEC_KN01_H 15*384740dcSRalf Baechle 16*384740dcSRalf Baechle #define KN01_SLOT_BASE 0x10000000 17*384740dcSRalf Baechle #define KN01_SLOT_SIZE 0x01000000 18*384740dcSRalf Baechle 19*384740dcSRalf Baechle /* 20*384740dcSRalf Baechle * Address ranges for devices. 21*384740dcSRalf Baechle */ 22*384740dcSRalf Baechle #define KN01_PMASK (0*KN01_SLOT_SIZE) /* color plane mask */ 23*384740dcSRalf Baechle #define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */ 24*384740dcSRalf Baechle #define KN01_VDAC (2*KN01_SLOT_SIZE) /* color map */ 25*384740dcSRalf Baechle #define KN01_RES_3 (3*KN01_SLOT_SIZE) /* unused */ 26*384740dcSRalf Baechle #define KN01_RES_4 (4*KN01_SLOT_SIZE) /* unused */ 27*384740dcSRalf Baechle #define KN01_RES_5 (5*KN01_SLOT_SIZE) /* unused */ 28*384740dcSRalf Baechle #define KN01_RES_6 (6*KN01_SLOT_SIZE) /* unused */ 29*384740dcSRalf Baechle #define KN01_ERRADDR (7*KN01_SLOT_SIZE) /* write error address */ 30*384740dcSRalf Baechle #define KN01_LANCE (8*KN01_SLOT_SIZE) /* LANCE (Am7990) Ethernet */ 31*384740dcSRalf Baechle #define KN01_LANCE_MEM (9*KN01_SLOT_SIZE) /* LANCE buffer memory */ 32*384740dcSRalf Baechle #define KN01_SII (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */ 33*384740dcSRalf Baechle #define KN01_SII_MEM (11*KN01_SLOT_SIZE) /* SII buffer memory */ 34*384740dcSRalf Baechle #define KN01_DZ11 (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */ 35*384740dcSRalf Baechle #define KN01_RTC (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */ 36*384740dcSRalf Baechle #define KN01_ESAR (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */ 37*384740dcSRalf Baechle #define KN01_CSR (14*KN01_SLOT_SIZE) /* system ctrl & status reg */ 38*384740dcSRalf Baechle #define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */ 39*384740dcSRalf Baechle 40*384740dcSRalf Baechle 41*384740dcSRalf Baechle /* 42*384740dcSRalf Baechle * Frame buffer memory address. 43*384740dcSRalf Baechle */ 44*384740dcSRalf Baechle #define KN01_VFB_MEM 0x0fc00000 45*384740dcSRalf Baechle 46*384740dcSRalf Baechle /* 47*384740dcSRalf Baechle * CPU interrupt bits. 48*384740dcSRalf Baechle */ 49*384740dcSRalf Baechle #define KN01_CPU_INR_BUS 6 /* memory, I/O bus read/write errors */ 50*384740dcSRalf Baechle #define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */ 51*384740dcSRalf Baechle #define KN01_CPU_INR_RTC 5 /* DS1287 RTC */ 52*384740dcSRalf Baechle #define KN01_CPU_INR_DZ11 4 /* DZ11 (DC7085) serial */ 53*384740dcSRalf Baechle #define KN01_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */ 54*384740dcSRalf Baechle #define KN01_CPU_INR_SII 2 /* SII (DC7061) SCSI */ 55*384740dcSRalf Baechle 56*384740dcSRalf Baechle 57*384740dcSRalf Baechle /* 58*384740dcSRalf Baechle * System Control & Status Register bits. 59*384740dcSRalf Baechle */ 60*384740dcSRalf Baechle #define KN01_CSR_MNFMOD (1<<15) /* MNFMOD manufacturing jumper */ 61*384740dcSRalf Baechle #define KN01_CSR_STATUS (1<<14) /* self-test result status output */ 62*384740dcSRalf Baechle #define KN01_CSR_PARDIS (1<<13) /* parity error disable */ 63*384740dcSRalf Baechle #define KN01_CSR_CRSRTST (1<<12) /* PCC test output */ 64*384740dcSRalf Baechle #define KN01_CSR_MONO (1<<11) /* mono/color fb SIMM installed */ 65*384740dcSRalf Baechle #define KN01_CSR_MEMERR (1<<10) /* write timeout error status & ack*/ 66*384740dcSRalf Baechle #define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */ 67*384740dcSRalf Baechle #define KN01_CSR_TXDIS (1<<8) /* DZ11 transmit disable */ 68*384740dcSRalf Baechle #define KN01_CSR_VBGTRG (1<<2) /* blue DAC voltage over green (r/o) */ 69*384740dcSRalf Baechle #define KN01_CSR_VRGTRG (1<<1) /* red DAC voltage over green (r/o) */ 70*384740dcSRalf Baechle #define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */ 71*384740dcSRalf Baechle #define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 72*384740dcSRalf Baechle 73*384740dcSRalf Baechle 74*384740dcSRalf Baechle #ifndef __ASSEMBLY__ 75*384740dcSRalf Baechle 76*384740dcSRalf Baechle #include <linux/interrupt.h> 77*384740dcSRalf Baechle #include <linux/spinlock.h> 78*384740dcSRalf Baechle #include <linux/types.h> 79*384740dcSRalf Baechle 80*384740dcSRalf Baechle struct pt_regs; 81*384740dcSRalf Baechle 82*384740dcSRalf Baechle extern u16 cached_kn01_csr; 83*384740dcSRalf Baechle 84*384740dcSRalf Baechle extern void dec_kn01_be_init(void); 85*384740dcSRalf Baechle extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); 86*384740dcSRalf Baechle extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id); 87*384740dcSRalf Baechle #endif 88*384740dcSRalf Baechle 89*384740dcSRalf Baechle #endif /* __ASM_MIPS_DEC_KN01_H */ 90