Home
last modified time | relevance | path

Searched full:oscclk (Results 1 – 25 of 54) sorted by relevance

123

/linux/drivers/clk/samsung/
H A Dclk-exynos990.c454 PLL(pll_0717x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk",
456 PLL(pll_0717x, CLK_FOUT_SHARED1_PLL, "fout_shared1_pll", "oscclk",
458 PLL(pll_0718x, CLK_FOUT_SHARED2_PLL, "fout_shared2_pll", "oscclk",
460 PLL(pll_0718x, CLK_FOUT_SHARED3_PLL, "fout_shared3_pll", "oscclk",
462 PLL(pll_0717x, CLK_FOUT_SHARED4_PLL, "fout_shared4_pll", "oscclk",
464 PLL(pll_0732x, CLK_FOUT_MMC_PLL, "fout_mmc_pll", "oscclk",
466 PLL(pll_0718x, CLK_FOUT_G3D_PLL, "fout_g3d_pll", "oscclk",
471 PNAME(mout_pll_shared0_p) = { "oscclk", "fout_shared0_pll" };
472 PNAME(mout_pll_shared1_p) = { "oscclk", "fout_shared1_pll" };
473 PNAME(mout_pll_shared2_p) = { "oscclk", "fout_shared2_pll" };
[all …]
H A Dclk-exynosautov920.c334 PLL(pll_531x, FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk",
336 PLL(pll_531x, FOUT_SHARED1_PLL, "fout_shared1_pll", "oscclk",
338 PLL(pll_531x, FOUT_SHARED2_PLL, "fout_shared2_pll", "oscclk",
340 PLL(pll_531x, FOUT_SHARED3_PLL, "fout_shared3_pll", "oscclk",
342 PLL(pll_531x, FOUT_SHARED4_PLL, "fout_shared4_pll", "oscclk",
344 PLL(pll_531x, FOUT_SHARED5_PLL, "fout_shared5_pll", "oscclk",
346 PLL(pll_531x, FOUT_MMC_PLL, "fout_mmc_pll", "oscclk",
351 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
352 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
353 PNAME(mout_shared2_pll_p) = { "oscclk", "fout_shared2_pll" };
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos5433-clock.yaml18 - "oscclk" - PLL input clock from XXTI
106 - const: oscclk
126 - const: oscclk
143 - const: oscclk
161 - const: oscclk
187 - const: oscclk
206 - const: oscclk
231 - const: oscclk
283 - const: oscclk
301 - const: oscclk
[all …]
H A Dsamsung,exynos850-clock.yaml20 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
77 - const: oscclk
94 - const: oscclk
112 - const: oscclk
130 - const: oscclk
151 - const: oscclk
173 - const: oscclk
193 - const: oscclk
212 - const: oscclk
230 - const: oscclk
[all …]
H A Dsamsung,exynosautov9-clock.yaml20 two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).
21 The external OSCCLK must be defined as fixed-rate clock in dts.
75 - const: oscclk
92 - const: oscclk
110 - const: oscclk
128 - const: oscclk
147 - const: oscclk
168 - const: oscclk
190 - const: oscclk
211 - const: oscclk
[all …]
H A Dsamsung,exynosautov920-clock.yaml20 two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz).
21 The external OSCCLK must be defined as fixed-rate clock in dts.
77 - const: oscclk
97 - const: oscclk
119 - const: oscclk
140 - const: oscclk
162 - const: oscclk
182 - const: oscclk
202 - const: oscclk
225 - const: oscclk
[all …]
H A Dsamsung,exynos8895-clock.yaml18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
81 - const: oscclk
106 - const: oscclk
132 - const: oscclk
169 - const: oscclk
201 - const: oscclk
218 - const: oscclk
231 clocks = <&oscclk>,
236 clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
H A Dsamsung,exynos990-clock.yaml18 is an external clock: OSCCLK (26 MHz). This external clock must be defined
79 - const: oscclk
101 - const: oscclk
122 - const: oscclk
139 - const: oscclk
152 clocks = <&oscclk>,
157 clock-names = "oscclk",
H A Dsamsung,exynos7885-clock.yaml20 is an external clock: OSCCLK (26 MHz). This external clock must be defined
68 - const: oscclk
87 - const: oscclk
111 - const: oscclk
141 - const: oscclk
171 clocks = <&oscclk>,
181 clock-names = "oscclk",
H A Dgoogle,gs101-clock.yaml16 is OSCCLK (24.576 MHz). That external clock must be defined as a fixed-rate
78 - const: oscclk
98 - const: oscclk
123 - const: oscclk
165 - const: oscclk
181 clock-names = "oscclk";
H A Dsamsung,exynos-ext-clock.yaml23 - samsung,exynos5420-oscclk
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos990.dtsi129 oscclk: clock-osc { label
132 clock-output-names = "oscclk";
189 clocks = <&oscclk>,
191 clock-names = "oscclk", "bus";
198 clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>;
219 <&oscclk>;
231 <&oscclk>;
257 clocks = <&oscclk>,
260 clock-names = "oscclk", "bus", "ip";
280 clocks = <&oscclk>,
[all …]
H A Dexynos850.dtsi49 oscclk: clock-oscclk { label
51 clock-output-names = "oscclk";
187 clocks = <&oscclk>, <&cmu_peri CLK_GOUT_MCT_PCLK>;
231 clocks = <&cmu_peri CLK_GOUT_WDT0_PCLK>, <&oscclk>;
242 clocks = <&cmu_peri CLK_GOUT_WDT1_PCLK>, <&oscclk>;
254 clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
257 clock-names = "oscclk", "dout_peri_bus",
266 clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL1_SWITCH>,
268 clock-names = "oscclk", "dout_cpucl1_switch",
277 clocks = <&oscclk>, <&cmu_top CLK_DOUT_CPUCL0_SWITCH>,
[all …]
H A Dexynos7870.dtsi123 oscclk: oscclk { label
153 clock-names = "oscclk", "bus", "spi0", "spi1", "spi2",
155 clocks = <&oscclk>,
172 clock-names = "oscclk";
173 clocks = <&oscclk>;
252 clock-names = "oscclk", "switch";
253 clocks = <&oscclk>,
262 clock-names = "oscclk", "mfc", "mscl";
263 clocks = <&oscclk>,
347 clock-names = "oscclk", "bus", "usb20drd";
[all …]
H A Dexynos7885.dtsi161 oscclk: osc-clock { label
164 clock-output-names = "oscclk";
198 clocks = <&oscclk>,
208 clock-names = "oscclk",
225 clocks = <&oscclk>,
229 clock-names = "oscclk",
240 clocks = <&oscclk>;
241 clock-names = "oscclk";
249 clocks = <&oscclk>,
255 clock-names = "oscclk",
H A Dexynos8895.dtsi122 oscclk: osc-clock { label
125 clock-output-names = "oscclk";
177 clocks = <&oscclk>,
179 clock-names = "oscclk", "bus";
186 clocks = <&oscclk>, <&cmu_peris CLK_GOUT_PERIS_MCT_PCLK>;
220 clocks = <&oscclk>,
227 clock-names = "oscclk", "bus", "uart", "usi0",
508 clocks = <&oscclk>,
524 clock-names = "oscclk", "bus", "speedy", "cam0",
1253 clocks = <&oscclk>,
[all …]
H A Dexynosautov920.dtsi39 clock-output-names = "oscclk";
309 clock-names = "oscclk",
414 clock-names = "oscclk",
892 clock-names = "oscclk",
1356 clock-names = "oscclk";
1381 clock-names = "oscclk",
1400 clock-names = "oscclk",
1422 clock-names = "oscclk",
1460 clock-names = "oscclk",
1478 clock-names = "oscclk",
[all …]
H A Dexynosautov9.dtsi158 clock-output-names = "oscclk";
181 clock-names = "oscclk",
193 clock-names = "oscclk",
206 clock-names = "oscclk",
220 clock-names = "oscclk",
234 clock-names = "oscclk",
248 clock-names = "oscclk",
261 clock-names = "oscclk", "bus";
307 clock-names = "oscclk",
318 clock-names = "oscclk",
[all …]
/linux/drivers/watchdog/
H A Drzv2h_wdt.c72 struct clk *oscclk; member
142 * - 0101b: oscclk/256 for RZ/V2H(P) in rzv2h_wdt_start()
200 ret = clk_enable(priv->oscclk); in rzv2h_wdt_restart()
208 clk_disable(priv->oscclk); in rzv2h_wdt_restart()
230 * - 0000b: oscclk/1 for RZ/V2H(P) in rzv2h_wdt_restart()
301 priv->oscclk = devm_clk_get_optional_prepared(dev, "oscclk"); in rzv2h_wdt_probe()
302 if (IS_ERR(priv->oscclk)) in rzv2h_wdt_probe()
303 return dev_err_probe(dev, PTR_ERR(priv->oscclk), "Failed to get oscclk\n"); in rzv2h_wdt_probe()
312 count_clk = priv->oscclk; in rzv2h_wdt_probe()
H A Drzg2l_wdt.c267 priv->osc_clk = devm_clk_get(&pdev->dev, "oscclk"); in rzg2l_wdt_probe()
269 return dev_err_probe(&pdev->dev, PTR_ERR(priv->osc_clk), "no oscclk"); in rzg2l_wdt_probe()
273 return dev_err_probe(&pdev->dev, -EINVAL, "oscclk rate is 0"); in rzg2l_wdt_probe()
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml121 - description: MUX used to switch between oscclk and tmds_clko,
124 - description: MUX used to switch between oscclk and pixel_clko,
139 - const: oscclk
195 "oscclk",
/linux/Documentation/devicetree/bindings/watchdog/
H A Drenesas,r9a09g057-wdt.yaml43 - const: oscclk
96 clock-names = "pclk", "oscclk";
H A Drenesas,rzg2l-wdt.yaml50 - const: oscclk
105 clock-names = "pclk", "oscclk";
/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2600-pinctrl.yaml143 - OSCCLK
372 - OSCCLK
H A Daspeed,ast2400-pinctrl.yaml116 - OSCCLK

123