1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2/* 3 * Samsung Galaxy S22+ (g0s/SM-S906B) device tree source 4 * 5 * Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> 6 */ 7 8/dts-v1/; 9#include "exynos2200.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13 14/ { 15 model = "Samsung Galaxy S22+ (SM-S906B)"; 16 compatible = "samsung,g0s", "samsung,exynos2200"; 17 chassis-type = "handset"; 18 19 chosen { 20 #address-cells = <2>; 21 #size-cells = <2>; 22 ranges; 23 24 framebuffer: framebuffer { 25 compatible = "simple-framebuffer"; 26 memory-region = <&cont_splash_mem>; 27 width = <1080>; 28 height = <2340>; 29 stride = <(1080 * 4)>; 30 format = "a8r8g8b8"; 31 }; 32 }; 33 34 /* 35 * RTC clock (XrtcXTI); external, must be 32.768 kHz. 36 * 37 * TODO: Remove this once RTC clock is implemented properly as part of 38 * PMIC driver. 39 */ 40 rtcclk: clock-rtcclk { 41 compatible = "fixed-clock"; 42 clock-output-names = "rtcclk"; 43 #clock-cells = <0>; 44 clock-frequency = <32768>; 45 }; 46 47 gpio-keys { 48 compatible = "gpio-keys"; 49 50 pinctrl-0 = <&key_volup>; 51 pinctrl-names = "default"; 52 53 volup-key { 54 label = "Volume Up"; 55 linux,code = <KEY_VOLUMEUP>; 56 gpios = <&gpa3 0 GPIO_ACTIVE_LOW>; 57 wakeup-source; 58 }; 59 }; 60 61 memory@80000000 { 62 device_type = "memory"; 63 reg = <0x0 0x80000000 0x0 0x80000000>, 64 <0x8 0x80000000 0x1 0x7e000000>; 65 }; 66 67 /* TODO: Remove this once PMIC is implemented */ 68 reg_dummy: regulator-0 { 69 compatible = "regulator-fixed"; 70 regulator-name = "dummy_reg"; 71 }; 72 73 reserved-memory { 74 #address-cells = <2>; 75 #size-cells = <2>; 76 ranges; 77 78 cont_splash_mem: framebuffer@f6200000 { 79 reg = <0x0 0xf6200000 0x0 (1080 * 2340 * 4)>; 80 no-map; 81 }; 82 83 debug_kinfo_reserved: debug-kinfo-reserved@fcfff000 { 84 reg = <0x0 0xfcfff000 0x0 0x1000>; 85 no-map; 86 }; 87 88 log_itmon: log-itmon@fffe0000 { 89 reg = <0x0 0xfffe0000 0x0 0x20000>; 90 no-map; 91 }; 92 }; 93}; 94 95&cmu_hsi0 { 96 clocks = <&xtcxo>, 97 <&rtcclk>, 98 <&cmu_top CLK_DOUT_CMU_HSI0_NOC>, 99 <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>, 100 <&cmu_top CLK_DOUT_CMU_HSI0_DPOSC>, 101 <&cmu_top CLK_DOUT_CMU_HSI0_USB32DRD>; 102 clock-names = "oscclk", "rtcclk", "noc", "dpgtc", "dposc", "usb"; 103}; 104 105/* 106 * cpu2 and cpu3 fail to come up consistently, which leads to a hang later 107 * in the boot process. Disable them until the issue is figured out. 108 */ 109&cpu2 { 110 status = "fail"; 111}; 112 113&cpu3 { 114 status = "fail"; 115}; 116 117&ext_26m { 118 clock-frequency = <26000000>; 119}; 120 121&ext_200m { 122 clock-frequency = <200000000>; 123}; 124 125&mct_peris { 126 status = "okay"; 127}; 128 129&pinctrl_alive { 130 key_volup: key-volup-pins { 131 samsung,pins = "gpa3-0"; 132 samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 133 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; 134 samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>; 135 }; 136}; 137 138&ppi_cluster0 { 139 affinity = <&cpu0 &cpu1>; 140}; 141 142&usb { 143 /* TODO: Replace these once PMIC is implemented */ 144 vdd10-supply = <®_dummy>; 145 vdd33-supply = <®_dummy>; 146 status = "okay"; 147}; 148 149&usb32drd { 150 status = "okay"; 151}; 152 153&usb_dwc3 { 154 dr_mode = "otg"; 155 usb-role-switch; 156 role-switch-default-mode = "peripheral"; 157 maximum-speed = "high-speed"; 158}; 159 160&usb_hsphy { 161 /* TODO: Replace these once PMIC is implemented */ 162 vdda12-supply = <®_dummy>; 163 vdd-supply = <®_dummy>; 164 status = "okay"; 165}; 166 167&xtcxo { 168 clock-frequency = <76800000>; 169}; 170