xref: /linux/Documentation/devicetree/bindings/clock/samsung,exynos990-clock.yaml (revision 2f24482304ebd32c5aa374f31465b9941a860b92) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/samsung,exynos990-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung Exynos990 SoC clock controller
8
9maintainers:
10  - Igor Belwon <igor.belwon@mentallysanemainliners.org>
11  - Chanwoo Choi <cw00.choi@samsung.com>
12  - Krzysztof Kozlowski <krzk@kernel.org>
13
14description: |
15  Exynos990 clock controller is comprised of several CMU units, generating
16  clocks for different domains. Those CMU units are modeled as separate device
17  tree nodes, and might depend on each other. The root clock in that root tree
18  is an external clock: OSCCLK (26 MHz). This external clock must be defined
19  as a fixed-rate clock in dts.
20
21  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
22  dividers; all other clocks of function blocks (other CMUs) are usually
23  derived from CMU_TOP.
24
25  Each clock is assigned an identifier and client nodes can use this identifier
26  to specify the clock which they consume. All clocks available for usage
27  in clock consumer nodes are defined as preprocessor macros in
28  'include/dt-bindings/clock/samsung,exynos990.h' header.
29
30properties:
31  compatible:
32    enum:
33      - samsung,exynos990-cmu-hsi0
34      - samsung,exynos990-cmu-peris
35      - samsung,exynos990-cmu-top
36
37  clocks:
38    minItems: 1
39    maxItems: 5
40
41  clock-names:
42    minItems: 1
43    maxItems: 5
44
45  "#clock-cells":
46    const: 1
47
48  reg:
49    maxItems: 1
50
51required:
52  - compatible
53  - clocks
54  - clock-names
55  - "#clock-cells"
56  - reg
57
58allOf:
59  - if:
60      properties:
61        compatible:
62          contains:
63            const: samsung,exynos990-cmu-hsi0
64
65    then:
66      properties:
67        clocks:
68          items:
69            - description: External reference clock (26 MHz)
70            - description: CMU_HSI0 BUS clock (from CMU_TOP)
71            - description: CMU_HSI0 USB31DRD clock (from CMU_TOP)
72            - description: CMU_HSI0 USBDP_DEBUG clock (from CMU_TOP)
73            - description: CMU_HSI0 DPGTC clock (from CMU_TOP)
74
75        clock-names:
76          items:
77            - const: oscclk
78            - const: bus
79            - const: usb31drd
80            - const: usbdp_debug
81            - const: dpgtc
82
83  - if:
84      properties:
85        compatible:
86          contains:
87            const: samsung,exynos990-cmu-peris
88
89    then:
90      properties:
91        clocks:
92          items:
93            - description: External reference clock (26 MHz)
94            - description: CMU_PERIS BUS clock (from CMU_TOP)
95
96        clock-names:
97          items:
98            - const: oscclk
99            - const: bus
100
101  - if:
102      properties:
103        compatible:
104          contains:
105            const: samsung,exynos990-cmu-top
106
107    then:
108      properties:
109        clocks:
110          items:
111            - description: External reference clock (26 MHz)
112
113        clock-names:
114          items:
115            - const: oscclk
116
117additionalProperties: false
118
119examples:
120  - |
121    #include <dt-bindings/clock/samsung,exynos990.h>
122
123    cmu_hsi0: clock-controller@10a00000 {
124        compatible = "samsung,exynos990-cmu-hsi0";
125        reg = <0x10a00000 0x8000>;
126        #clock-cells = <1>;
127
128        clocks = <&oscclk>,
129                 <&cmu_top CLK_DOUT_CMU_HSI0_BUS>,
130                 <&cmu_top CLK_DOUT_CMU_HSI0_USB31DRD>,
131                 <&cmu_top CLK_DOUT_CMU_HSI0_USBDP_DEBUG>,
132                 <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>;
133        clock-names = "oscclk",
134                      "bus",
135                      "usb31drd",
136                      "usbdp_debug",
137                      "dpgtc";
138    };
139
140...
141