/freebsd/sys/contrib/device-tree/Bindings/opp/ |
H A D | opp-v2-base.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/op [all...] |
H A D | opp.txt | 1 Generic OPP (Operating Performance Points) Bindings 2 ---------------------------------------------------- 4 Devices work at voltage-current-frequency combinations and some implementations 10 This document contain multiple versions of OPP binding and only one of them 13 Binding 1: operating-points 16 This binding only supports voltage-frequency pairs. 19 - operating-points: An array of 2-tuples items, and each item consists 20 of frequency and voltage like <freq-kHz vol-uV>. 27 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; [all …]
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H A D | ti-omap5-opp-supply.txt | 1 Texas Instruments OMAP compatible OPP supply description 7 an OPP transitions. 9 Also, some supplies may have an associated vbb-supply which is an Adaptive Body 10 Bias regulator which much be transitioned in a specific sequence with regards 11 to the vdd-supply and clk when making an OPP transition. By supplying two 12 regulators to the device that will undergo OPP transitions we can make use 13 of the multi regulator binding that is part of the OPP core described here [1] 16 [1] Documentation/devicetree/bindings/opp/opp-v2.yaml 19 - vdd-supply: phandle to regulator controlling VDD supply 20 - vbb-supply: phandle to regulator controlling Body Bias supply [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | gpu.txt | 4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or 5 "amd,imageon-XYZ.W", "amd,imageon" 6 for example: "qcom,adreno-306.0", "qcom,adreno" 7 Note that you need to list the less specific "qcom,adreno" (since this 8 is what the device is matched on), in addition to the more specific 9 with the chip-id. 11 - reg: Physical base address and length of the controller's registers. 12 - interrupts: The interrupt signal from the gpu. 13 - clocks: device clocks (if applicable) 14 See ../clocks/clock-bindings.txt for details. [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5800.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 * values for board specific bindings. 20 compatible = "samsung,exynos5800-clock", "syscon"; 24 opp-2000000000 { 25 opp-hz = /bits/ 64 <2000000000>; 26 opp-microvolt = <1312500 1312500 1500000>; 27 clock-latency-ns = <140000>; 29 opp-1900000000 { 30 opp-hz = /bits/ 64 <1900000000>; 31 opp-microvolt = <1262500 1262500 1500000>; [all …]
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H A D | exynos4212.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 * based board files can include this file and provide values for board specific 23 #address-cells = <1>; 24 #size-cells = <0>; 26 cpu-map { 39 compatible = "arm,cortex-a9"; 42 clock-names = "cpu"; 43 operating-points-v2 = <&cpu0_opp_table>; 44 #cooling-cells = <2>; /* min followed by max */ 49 compatible = "arm,cortex-a9"; [all …]
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H A D | exynos4412.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 * based board files can include this file and provide values for board specific 23 #address-cells = <1>; 24 #size-cells = <0>; 26 cpu-map { 45 compatible = "arm,cortex-a9"; 48 clock-names = "cpu"; 49 operating-points-v2 = <&cpu0_opp_table>; 50 #cooling-cells = <2>; /* min followed by max */ 55 compatible = "arm,cortex-a9"; [all …]
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H A D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 11 * based board files can include this file and provide values for board specific 20 #include "exynos4-cpu-thermal.dtsi" 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bu [all...] |
H A D | exynos4x12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 * values for SoCs specific bindings. 19 #include "exynos4-cpu-thermal.dtsi" 27 fimc-lite0 = &fimc_lite_0; 28 fimc-lite1 = &fimc_lite_1; 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bu [all...] |
H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 * based board files can include this file and provide values for board specific 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 46 bus_dmc: bus-dmc { [all …]
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H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 * values for board specific bindings. 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; [all …]
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H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 * values for board specific bindings. 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 46 #address-cells = <1>; 47 #size-cells = <0>; 49 cpu-map { 62 compatible = "arm,cortex-a15"; 65 clock-names = "cpu"; [all …]
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H A D | exynos4412-odroid-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards 7 #include <dt-bindings/sound/samsung-i2s.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 11 #include "exynos4412-ppmu-common.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include "exynos-mfc-reserved-memory.dtsi" 22 stdout-path = &serial_1; 26 compatible = "samsung,secure-firmware"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/interconnect/ |
H A D | mediatek,cci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jia-Wei Chang <jia-wei.chang@mediatek.com> 11 - Johnson Wang <johnson.wang@mediatek.com> 21 - mediatek,mt8183-cci 22 - mediatek,mt8186-cci 26 - description: 28 - description: 33 clock-names: [all …]
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H A D | fsl,imx8m-noc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 18 for normal (non-secure) world. 20 The buses are based on externally licensed IPs such as ARM NIC-301 and 21 Arteris FlexNOC but DT bindings are specific to the integration of these bus 27 - items: 28 - enum: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
H A D | cpufreq-st.txt | 5 from the SoC, then supplies the OPP framework with 'prop' and 'supported 10 ---------------------- 12 No vendor specific driver required for this. 16 - operating-points : [See: ../power/opp-v1.yaml] 19 -------------- 24 operating-points = <1500000 0 32 -------------------------------------------- 38 - operating-points-v2 : [See ../power/opp-v2.yaml] 41 ---------------- 45 operating-points-v2 = <&cpu0_opp_table>; [all …]
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H A D | cpufreq-mediatek.txt | 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. 6 - clock-names: Should contain the following: 7 "cpu" - The multiplexer for clock input of CPU cluster. 8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock 11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml 15 - proc-supply: Regulator for Vproc of CPU cluster. 18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver 20 Vsram to fit SoC specific needs. When absent, the voltage scaling 23 - mediatek,cci: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | sdhci-msm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml# 5 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | nvidia,tegra20-emc.txt | 4 - name : Should be emc 5 - #address-cells : Should be 1 6 - #size-cells : Should be 0 7 - compatible : Should contain "nvidia,tegra20-emc". 8 - reg : Offset and length of the register set for the device 9 - nvidia,use-ram-code : If present, the sub-nodes will be addressed 12 irrespective of ram-code configuration. 13 - interrupts : Should contain EMC General interrupt. 14 - clocks : Should contain EMC clock. 15 - nvidia,memory-controller : Phandle of the Memory Controller node. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/power-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rafael J. Wysocki <rjw@rjwysocki.net> 11 - Kevi [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 * values for board specific bindings. 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cell [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | msm8953.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 4 #include <dt-bindings/clock/qcom,gcc-msm8953.h> 5 #include <dt-bindings/clock/qcom,rpmcc.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controlle [all...] |
H A D | msm8916.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/arm/coresight-cti-dt.h> 7 #include <dt-bindings/clock/qcom,gcc-msm891 [all...] |
H A D | msm8939.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2023, Linaro Limited 7 #include <dt-bindings/clock/qcom,gcc-msm8939.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/Bindings/thermal/ |
H A D | thermal-cooling-devices.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 4 --- 5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Amit Kucheria <amitk@kernel.org> 20 - thermal-sensor: device that measures temperature, has SoC-specific bindings 21 - cooling-device: device used to dissipate heat either passively or actively 22 - thermal-zones: a container of the following node types used to describe all 28 - Passive cooling: by means of regulating device performance. A typical 31 - Active cooling: by means of activating devices in order to remove the [all …]
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