Lines Matching +full:opp +full:- +full:specific
1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&intc>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 sleep_clk: sleep-clk {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <32768>;
29 xo_board: xo-board {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <19200000>;
33 clock-output-names = "xo";
38 #address-cells = <1>;
39 #size-cells = <0>;
43 compatible = "arm,cortex-a53";
45 enable-method = "psci";
46 capacity-dmips-mhz = <1024>;
47 next-level-cache = <&L2_0>;
48 #cooling-cells = <2>;
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 capacity-dmips-mhz = <1024>;
57 next-level-cache = <&L2_0>;
58 #cooling-cells = <2>;
63 compatible = "arm,cortex-a53";
65 enable-method = "psci";
66 capacity-dmips-mhz = <1024>;
67 next-level-cache = <&L2_0>;
68 #cooling-cells = <2>;
73 compatible = "arm,cortex-a53";
75 enable-method = "psci";
76 capacity-dmips-mhz = <1024>;
77 next-level-cache = <&L2_0>;
78 #cooling-cells = <2>;
83 compatible = "arm,cortex-a53";
85 enable-method = "psci";
86 capacity-dmips-mhz = <1024>;
87 next-level-cache = <&L2_1>;
88 #cooling-cells = <2>;
93 compatible = "arm,cortex-a53";
95 enable-method = "psci";
96 capacity-dmips-mhz = <1024>;
97 next-level-cache = <&L2_1>;
98 #cooling-cells = <2>;
103 compatible = "arm,cortex-a53";
105 enable-method = "psci";
106 capacity-dmips-mhz = <1024>;
107 next-level-cache = <&L2_1>;
108 #cooling-cells = <2>;
113 compatible = "arm,cortex-a53";
115 enable-method = "psci";
116 capacity-dmips-mhz = <1024>;
117 next-level-cache = <&L2_1>;
118 #cooling-cells = <2>;
121 cpu-map {
153 L2_0: l2-cache-0 {
155 cache-level = <2>;
156 cache-unified;
159 L2_1: l2-cache-1 {
161 cache-level = <2>;
162 cache-unified;
168 compatible = "qcom,scm-msm8953", "qcom,scm";
172 clock-names = "core", "bus", "iface";
173 #reset-cells = <1>;
184 compatible = "arm,cortex-a53-pmu";
189 compatible = "arm,psci-1.0";
194 compatible = "qcom,msm8953-rpm-proc", "qcom,rpm-proc";
196 smd-edge {
199 qcom,smd-edge = <15>;
201 rpm_requests: rpm-requests {
202 compatible = "qcom,rpm-msm8953";
203 qcom,smd-channels = "rpm_requests";
205 rpmcc: clock-controller {
206 compatible = "qcom,rpmcc-msm8953", "qcom,rpmcc";
208 clock-names = "xo";
209 #clock-cells = <1>;
212 rpmpd: power-controller {
213 compatible = "qcom,msm8953-rpmpd";
214 #power-domain-cells = <1>;
215 operating-points-v2 = <&rpmpd_opp_table>;
217 rpmpd_opp_table: opp-table {
218 compatible = "operating-points-v2";
221 opp-level = <RPM_SMD_LEVEL_RETENTION>;
225 opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
229 opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
233 opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
237 opp-level = <RPM_SMD_LEVEL_SVS>;
241 opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
245 opp-level = <RPM_SMD_LEVEL_NOM>;
249 opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
253 opp-level = <RPM_SMD_LEVEL_TURBO>;
261 reserved-memory {
262 #address-cells = <2>;
263 #size-cells = <2>;
267 compatible = "shared-dma-pool";
269 no-map;
274 no-map;
280 qcom,rpm-msg-ram = <&rpm_msg_ram>;
282 no-map;
287 no-map;
292 no-map;
297 no-map;
302 no-map;
305 dfps_data_mem: dfps-data@90000000 {
307 no-map;
310 cont_splash_mem: cont-splash@90001000 {
312 no-map;
317 no-map;
322 no-map;
326 compatible = "qcom,rmtfs-mem";
328 no-map;
330 qcom,client-id = <1>;
334 smp2p-adsp {
342 qcom,local-pid = <0>;
343 qcom,remote-pid = <2>;
345 smp2p_adsp_out: master-kernel {
346 qcom,entry-name = "master-kernel";
347 #qcom,smem-state-cells = <1>;
350 smp2p_adsp_in: slave-kernel {
351 qcom,entry-name = "slave-kernel";
353 interrupt-controller;
354 #interrupt-cells = <2>;
358 smp2p-modem {
366 qcom,local-pid = <0>;
367 qcom,remote-pid = <1>;
369 smp2p_modem_out: master-kernel {
370 qcom,entry-name = "master-kernel";
372 #qcom,smem-state-cells = <1>;
375 smp2p_modem_in: slave-kernel {
376 qcom,entry-name = "slave-kernel";
378 interrupt-controller;
379 #interrupt-cells = <2>;
383 smp2p-wcnss {
391 qcom,local-pid = <0>;
392 qcom,remote-pid = <4>;
394 smp2p_wcnss_out: master-kernel {
395 qcom,entry-name = "master-kernel";
397 #qcom,smem-state-cells = <1>;
400 smp2p_wcnss_in: slave-kernel {
401 qcom,entry-name = "slave-kernel";
403 interrupt-controller;
404 #interrupt-cells = <2>;
411 #address-cells = <1>;
412 #size-cells = <0>;
414 qcom,ipc-1 = <&apcs 8 13>;
415 qcom,ipc-3 = <&apcs 8 19>;
420 #qcom,smem-state-cells = <1>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
435 interrupt-controller;
436 #interrupt-cells = <2>;
441 #address-cells = <1>;
442 #size-cells = <1>;
444 compatible = "simple-bus";
447 compatible = "qcom,rpm-msg-ram";
452 compatible = "qcom,msm8953-qusb2-phy";
454 #phy-cells = <0>;
458 clock-names = "cfg_ahb", "ref";
460 qcom,tcsr-syscon = <&tcsr_phy_clk_scheme_sel>;
471 clock-names = "core";
474 tsens0: thermal-sensor@4a9000 {
475 compatible = "qcom,msm8953-tsens", "qcom,tsens-v2";
481 interrupt-names = "uplow", "critical";
482 #thermal-sensor-cells = <1>;
491 compatible = "qcom,msm8953-pinctrl";
494 gpio-controller;
495 gpio-ranges = <&tlmm 0 0 142>;
496 #gpio-cells = <2>;
497 interrupt-controller;
498 #interrupt-cells = <2>;
500 uart_console_active: uart-console-active-state {
503 drive-strength = <2>;
504 bias-disable;
507 uart_console_sleep: uart-console-sleep-state {
510 drive-strength = <2>;
511 bias-pull-down;
514 sdc1_clk_on: sdc1-clk-on-state {
516 bias-disable;
517 drive-strength = <16>;
520 sdc1_clk_off: sdc1-clk-off-state {
522 bias-disable;
523 drive-strength = <2>;
526 sdc1_cmd_on: sdc1-cmd-on-state {
528 bias-disable;
529 drive-strength = <10>;
532 sdc1_cmd_off: sdc1-cmd-off-state {
534 bias-disable;
535 drive-strength = <2>;
538 sdc1_data_on: sdc1-data-on-state {
540 bias-pull-up;
541 drive-strength = <10>;
544 sdc1_data_off: sdc1-data-off-state {
546 bias-pull-up;
547 drive-strength = <2>;
550 sdc1_rclk_on: sdc1-rclk-on-state {
552 bias-pull-down;
555 sdc1_rclk_off: sdc1-rclk-off-state {
557 bias-pull-down;
560 sdc2_clk_on: sdc2-clk-on-state {
562 drive-strength = <16>;
563 bias-disable;
566 sdc2_clk_off: sdc2-clk-off-state {
568 bias-disable;
569 drive-strength = <2>;
572 sdc2_cmd_on: sdc2-cmd-on-state {
574 bias-pull-up;
575 drive-strength = <10>;
578 sdc2_cmd_off: sdc2-cmd-off-state {
580 bias-pull-up;
581 drive-strength = <2>;
584 sdc2_data_on: sdc2-data-on-state {
586 bias-pull-up;
587 drive-strength = <10>;
590 sdc2_data_off: sdc2-data-off-state {
592 bias-pull-up;
593 drive-strength = <2>;
596 sdc2_cd_on: cd-on-state {
599 drive-strength = <2>;
600 bias-pull-up;
603 sdc2_cd_off: cd-off-state {
606 drive-strength = <2>;
607 bias-disable;
610 gpio_key_default: gpio-key-default-state {
613 drive-strength = <2>;
614 bias-pull-up;
617 i2c_1_default: i2c-1-default-state {
620 drive-strength = <2>;
621 bias-disable;
624 i2c_1_sleep: i2c-1-sleep-state {
627 drive-strength = <2>;
628 bias-disable;
631 i2c_2_default: i2c-2-default-state {
634 drive-strength = <2>;
635 bias-disable;
638 i2c_2_sleep: i2c-2-sleep-state {
641 drive-strength = <2>;
642 bias-disable;
645 i2c_3_default: i2c-3-default-state {
648 drive-strength = <2>;
649 bias-disable;
652 i2c_3_sleep: i2c-3-sleep-state {
655 drive-strength = <2>;
656 bias-disable;
659 i2c_4_default: i2c-4-default-state {
662 drive-strength = <2>;
663 bias-disable;
666 i2c_4_sleep: i2c-4-sleep-state {
669 drive-strength = <2>;
670 bias-disable;
673 i2c_5_default: i2c-5-default-state {
676 drive-strength = <2>;
677 bias-disable;
680 i2c_5_sleep: i2c-5-sleep-state {
683 drive-strength = <2>;
684 bias-disable;
687 i2c_6_default: i2c-6-default-state {
690 drive-strength = <2>;
691 bias-disable;
694 i2c_6_sleep: i2c-6-sleep-state {
697 drive-strength = <2>;
698 bias-disable;
701 i2c_7_default: i2c-7-default-state {
704 drive-strength = <2>;
705 bias-disable;
708 i2c_7_sleep: i2c-7-sleep-state {
711 drive-strength = <2>;
712 bias-disable;
715 i2c_8_default: i2c-8-default-state {
718 drive-strength = <2>;
719 bias-disable;
722 i2c_8_sleep: i2c-8-sleep-state {
725 drive-strength = <2>;
726 bias-disable;
729 spi_3_default: spi-3-default-state {
732 drive-strength = <2>;
733 bias-disable;
736 spi_3_sleep: spi-3-sleep-state {
739 drive-strength = <2>;
740 bias-disable;
743 spi_5_default: spi-5-default-state {
746 drive-strength = <2>;
747 bias-disable;
750 spi_5_sleep: spi-5-sleep-state {
753 drive-strength = <2>;
754 bias-disable;
757 spi_6_default: spi-6-default-state {
760 drive-strength = <2>;
761 bias-disable;
764 spi_6_sleep: spi-6-sleep-state {
767 drive-strength = <2>;
768 bias-disable;
771 wcnss_pin_a: wcnss-active-state {
773 wcss-wlan2-pins {
776 drive-strength = <6>;
777 bias-pull-up;
780 wcss-wlan1-pins {
783 drive-strength = <6>;
784 bias-pull-up;
787 wcss-wlan0-pins {
790 drive-strength = <6>;
791 bias-pull-up;
794 wcss-wlan-pins {
797 drive-strength = <6>;
798 bias-pull-up;
803 gcc: clock-controller@1800000 {
804 compatible = "qcom,gcc-msm8953";
806 #clock-cells = <1>;
807 #reset-cells = <1>;
808 #power-domain-cells = <1>;
815 clock-names = "xo",
824 compatible = "qcom,tcsr-mutex";
826 #hwlock-cells = <1>;
830 compatible = "qcom,tcsr-msm8953", "syscon";
835 compatible = "qcom,tcsr-msm8953", "syscon";
839 mdss: display-subsystem@1a00000 {
844 reg-names = "mdss_phys",
847 power-domains = <&gcc MDSS_GDSC>;
850 interrupt-controller;
851 #interrupt-cells = <1>;
857 clock-names = "iface",
862 #address-cells = <1>;
863 #size-cells = <1>;
868 mdp: display-controller@1a01000 {
869 compatible = "qcom,msm8953-mdp5", "qcom,mdp5";
871 reg-names = "mdp_phys";
873 interrupt-parent = <&mdss>;
876 power-domains = <&gcc MDSS_GDSC>;
882 clock-names = "iface",
890 #address-cells = <1>;
891 #size-cells = <0>;
896 remote-endpoint = <&mdss_dsi0_in>;
903 remote-endpoint = <&mdss_dsi1_in>;
910 compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
912 reg-names = "dsi_ctrl";
914 interrupt-parent = <&mdss>;
917 assigned-clocks = <&gcc BYTE0_CLK_SRC>,
919 assigned-clock-parents = <&mdss_dsi0_phy 0>,
928 clock-names = "mdp_core",
937 #address-cells = <1>;
938 #size-cells = <0>;
943 #address-cells = <1>;
944 #size-cells = <0>;
949 remote-endpoint = <&mdp5_intf1_out>;
962 compatible = "qcom,dsi-phy-14nm-8953";
966 reg-names = "dsi_phy",
970 #clock-cells = <1>;
971 #phy-cells = <0>;
974 clock-names = "iface", "ref";
980 compatible = "qcom,msm8953-dsi-ctrl", "qcom,mdss-dsi-ctrl";
982 reg-names = "dsi_ctrl";
984 interrupt-parent = <&mdss>;
987 assigned-clocks = <&gcc BYTE1_CLK_SRC>,
989 assigned-clock-parents = <&mdss_dsi1_phy 0>,
998 clock-names = "mdp_core",
1010 #address-cells = <1>;
1011 #size-cells = <0>;
1016 remote-endpoint = <&mdp5_intf2_out>;
1029 compatible = "qcom,dsi-phy-14nm-8953";
1033 reg-names = "dsi_phy",
1037 #clock-cells = <1>;
1038 #phy-cells = <0>;
1041 clock-names = "iface", "ref";
1048 compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
1053 clock-names = "iface", "bus";
1055 qcom,iommu-secure-id = <17>;
1057 #address-cells = <1>;
1058 #iommu-cells = <1>;
1059 #size-cells = <1>;
1062 iommu-ctx@14000 {
1063 compatible = "qcom,msm-iommu-v1-ns";
1069 iommu-ctx@15000 {
1070 compatible = "qcom,msm-iommu-v1-ns";
1076 iommu-ctx@16000 {
1077 compatible = "qcom,msm-iommu-v1-ns";
1084 compatible = "qcom,spmi-pmic-arb";
1090 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
1091 interrupt-names = "periph_irq";
1095 interrupt-controller;
1097 #interrupt-cells = <4>;
1098 #address-cells = <2>;
1099 #size-cells = <0>;
1103 compatible = "qcom,msm8953-mss-pil";
1106 reg-names = "qdsp6", "rmb";
1108 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1113 interrupt-names = "wdog", "fatal", "ready",
1114 "handover", "stop-ack";
1116 power-domains = <&rpmpd MSM8953_VDDCX>,
1119 power-domain-names = "cx", "mx","mss";
1125 clock-names = "iface", "bus", "mem", "xo";
1127 qcom,smem-states = <&smp2p_modem_out 0>;
1128 qcom,smem-state-names = "stop";
1131 reset-names = "mss_restart";
1133 qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>;
1138 memory-region = <&mba_mem>;
1142 memory-region = <&mpss_mem>;
1145 smd-edge {
1148 qcom,smd-edge = <0>;
1150 qcom,remote-pid = <1>;
1157 compatible = "qcom,msm8953-dwc3", "qcom,dwc3";
1159 #address-cells = <1>;
1160 #size-cells = <1>;
1165 interrupt-names = "hs_phy_irq", "ss_phy_irq";
1172 clock-names = "cfg_noc",
1178 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
1180 assigned-clock-rates = <19200000>, <133330000>;
1182 power-domains = <&gcc USB30_GDSC>;
1184 qcom,select-utmi-as-pipe-clk;
1193 phy-names = "usb2-phy";
1195 snps,usb2-gadget-lpm-disable;
1196 snps,dis-u1-entry-quirk;
1197 snps,dis-u2-entry-quirk;
1198 snps,is-utmi-l1-suspend;
1199 snps,hird-threshold = /bits/ 8 <0x00>;
1201 maximum-speed = "high-speed";
1206 compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
1209 reg-names = "hc", "core";
1213 interrupt-names = "hc_irq", "pwr_irq";
1218 clock-names = "iface", "core", "xo";
1220 power-domains = <&rpmpd MSM8953_VDDCX>;
1221 operating-points-v2 = <&sdhc1_opp_table>;
1223 pinctrl-names = "default", "sleep";
1224 pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
1225 pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
1227 mmc-hs400-1_8v;
1228 mmc-hs200-1_8v;
1229 mmc-ddr-1_8v;
1230 bus-width = <8>;
1231 non-removable;
1235 sdhc1_opp_table: opp-table-sdhc1 {
1236 compatible = "operating-points-v2";
1238 opp-25000000 {
1239 opp-hz = /bits/ 64 <25000000>;
1240 required-opps = <&rpmpd_opp_low_svs>;
1243 opp-50000000 {
1244 opp-hz = /bits/ 64 <50000000>;
1245 required-opps = <&rpmpd_opp_svs>;
1248 opp-100000000 {
1249 opp-hz = /bits/ 64 <100000000>;
1250 required-opps = <&rpmpd_opp_svs>;
1253 opp-192000000 {
1254 opp-hz = /bits/ 64 <192000000>;
1255 required-opps = <&rpmpd_opp_nom>;
1258 opp-384000000 {
1259 opp-hz = /bits/ 64 <384000000>;
1260 required-opps = <&rpmpd_opp_nom>;
1266 compatible = "qcom,msm8953-sdhci", "qcom,sdhci-msm-v4";
1269 reg-names = "hc", "core";
1273 interrupt-names = "hc_irq", "pwr_irq";
1278 clock-names = "iface", "core", "xo";
1280 power-domains = <&rpmpd MSM8953_VDDCX>;
1281 operating-points-v2 = <&sdhc2_opp_table>;
1283 pinctrl-names = "default", "sleep";
1284 pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
1285 pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
1287 bus-width = <4>;
1291 sdhc2_opp_table: opp-table-sdhc2 {
1292 compatible = "operating-points-v2";
1294 opp-25000000 {
1295 opp-hz = /bits/ 64 <25000000>;
1296 required-opps = <&rpmpd_opp_low_svs>;
1299 opp-50000000 {
1300 opp-hz = /bits/ 64 <50000000>;
1301 required-opps = <&rpmpd_opp_svs>;
1304 opp-100000000 {
1305 opp-hz = /bits/ 64 <100000000>;
1306 required-opps = <&rpmpd_opp_svs>;
1309 opp-177770000 {
1310 opp-hz = /bits/ 64 <177770000>;
1311 required-opps = <&rpmpd_opp_nom>;
1314 opp-200000000 {
1315 opp-hz = /bits/ 64 <200000000>;
1316 required-opps = <&rpmpd_opp_nom>;
1321 blsp1_dma: dma-controller@7884000 {
1322 compatible = "qcom,bam-v1.7.0";
1326 clock-names = "bam_clk";
1327 num-channels = <12>;
1328 #dma-cells = <1>;
1330 qcom,num-ees = <4>;
1331 qcom,controlled-remotely;
1335 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
1340 clock-names = "core", "iface";
1346 compatible = "qcom,i2c-qup-v2.2.1";
1349 clock-names = "core", "iface";
1353 dma-names = "tx", "rx";
1355 pinctrl-names = "default", "sleep";
1356 pinctrl-0 = <&i2c_1_default>;
1357 pinctrl-1 = <&i2c_1_sleep>;
1359 #address-cells = <1>;
1360 #size-cells = <0>;
1366 compatible = "qcom,i2c-qup-v2.2.1";
1369 clock-names = "core", "iface";
1373 dma-names = "tx", "rx";
1375 pinctrl-names = "default", "sleep";
1376 pinctrl-0 = <&i2c_2_default>;
1377 pinctrl-1 = <&i2c_2_sleep>;
1379 #address-cells = <1>;
1380 #size-cells = <0>;
1386 compatible = "qcom,i2c-qup-v2.2.1";
1389 clock-names = "core", "iface";
1393 dma-names = "tx", "rx";
1395 pinctrl-names = "default", "sleep";
1396 pinctrl-0 = <&i2c_3_default>;
1397 pinctrl-1 = <&i2c_3_sleep>;
1399 #address-cells = <1>;
1400 #size-cells = <0>;
1406 compatible = "qcom,spi-qup-v2.2.1";
1409 clock-names = "core", "iface";
1413 dma-names = "tx", "rx";
1415 pinctrl-names = "default", "sleep";
1416 pinctrl-0 = <&spi_3_default>;
1417 pinctrl-1 = <&spi_3_sleep>;
1419 #address-cells = <1>;
1420 #size-cells = <0>;
1426 compatible = "qcom,i2c-qup-v2.2.1";
1429 clock-names = "core", "iface";
1433 dma-names = "tx", "rx";
1435 pinctrl-names = "default", "sleep";
1436 pinctrl-0 = <&i2c_4_default>;
1437 pinctrl-1 = <&i2c_4_sleep>;
1439 #address-cells = <1>;
1440 #size-cells = <0>;
1445 blsp2_dma: dma-controller@7ac4000 {
1446 compatible = "qcom,bam-v1.7.0";
1450 clock-names = "bam_clk";
1451 num-channels = <12>;
1452 #dma-cells = <1>;
1454 qcom,num-ees = <4>;
1455 qcom,controlled-remotely;
1459 compatible = "qcom,i2c-qup-v2.2.1";
1462 clock-names = "core", "iface";
1466 dma-names = "tx", "rx";
1468 pinctrl-names = "default", "sleep";
1469 pinctrl-0 = <&i2c_5_default>;
1470 pinctrl-1 = <&i2c_5_sleep>;
1472 #address-cells = <1>;
1473 #size-cells = <0>;
1479 compatible = "qcom,spi-qup-v2.2.1";
1482 clock-names = "core", "iface";
1486 dma-names = "tx", "rx";
1488 pinctrl-names = "default", "sleep";
1489 pinctrl-0 = <&spi_5_default>;
1490 pinctrl-1 = <&spi_5_sleep>;
1492 #address-cells = <1>;
1493 #size-cells = <0>;
1499 compatible = "qcom,i2c-qup-v2.2.1";
1502 clock-names = "core", "iface";
1506 dma-names = "tx", "rx";
1508 pinctrl-names = "default", "sleep";
1509 pinctrl-0 = <&i2c_6_default>;
1510 pinctrl-1 = <&i2c_6_sleep>;
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1519 compatible = "qcom,spi-qup-v2.2.1";
1522 clock-names = "core", "iface";
1526 dma-names = "tx", "rx";
1528 pinctrl-names = "default", "sleep";
1529 pinctrl-0 = <&spi_6_default>;
1530 pinctrl-1 = <&spi_6_sleep>;
1532 #address-cells = <1>;
1533 #size-cells = <0>;
1539 compatible = "qcom,i2c-qup-v2.2.1";
1542 clock-names = "core", "iface";
1546 dma-names = "tx", "rx";
1548 pinctrl-names = "default", "sleep";
1549 pinctrl-0 = <&i2c_7_default>;
1550 pinctrl-1 = <&i2c_7_sleep>;
1552 #address-cells = <1>;
1553 #size-cells = <0>;
1559 compatible = "qcom,i2c-qup-v2.2.1";
1562 clock-names = "core", "iface";
1566 dma-names = "tx", "rx";
1568 pinctrl-names = "default", "sleep";
1569 pinctrl-0 = <&i2c_8_default>;
1570 pinctrl-1 = <&i2c_8_sleep>;
1572 #address-cells = <1>;
1573 #size-cells = <0>;
1579 compatible = "qcom,pronto-v3-pil", "qcom,pronto";
1581 reg-names = "ccu", "dxe", "pmu";
1583 memory-region = <&wcnss_fw_mem>;
1585 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
1590 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1592 power-domains = <&rpmpd MSM8953_VDDCX>,
1594 power-domain-names = "cx", "mx";
1596 qcom,smem-states = <&smp2p_wcnss_out 0>;
1597 qcom,smem-state-names = "stop";
1599 pinctrl-names = "default";
1600 pinctrl-0 = <&wcnss_pin_a>;
1605 /* Separate chip, compatible is board-specific */
1607 clock-names = "xo";
1610 smd-edge {
1614 qcom,smd-edge = <6>;
1615 qcom,remote-pid = <4>;
1621 qcom,smd-channels = "WCNSS_CTRL";
1626 compatible = "qcom,wcnss-bt";
1630 compatible = "qcom,wcnss-wlan";
1634 interrupt-names = "tx", "rx";
1636 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
1637 qcom,smem-state-names = "tx-enable",
1638 "tx-rings-empty";
1644 intc: interrupt-controller@b000000 {
1645 compatible = "qcom,msm-qgic2";
1646 interrupt-controller;
1647 #interrupt-cells = <3>;
1652 compatible = "qcom,msm8953-apcs-kpss-global", "syscon";
1654 #mbox-cells = <1>;
1658 compatible = "arm,armv7-timer-mem";
1660 #address-cells = <1>;
1661 #size-cells = <1>;
1665 frame-number = <0>;
1673 frame-number = <1>;
1680 frame-number = <2>;
1687 frame-number = <3>;
1694 frame-number = <4>;
1701 frame-number = <5>;
1708 frame-number = <6>;
1716 compatible = "qcom,msm8953-adsp-pil";
1719 interrupts-extended = <&intc 0 293 IRQ_TYPE_EDGE_RISING>,
1724 interrupt-names = "wdog", "fatal", "ready",
1725 "handover", "stop-ack";
1727 clock-names = "xo";
1729 power-domains = <&rpmpd MSM8953_VDDCX>;
1730 power-domain-names = "cx";
1732 memory-region = <&adsp_fw_mem>;
1734 qcom,smem-states = <&smp2p_adsp_out 0>;
1735 qcom,smem-state-names = "stop";
1739 smd-edge {
1744 qcom,smd-edge = <1>;
1745 qcom,remote-pid = <2>;
1748 compatible = "qcom,apr-v2";
1749 qcom,smd-channels = "apr_audio_svc";
1751 #address-cells = <1>;
1752 #size-cells = <0>;
1763 compatible = "qcom,q6afe-dais";
1764 #address-cells = <1>;
1765 #size-cells = <0>;
1766 #sound-dai-cells = <1>;
1770 qcom,sd-lines = <0 1>;
1774 qcom,sd-lines = <0 1>;
1778 qcom,sd-lines = <0>;
1782 q6afecc: clock-controller {
1783 compatible = "qcom,q6afe-clocks";
1784 #clock-cells = <2>;
1792 compatible = "qcom,q6asm-dais";
1793 #address-cells = <1>;
1794 #size-cells = <0>;
1795 #sound-dai-cells = <1>;
1812 is-compress-dai;
1821 compatible = "qcom,q6adm-routing";
1822 #sound-dai-cells = <0>;
1830 thermal-zones {
1831 cpu0-thermal {
1832 polling-delay-passive = <250>;
1833 polling-delay = <1000>;
1834 thermal-sensors = <&tsens0 9>;
1836 cpu0_alert: trip-point0 {
1847 cooling-maps {
1850 cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1854 cpu1-thermal {
1855 polling-delay-passive = <250>;
1856 polling-delay = <1000>;
1857 thermal-sensors = <&tsens0 10>;
1859 cpu1_alert: trip-point0 {
1870 cooling-maps {
1873 cooling-device = <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1877 cpu2-thermal {
1878 polling-delay-passive = <250>;
1879 polling-delay = <1000>;
1880 thermal-sensors = <&tsens0 11>;
1882 cpu2_alert: trip-point0 {
1893 cooling-maps {
1896 cooling-device = <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1900 cpu3-thermal {
1901 polling-delay-passive = <250>;
1902 polling-delay = <1000>;
1903 thermal-sensors = <&tsens0 12>;
1905 cpu3_alert: trip-point0 {
1916 cooling-maps {
1919 cooling-device = <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1923 cpu4-thermal {
1924 polling-delay-passive = <250>;
1925 polling-delay = <1000>;
1926 thermal-sensors = <&tsens0 4>;
1928 cpu4_alert: trip-point0 {
1939 cooling-maps {
1942 cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1946 cpu5-thermal {
1947 polling-delay-passive = <250>;
1948 polling-delay = <1000>;
1949 thermal-sensors = <&tsens0 5>;
1951 cpu5_alert: trip-point0 {
1962 cooling-maps {
1965 cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1969 cpu6-thermal {
1970 polling-delay-passive = <250>;
1971 polling-delay = <1000>;
1972 thermal-sensors = <&tsens0 6>;
1974 cpu6_alert: trip-point0 {
1985 cooling-maps {
1988 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1992 cpu7-thermal {
1993 polling-delay-passive = <250>;
1994 polling-delay = <1000>;
1995 thermal-sensors = <&tsens0 7>;
1997 cpu7_alert: trip-point0 {
2008 cooling-maps {
2011 cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
2018 compatible = "arm,armv8-timer";