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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-pxl2dpi.yaml7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
19 The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
H A Dfsl,imx8qxp-ldb.yaml19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
/linux/Documentation/devicetree/bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-tqma8xqp.dtsi12 model = "TQ-Systems i.MX8QXP TQMa8XQP";
H A Dimx8qxp-tqma8xqp-mba8xx.dts14 model = "TQ-Systems i.MX8QXP TQMa8XQP on MBa8Xx";
H A Dimx8qxp-ai_ml.dts12 model = "Einfochips i.MX8QXP AI_ML";
/linux/drivers/firmware/imx/
H A DKconfig8 DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
H A Dimx-scu-soc.c87 return "i.MX8QXP"; in imx_scu_soc_name()
/linux/Documentation/devicetree/bindings/phy/
H A Dmixel,mipi-dsi-phy.yaml17 The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8-jpeg.yaml7 title: i.MX8QXP/QM JPEG decoder/encoder
/linux/Documentation/devicetree/bindings/clock/
H A Dimx8qxp-lpcg.yaml7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
/linux/drivers/media/platform/nxp/imx-jpeg/
H A Dmxc-jpeg.h3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
H A Dmxc-jpeg-hw.h3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
H A Dmxc-jpeg-hw.c3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx8qxp.c240 MODULE_DESCRIPTION("NXP i.MX8QXP pinctrl driver");
/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8qm-hsio.c138 if (lane->idx == 0) { /* i.MX8QXP */ in imx_hsio_init()
158 else /* i.MX8QXP only has PCIEB, idx is 0 */ in imx_hsio_init()
/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-pipe.c3 * V4L2 Capture ISI subdev driver for i.MX8QXP/QM platform
5 * ISI is a Image Sensor Interface of i.MX8QXP/QM platform, which
/linux/drivers/clk/imx/
H A Dclk-imx8qxp.c352 MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");
H A Dclk-imx8qxp-lpcg.c372 MODULE_DESCRIPTION("NXP i.MX8QXP LPCG clock driver");
/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8qxp-pixel-link.c420 MODULE_DESCRIPTION("i.MX8QXP/QM display pixel link bridge driver");
H A Dimx8qxp-pxl2dpi.c478 MODULE_DESCRIPTION("i.MX8QXP pixel link to DPI bridge driver");
H A Dimx8qxp-ldb.c718 MODULE_DESCRIPTION("i.MX8QXP LVDS Display Bridge(LDB)/Pixel Mapper bridge driver");
/linux/sound/soc/fsl/
H A Dfsl_asrc.c77 * i.MX8QM/i.MX8QXP uses the same map for input and output.
80 * clk_map_imx8qxp[0] is for i.MX8QXP asrc0
81 * clk_map_imx8qxp[1] is for i.MX8QXP asrc1