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/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
11 compatible = "microchip,mpfs";
193 compatible = "microchip,mpfs-sys-controller";
210 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
246 compatible = "microchip,mpfs-pdma", "sifive,pdma0";
255 compatible = "microchip,mpfs-clkcfg";
263 compatible = "microchip,mpfs-ccc";
271 compatible = "microchip,mpfs-ccc";
279 compatible = "microchip,mpfs-ccc";
287 compatible = "microchip,mpfs-ccc";
[all …]
H A Dmpfs-sev-kit.dts6 #include "mpfs.dtsi"
7 #include "mpfs-sev-kit-fabric.dtsi"
13 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
H A Dmpfs-polarberry.dts6 #include "mpfs.dtsi"
7 #include "mpfs-polarberry-fabric.dtsi"
11 compatible = "sundance,polarberry", "microchip,mpfs";
H A Dmpfs-tysom-m.dts11 #include "mpfs.dtsi"
12 #include "mpfs-tysom-m-fabric.dtsi"
16 compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";
H A Dmpfs-m100pfsevp.dts10 #include "mpfs.dtsi"
11 #include "mpfs-m100pfs-fabric.dtsi"
15 compatible = "aries,m100pfsevp", "microchip,mpfs";
H A Dmpfs-beaglev-fire.dts7 #include "mpfs.dtsi"
8 #include "mpfs-beaglev-fire-fabric.dtsi"
17 compatible = "beagle,beaglev-fire", "microchip,mpfs";
/linux/Documentation/devicetree/bindings/rtc/
H A Dmicrochip,mpfs-rtc.yaml4 $id: http://devicetree.org/schemas/rtc/microchip,mpfs-rtc.yaml#
8 title: Microchip PolarFire Soc (MPFS) RTC
21 - const: microchip,mpfs-rtc
22 - const: microchip,mpfs-rtc
61 #include "dt-bindings/clock/microchip,mpfs-clock.h"
63 compatible = "microchip,mpfs-rtc";
/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-clkcfg.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
22 const: microchip,mpfs-clkcfg
51 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
62 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
77 #include <dt-bindings/clock/microchip,mpfs-clock.h>
83 compatible = "microchip,mpfs-clkcfg";
H A Dmicrochip,mpfs-ccc.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
20 const: microchip,mpfs-ccc
57 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
72 compatible = "microchip,mpfs-ccc";
/linux/drivers/char/hw_random/
H A Dmpfs-rng.c3 * Microchip PolarFire SoC (MPFS) hardware random driver
13 #include <soc/microchip/mpfs.h>
84 return dev_err_probe(&pdev->dev, ret, "Failed to register MPFS hwrng\n"); in mpfs_rng_probe()
86 dev_info(&pdev->dev, "Registered MPFS hwrng\n"); in mpfs_rng_probe()
93 .name = "mpfs-rng",
101 MODULE_DESCRIPTION("PolarFire SoC (MPFS) hardware random driver");
/linux/Documentation/devicetree/bindings/soc/microchip/
H A Dmicrochip,mpfs-mss-top-sysreg.yaml4 $id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml#
19 - const: microchip,mpfs-mss-top-sysreg
37 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list
43 $ref: /schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml
54 compatible = "microchip,mpfs-mss-top-sysreg", "syscon", "simple-mfd";
H A Dmicrochip,mpfs-sys-controller.yaml4 $id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller
27 const: microchip,mpfs-sys-controller
48 compatible = "microchip,mpfs-sys-controller";
/linux/drivers/soc/microchip/
H A DKconfig2 tristate "Microchip PolarFire SoC (MPFS) system controller support"
6 This driver adds support for the PolarFire SoC (MPFS) system controller.
14 bool "PolarFire SoC (MPFS) syscon drivers"
19 These drivers add support for the syscons on PolarFire SoC (MPFS).
H A DMakefile1 obj-$(CONFIG_POLARFIRE_SOC_SYS_CTRL) += mpfs-sys-controller.o
2 obj-$(CONFIG_POLARFIRE_SOC_SYSCONS) += mpfs-control-scb.o mpfs-mss-top-sysreg.o
H A Dmpfs-control-scb.c10 MFD_CELL_NAME("mpfs-tvs"),
22 { .compatible = "microchip,mpfs-control-scb", },
29 .name = "mpfs-control-scb",
H A Dmpfs-mss-top-sysreg.c11 MFD_CELL_NAME("mpfs-reset"),
28 { .compatible = "microchip,mpfs-mss-top-sysreg", },
35 .name = "mpfs-mss-top-sysreg",
/linux/Documentation/devicetree/bindings/mailbox/
H A Dmicrochip,mpfs-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
14 const: microchip,mpfs-mailbox
51 compatible = "microchip,mpfs-mailbox";
/linux/drivers/reset/
H A Dreset-mpfs.c3 * PolarFire SoC (MPFS) Peripheral Clock Reset Controller
19 #include <dt-bindings/clock/microchip,mpfs-clock.h>
20 #include <soc/microchip/mpfs.h>
148 .name = "mpfs-reset",
182 adev = devm_auxiliary_device_create(clk_dev, "reset-mpfs", (void *)map); in mpfs_reset_controller_register()
192 .name = "reset_mpfs.reset-mpfs",
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,mpfs-pinctrl-iomux0.yaml4 $id: http://devicetree.org/schemas/pinctrl/microchip,mpfs-pinctrl-iomux0.yaml#
22 - const: microchip,mpfs-pinctrl-iomux0
25 - const: microchip,mpfs-pinctrl-iomux0
74 compatible = "microchip,mpfs-pinctrl-iomux0";
/linux/Documentation/devicetree/bindings/cache/
H A Dsifive,ccache0.yaml48 - const: microchip,mpfs-ccache
53 - const: microchip,mpfs-ccache
102 - microchip,mpfs-ccache
153 - microchip,mpfs-ccache
/linux/drivers/clk/microchip/
H A DMakefile4 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs.o
5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o
H A Dclk-mpfs-ccc.c12 #include <dt-bindings/clock/microchip,mpfs-clock.h>
267 { .compatible = "microchip,mpfs-ccc", },
275 .name = "microchip-mpfs-ccc",
H A Dclk-mpfs.c14 #include <dt-bindings/clock/microchip,mpfs-clock.h>
15 #include <soc/microchip/mpfs.h>
475 clk_data->regmap = syscon_regmap_lookup_by_compatible("microchip,mpfs-mss-top-sysreg"); in mpfs_clk_syscon_probe()
558 { .compatible = "microchip,mpfs-clkcfg", },
566 .name = "microchip-mpfs-clkcfg",
/linux/drivers/usb/musb/
H A Dmpfs.c3 * PolarFire SoC (MPFS) MUSB Glue Layer
342 dev_info(&pdev->dev, "Registered MPFS MUSB driver\n"); in mpfs_probe()
365 { .compatible = "microchip,mpfs-musb" },
375 .name = "mpfs-musb",
/linux/drivers/firmware/microchip/
H A DMakefile3 obj-$(CONFIG_POLARFIRE_SOC_AUTO_UPDATE) += mpfs-auto-update.o

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