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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dlontium,lt9211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
10 - Marek Vasut <marex@denx.de>
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
19 - lontium,lt9211
27 reset-gpios:
31 vccio-supply:
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H A Dtoshiba,tc358762.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge
10 - Marek Vasut <marex@denx.de>
13 The TC358762 is bridge device which converts MIPI DSI to MIPI DPI.
18 - toshiba,tc358762
24 reset-gpios:
27 vddc-supply:
37 Video port for MIPI DSI input
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H A Dnwl-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
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H A Dchipone,icn6211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Chipone ICN6211 MIPI-DSI to RGB Converter bridge
10 - Jagan Teki <jagan@amarulasolutions.com>
13 ICN6211 is MIPI-DSI to RGB Converter bridge from chipone.
15 It has a flexible configuration of MIPI DSI signal input and
21 - chipone,icn6211
27 clock-names:
36 enable-gpios:
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H A Dti,dlpc3433.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI DLPC3433 MIPI DSI to DMD bridge
10 - Jagan Teki <jagan@amarulasolutions.com>
11 - Christopher Vollo <chris@renewoutreach.org>
14 TI DLPC3433 is a MIPI DSI based display controller bridge
17 It has a flexible configuration of MIPI DSI and DPI signal
30 - 0x1b
31 - 0x1d
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H A Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
31 power-domains:
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/linux/drivers/gpu/drm/bridge/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
21 Simple transparent bridge that is used by several non-DRM drivers to
36 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
43 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
45 It has a flexible configuration of MIPI DSI signal input
67 ChromeOS EC ANX7688 is an ultra-low power
68 4K Ultra-HD (4096x2160p60) mobile HD transmitter
70 2.0 to DisplayPort 1.3 Ultra-HD. It is connected
77 Driver for display connectors with support for DDC and hot-plug
81 on ARM-based platforms. Saying Y here when this driver is not needed
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H A Dnwl-dsi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * NWL MIPI DSI host driver
26 /* DSI DPI registers */
102 * [15: 0] - word count
103 * [17:16] - virtual channel
104 * [23:18] - data type
105 * [24] - LP or HS select (0 - LP, 1 - HS)
106 * [25] - perform BTA after packet is sent
107 * [26] - perform BTA only, no packet tx
118 * [15: 0] - word count
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/linux/drivers/gpu/drm/panel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
46 as found in the YLM RS-97 handheld gaming console.
49 tristate "Boe BF060Y8M-AJ0 panel"
54 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
56 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
66 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
67 24 bit RGB per pixel. It provides a MIPI DSI interface to
68 the host and has a built-in LED backlight.
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/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A Dpanel-dpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic MIPI DPI Panel Driver
34 struct omap_dss_device *in = ddata->in; in panel_dpi_connect()
39 return in->ops.dpi->connect(in, dssdev); in panel_dpi_connect()
45 struct omap_dss_device *in = ddata->in; in panel_dpi_disconnect()
50 in->ops.dpi->disconnect(in, dssdev); in panel_dpi_disconnect()
56 struct omap_dss_device *in = ddata->in; in panel_dpi_enable()
60 return -ENODEV; in panel_dpi_enable()
65 if (ddata->data_lines) in panel_dpi_enable()
66 in->ops.dpi->set_data_lines(in, ddata->data_lines); in panel_dpi_enable()
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/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic MIPI DPI Panel
10 - Sam Ravnborg <sam@ravnborg.org>
13 - $ref: panel-common.yaml#
18 Shall contain a panel specific compatible and "panel-dpi"
21 - {}
22 - const: panel-dpi
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/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap-dss.txt5 -------------------
22 HDMI, MIPI DPI, etc.
25 -----------
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
49 compatible = "ti,omap4-dss";
54 clock-names = "fck";
55 #address-cells = <1>;
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 bool "DPI support"
40 DPI Interface. This is the Parallel Display Interface.
46 OMAP Video Encoder support for S-Video and composite TV-out.
71 SDI is a high speed one-way display serial bus between the host
77 MIPI DSI (Display Serial Interface) support.
79 DSI is a high speed half-duplex serial interface between the host
82 See https://www.mipi.org/ for DSI specifications.
/linux/drivers/gpu/drm/omapdrm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
48 bool "DPI support"
51 DPI Interface. This is the Parallel Display Interface.
57 OMAP Video Encoder support for S-Video and composite TV-out.
92 SDI is a high speed one-way display serial bus between the host
100 MIPI DSI (Display Serial Interface) support.
102 DSI is a high speed half-duplex serial interface between the host
105 See http://www.mipi.org/ for DSI specifications.
/linux/Documentation/devicetree/bindings/display/
H A Dst,stm32-ltdc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 lcd-tft display controller
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
15 const: st,stm32-ltdc
22 - description: events interrupt line.
23 - description: errors interrupt line.
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/linux/include/video/
H A Dmipi_display.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Defines for Mobile Industry Processor Interface (MIPI(R))
4 * Display Working Group standards: DSI, DCS, DBI, DPI
13 /* MIPI DSI Processor-to-Peripheral transaction types */
66 /* MIPI DSI Peripheral-to-Processor transaction types */
78 /* MIPI DCS commands */
111 MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */
128 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */
129 MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /* MIPI DCS 1.3 */
130 MIPI_DCS_WRITE_CONTROL_DISPLAY = 0x53, /* MIPI DCS 1.3 */
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/linux/drivers/gpu/drm/bridge/analogix/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 ANX6345 is an ultra-low power Full-HD DisplayPort/eDP
24 ANX78XX is an ultra-low power Full-HD SlimPort transmitter
34 tristate "Analogix Anx7625 MIPI to DP interface support"
43 ANX7625 is an ultra-low power 4K mobile HD transmitter
44 designed for portable devices. It converts MIPI/DPI to
H A Danx7625.c1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <media/v4l2-fwnode.h>
36 #include <sound/hdmi-codec.h>
50 struct device *dev = &client->dev; in i2c_access_workaround()
53 if (client == ctx->last_client) in i2c_access_workaround()
56 ctx->last_client = client; in i2c_access_workaround()
58 if (client == ctx->i2c.tcpc_client) in i2c_access_workaround()
60 else if (client == ctx->i2c.tx_p0_client) in i2c_access_workaround()
62 else if (client == ctx->i2c.tx_p1_client) in i2c_access_workaround()
64 else if (client == ctx->i2c.rx_p0_client) in i2c_access_workaround()
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/linux/drivers/gpu/drm/vc4/
H A Dvc4_dpi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * DOC: VC4 DPI module
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
24 #include <linux/media-bus-format.h>
43 /* The format field takes the ORDER-shuffled pixel valve data and
79 /* Power gate to the device, full reset at 0 -> 1 transition */
86 /* General DPI hardware state. */
106 readl(dpi->regs + (offset)); \
112 writel(val, dpi->regs + (offset)); \
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/linux/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c88 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty()
96 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
108 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
124 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
133 struct intel_dsi *intel_dsi = intel_dsi_host->intel_dsi; in intel_dsi_host_transfer()
134 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer()
135 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
148 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
164 drm_err(display->drm, in intel_dsi_host_transfer()
171 if (msg->rx_len) { in intel_dsi_host_transfer()
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/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
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/linux/Documentation/devicetree/bindings/media/
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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/linux/include/media/
H A Dv4l2-mediabus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
62 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
64 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
71 /* Clock non-continuous mode support. */
77 * struct v4l2_mbus_config_mipi_csi2 - MIPI CSI-2 data bus configuration
94 * struct v4l2_mbus_config_parallel - parallel data bus configuration
106 * struct v4l2_mbus_config_mipi_csi1 - CSI-1/CCP2 data bus configuration
108 * false - not inverted, true - inverted
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/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_mipi_dsi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 #define DRIVER_NAME "meson-dw-mipi-dsi"
34 #define DRIVER_DESC "Amlogic Meson MIPI-DSI DRM driver"
61 mipi_dsi->base + MIPI_DSI_TOP_SW_RESET); in meson_dw_mipi_dsi_hw_init()
64 0, mipi_dsi->base + MIPI_DSI_TOP_SW_RESET); in meson_dw_mipi_dsi_hw_init()
69 mipi_dsi->base + MIPI_DSI_TOP_CLK_CNTL); in meson_dw_mipi_dsi_hw_init()
72 writel_relaxed(0, mipi_dsi->base + MIPI_DSI_TOP_MEM_PD); in meson_dw_mipi_dsi_hw_init()
82 ret = clk_set_rate(mipi_dsi->bit_clk, in dw_mipi_dsi_phy_init()
83 mipi_dsi->phy_opts.mipi_dphy.hs_clk_rate); in dw_mipi_dsi_phy_init()
85 dev_err(mipi_dsi->dev, "Failed to set DSI Bit clock rate %lu (ret %d)\n", in dw_mipi_dsi_phy_init()
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/linux/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
11 #include <linux/media-bus-format.h>
12 #include <linux/mfd/atmel-hlcdc.h>
29 * struct atmel_hlcdc_crtc_state - Atmel HLCDC CRTC state structure
33 * @dpi: output DPI mode
38 u8 dpi; member
48 * struct atmel_hlcdc_crtc - Atmel HLCDC CRTC structure
71 struct regmap *regmap = crtc->dc->hlcdc->regmap; in atmel_hlcdc_crtc_mode_set_nofb()
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