1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 208302c35SEric Anholt /* 308302c35SEric Anholt * Copyright (C) 2016 Broadcom Limited 408302c35SEric Anholt */ 508302c35SEric Anholt 608302c35SEric Anholt /** 708302c35SEric Anholt * DOC: VC4 DPI module 808302c35SEric Anholt * 908302c35SEric Anholt * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI 10f6c01530SEric Anholt * signals. On BCM2835, these can be routed out to GPIO0-27 with the 11f6c01530SEric Anholt * ALT2 function. 1208302c35SEric Anholt */ 1308302c35SEric Anholt 14b7e8e25bSMasahiro Yamada #include <drm/drm_atomic_helper.h> 157b1298e0SEric Anholt #include <drm/drm_bridge.h> 1671b1bd4cSMaxime Ripard #include <drm/drm_drv.h> 17b7e8e25bSMasahiro Yamada #include <drm/drm_edid.h> 187b1298e0SEric Anholt #include <drm/drm_of.h> 19b7e8e25bSMasahiro Yamada #include <drm/drm_panel.h> 20fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 21f6ebc1b0SThomas Zimmermann #include <drm/drm_simple_kms_helper.h> 22b7e8e25bSMasahiro Yamada #include <linux/clk.h> 23b7e8e25bSMasahiro Yamada #include <linux/component.h> 2472bd9ea3SVille Syrjälä #include <linux/media-bus-format.h> 25722d4f06SRob Herring #include <linux/mod_devicetable.h> 26722d4f06SRob Herring #include <linux/platform_device.h> 2708302c35SEric Anholt #include "vc4_drv.h" 2808302c35SEric Anholt #include "vc4_regs.h" 2908302c35SEric Anholt 3008302c35SEric Anholt #define DPI_C 0x00 3108302c35SEric Anholt # define DPI_OUTPUT_ENABLE_MODE BIT(16) 3208302c35SEric Anholt 3308302c35SEric Anholt /* The order field takes the incoming 24 bit RGB from the pixel valve 3408302c35SEric Anholt * and shuffles the 3 channels. 3508302c35SEric Anholt */ 3608302c35SEric Anholt # define DPI_ORDER_MASK VC4_MASK(15, 14) 3708302c35SEric Anholt # define DPI_ORDER_SHIFT 14 3808302c35SEric Anholt # define DPI_ORDER_RGB 0 3908302c35SEric Anholt # define DPI_ORDER_BGR 1 4008302c35SEric Anholt # define DPI_ORDER_GRB 2 4108302c35SEric Anholt # define DPI_ORDER_BRG 3 4208302c35SEric Anholt 4308302c35SEric Anholt /* The format field takes the ORDER-shuffled pixel valve data and 4408302c35SEric Anholt * formats it onto the output lines. 4508302c35SEric Anholt */ 4608302c35SEric Anholt # define DPI_FORMAT_MASK VC4_MASK(13, 11) 4708302c35SEric Anholt # define DPI_FORMAT_SHIFT 11 4808302c35SEric Anholt /* This define is named in the hardware, but actually just outputs 0. */ 4908302c35SEric Anholt # define DPI_FORMAT_9BIT_666_RGB 0 5008302c35SEric Anholt /* Outputs 00000000rrrrrggggggbbbbb */ 5108302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_1 1 5208302c35SEric Anholt /* Outputs 000rrrrr00gggggg000bbbbb */ 5308302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_2 2 5408302c35SEric Anholt /* Outputs 00rrrrr000gggggg00bbbbb0 */ 5508302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_3 3 5608302c35SEric Anholt /* Outputs 000000rrrrrrggggggbbbbbb */ 5708302c35SEric Anholt # define DPI_FORMAT_18BIT_666_RGB_1 4 5808302c35SEric Anholt /* Outputs 00rrrrrr00gggggg00bbbbbb */ 5908302c35SEric Anholt # define DPI_FORMAT_18BIT_666_RGB_2 5 6008302c35SEric Anholt /* Outputs rrrrrrrrggggggggbbbbbbbb */ 6108302c35SEric Anholt # define DPI_FORMAT_24BIT_888_RGB 6 6208302c35SEric Anholt 6308302c35SEric Anholt /* Reverses the polarity of the corresponding signal */ 6408302c35SEric Anholt # define DPI_PIXEL_CLK_INVERT BIT(10) 6508302c35SEric Anholt # define DPI_HSYNC_INVERT BIT(9) 6608302c35SEric Anholt # define DPI_VSYNC_INVERT BIT(8) 6708302c35SEric Anholt # define DPI_OUTPUT_ENABLE_INVERT BIT(7) 6808302c35SEric Anholt 6908302c35SEric Anholt /* Outputs the signal the falling clock edge instead of rising. */ 7008302c35SEric Anholt # define DPI_HSYNC_NEGATE BIT(6) 7108302c35SEric Anholt # define DPI_VSYNC_NEGATE BIT(5) 7208302c35SEric Anholt # define DPI_OUTPUT_ENABLE_NEGATE BIT(4) 7308302c35SEric Anholt 7408302c35SEric Anholt /* Disables the signal */ 7508302c35SEric Anholt # define DPI_HSYNC_DISABLE BIT(3) 7608302c35SEric Anholt # define DPI_VSYNC_DISABLE BIT(2) 7708302c35SEric Anholt # define DPI_OUTPUT_ENABLE_DISABLE BIT(1) 7808302c35SEric Anholt 7908302c35SEric Anholt /* Power gate to the device, full reset at 0 -> 1 transition */ 8008302c35SEric Anholt # define DPI_ENABLE BIT(0) 8108302c35SEric Anholt 8208302c35SEric Anholt /* All other registers besides DPI_C return the ID */ 8308302c35SEric Anholt #define DPI_ID 0x04 8408302c35SEric Anholt # define DPI_ID_VALUE 0x00647069 8508302c35SEric Anholt 8608302c35SEric Anholt /* General DPI hardware state. */ 8708302c35SEric Anholt struct vc4_dpi { 887c9a4babSMaxime Ripard struct vc4_encoder encoder; 8908302c35SEric Anholt 907c9a4babSMaxime Ripard struct platform_device *pdev; 9108302c35SEric Anholt 9208302c35SEric Anholt void __iomem *regs; 9308302c35SEric Anholt 9408302c35SEric Anholt struct clk *pixel_clock; 9508302c35SEric Anholt struct clk *core_clock; 963051719aSEric Anholt 973051719aSEric Anholt struct debugfs_regset32 regset; 9808302c35SEric Anholt }; 9908302c35SEric Anholt 1005a46e490SMaxime Ripard #define to_vc4_dpi(_encoder) \ 1015a46e490SMaxime Ripard container_of_const(_encoder, struct vc4_dpi, encoder.base) 1027c9a4babSMaxime Ripard 103da43ff04SMaxime Ripard #define DPI_READ(offset) \ 104da43ff04SMaxime Ripard ({ \ 105da43ff04SMaxime Ripard kunit_fail_current_test("Accessing a register in a unit test!\n"); \ 106da43ff04SMaxime Ripard readl(dpi->regs + (offset)); \ 107da43ff04SMaxime Ripard }) 108da43ff04SMaxime Ripard 109da43ff04SMaxime Ripard #define DPI_WRITE(offset, val) \ 110da43ff04SMaxime Ripard do { \ 111da43ff04SMaxime Ripard kunit_fail_current_test("Accessing a register in a unit test!\n"); \ 112da43ff04SMaxime Ripard writel(val, dpi->regs + (offset)); \ 113da43ff04SMaxime Ripard } while (0) 11408302c35SEric Anholt 1153051719aSEric Anholt static const struct debugfs_reg32 dpi_regs[] = { 1163051719aSEric Anholt VC4_REG32(DPI_C), 1173051719aSEric Anholt VC4_REG32(DPI_ID), 11808302c35SEric Anholt }; 11908302c35SEric Anholt 12008302c35SEric Anholt static void vc4_dpi_encoder_disable(struct drm_encoder *encoder) 12108302c35SEric Anholt { 12271b1bd4cSMaxime Ripard struct drm_device *dev = encoder->dev; 1237c9a4babSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 12471b1bd4cSMaxime Ripard int idx; 12571b1bd4cSMaxime Ripard 12671b1bd4cSMaxime Ripard if (!drm_dev_enter(dev, &idx)) 12771b1bd4cSMaxime Ripard return; 12808302c35SEric Anholt 12908302c35SEric Anholt clk_disable_unprepare(dpi->pixel_clock); 13071b1bd4cSMaxime Ripard 13171b1bd4cSMaxime Ripard drm_dev_exit(idx); 13208302c35SEric Anholt } 13308302c35SEric Anholt 13408302c35SEric Anholt static void vc4_dpi_encoder_enable(struct drm_encoder *encoder) 13508302c35SEric Anholt { 136164c2416SEric Anholt struct drm_device *dev = encoder->dev; 13708302c35SEric Anholt struct drm_display_mode *mode = &encoder->crtc->mode; 1387c9a4babSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 139164c2416SEric Anholt struct drm_connector_list_iter conn_iter; 140164c2416SEric Anholt struct drm_connector *connector = NULL, *connector_scan; 1417fea3c23SDave Stevenson u32 dpi_c = DPI_ENABLE; 14271b1bd4cSMaxime Ripard int idx; 14308302c35SEric Anholt int ret; 14408302c35SEric Anholt 145164c2416SEric Anholt /* Look up the connector attached to DPI so we can get the 146164c2416SEric Anholt * bus_format. Ideally the bridge would tell us the 147164c2416SEric Anholt * bus_format we want, but it doesn't yet, so assume that it's 148164c2416SEric Anholt * uniform throughout the bridge chain. 149164c2416SEric Anholt */ 150164c2416SEric Anholt drm_connector_list_iter_begin(dev, &conn_iter); 151164c2416SEric Anholt drm_for_each_connector_iter(connector_scan, &conn_iter) { 152164c2416SEric Anholt if (connector_scan->encoder == encoder) { 153164c2416SEric Anholt connector = connector_scan; 154164c2416SEric Anholt break; 155164c2416SEric Anholt } 156164c2416SEric Anholt } 157164c2416SEric Anholt drm_connector_list_iter_end(&conn_iter); 158164c2416SEric Anholt 1590c9a31b8SDave Stevenson /* Default to 18bit if no connector or format found. */ 1600c9a31b8SDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT); 1617a70b0b9SDave Stevenson 1623c270763SDave Stevenson if (connector) { 1633c270763SDave Stevenson if (connector->display_info.num_bus_formats) { 164164c2416SEric Anholt u32 bus_format = connector->display_info.bus_formats[0]; 16508302c35SEric Anholt 1667a70b0b9SDave Stevenson dpi_c &= ~DPI_FORMAT_MASK; 1677a70b0b9SDave Stevenson 16808302c35SEric Anholt switch (bus_format) { 16908302c35SEric Anholt case MEDIA_BUS_FMT_RGB888_1X24: 17008302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 17108302c35SEric Anholt DPI_FORMAT); 17208302c35SEric Anholt break; 17308302c35SEric Anholt case MEDIA_BUS_FMT_BGR888_1X24: 17408302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 17508302c35SEric Anholt DPI_FORMAT); 1763c270763SDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, 1773c270763SDave Stevenson DPI_ORDER); 17808302c35SEric Anholt break; 179465bf9b7SJoerg Quinten case MEDIA_BUS_FMT_BGR666_1X24_CPADHI: 180465bf9b7SJoerg Quinten dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); 181465bf9b7SJoerg Quinten fallthrough; 18208302c35SEric Anholt case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 18308302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2, 18408302c35SEric Anholt DPI_FORMAT); 18508302c35SEric Anholt break; 186465bf9b7SJoerg Quinten case MEDIA_BUS_FMT_BGR666_1X18: 187465bf9b7SJoerg Quinten dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); 188465bf9b7SJoerg Quinten fallthrough; 18908302c35SEric Anholt case MEDIA_BUS_FMT_RGB666_1X18: 19008302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, 19108302c35SEric Anholt DPI_FORMAT); 19208302c35SEric Anholt break; 19308302c35SEric Anholt case MEDIA_BUS_FMT_RGB565_1X16: 1940870d86eSDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1, 19508302c35SEric Anholt DPI_FORMAT); 19608302c35SEric Anholt break; 19711fb69c7SChris Morgan case MEDIA_BUS_FMT_RGB565_1X24_CPADHI: 19811fb69c7SChris Morgan dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2, 19911fb69c7SChris Morgan DPI_FORMAT); 20011fb69c7SChris Morgan break; 20108302c35SEric Anholt default: 202*59ac702aSStefan Wahren drm_err(dev, "Unknown media bus format %d\n", 2033c270763SDave Stevenson bus_format); 20408302c35SEric Anholt break; 20508302c35SEric Anholt } 2063c270763SDave Stevenson } 2073c270763SDave Stevenson 2083c270763SDave Stevenson if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 2093c270763SDave Stevenson dpi_c |= DPI_PIXEL_CLK_INVERT; 2103c270763SDave Stevenson 2113c270763SDave Stevenson if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW) 2123c270763SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_INVERT; 21308302c35SEric Anholt } 21408302c35SEric Anholt 2157fea3c23SDave Stevenson if (mode->flags & DRM_MODE_FLAG_CSYNC) { 2167fea3c23SDave Stevenson if (mode->flags & DRM_MODE_FLAG_NCSYNC) 2177fea3c23SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_INVERT; 2187fea3c23SDave Stevenson } else { 2197fea3c23SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_MODE; 2207fea3c23SDave Stevenson 22108302c35SEric Anholt if (mode->flags & DRM_MODE_FLAG_NHSYNC) 22208302c35SEric Anholt dpi_c |= DPI_HSYNC_INVERT; 22308302c35SEric Anholt else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) 22408302c35SEric Anholt dpi_c |= DPI_HSYNC_DISABLE; 22508302c35SEric Anholt 22608302c35SEric Anholt if (mode->flags & DRM_MODE_FLAG_NVSYNC) 22708302c35SEric Anholt dpi_c |= DPI_VSYNC_INVERT; 22808302c35SEric Anholt else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) 22908302c35SEric Anholt dpi_c |= DPI_VSYNC_DISABLE; 2307fea3c23SDave Stevenson } 23108302c35SEric Anholt 23271b1bd4cSMaxime Ripard if (!drm_dev_enter(dev, &idx)) 23371b1bd4cSMaxime Ripard return; 23471b1bd4cSMaxime Ripard 23508302c35SEric Anholt DPI_WRITE(DPI_C, dpi_c); 23608302c35SEric Anholt 23708302c35SEric Anholt ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000); 23808302c35SEric Anholt if (ret) 239*59ac702aSStefan Wahren drm_err(dev, "Failed to set clock rate: %d\n", ret); 24008302c35SEric Anholt 24108302c35SEric Anholt ret = clk_prepare_enable(dpi->pixel_clock); 24208302c35SEric Anholt if (ret) 243*59ac702aSStefan Wahren drm_err(dev, "Failed to set clock rate: %d\n", ret); 24471b1bd4cSMaxime Ripard 24571b1bd4cSMaxime Ripard drm_dev_exit(idx); 24608302c35SEric Anholt } 24708302c35SEric Anholt 248c50a115bSJose Abreu static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder, 249c50a115bSJose Abreu const struct drm_display_mode *mode) 250e2298350SMario Kleiner { 251c50a115bSJose Abreu if (mode->flags & DRM_MODE_FLAG_INTERLACE) 252c50a115bSJose Abreu return MODE_NO_INTERLACE; 253e2298350SMario Kleiner 254c50a115bSJose Abreu return MODE_OK; 255e2298350SMario Kleiner } 256e2298350SMario Kleiner 25708302c35SEric Anholt static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = { 25808302c35SEric Anholt .disable = vc4_dpi_encoder_disable, 25908302c35SEric Anholt .enable = vc4_dpi_encoder_enable, 260c50a115bSJose Abreu .mode_valid = vc4_dpi_encoder_mode_valid, 26108302c35SEric Anholt }; 26208302c35SEric Anholt 263445b287eSMaxime Ripard static int vc4_dpi_late_register(struct drm_encoder *encoder) 264445b287eSMaxime Ripard { 265445b287eSMaxime Ripard struct drm_device *drm = encoder->dev; 266445b287eSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 267445b287eSMaxime Ripard 268f2ede40eSMaíra Canal vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset); 269445b287eSMaxime Ripard 270445b287eSMaxime Ripard return 0; 271445b287eSMaxime Ripard } 272445b287eSMaxime Ripard 273445b287eSMaxime Ripard static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = { 274445b287eSMaxime Ripard .late_register = vc4_dpi_late_register, 275445b287eSMaxime Ripard }; 276445b287eSMaxime Ripard 27708302c35SEric Anholt static const struct of_device_id vc4_dpi_dt_match[] = { 27808302c35SEric Anholt { .compatible = "brcm,bcm2835-dpi", .data = NULL }, 27908302c35SEric Anholt {} 28008302c35SEric Anholt }; 28108302c35SEric Anholt 2827b1298e0SEric Anholt /* Sets up the next link in the display chain, whether it's a panel or 2837b1298e0SEric Anholt * a bridge. 28408302c35SEric Anholt */ 2857b1298e0SEric Anholt static int vc4_dpi_init_bridge(struct vc4_dpi *dpi) 28608302c35SEric Anholt { 287055af023SMaxime Ripard struct drm_device *drm = dpi->encoder.base.dev; 2887b1298e0SEric Anholt struct device *dev = &dpi->pdev->dev; 2898f6b06c1Sbenjamin.gaignard@linaro.org struct drm_bridge *bridge; 29008302c35SEric Anholt 291055af023SMaxime Ripard bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0); 2920caddbbfSMaxime Ripard if (IS_ERR(bridge)) { 2937b1298e0SEric Anholt /* If nothing was connected in the DT, that's not an 2947b1298e0SEric Anholt * error. 2957b1298e0SEric Anholt */ 2960caddbbfSMaxime Ripard if (PTR_ERR(bridge) == -ENODEV) 2977b1298e0SEric Anholt return 0; 2987b1298e0SEric Anholt else 2990caddbbfSMaxime Ripard return PTR_ERR(bridge); 3007b1298e0SEric Anholt } 30108302c35SEric Anholt 3027c9a4babSMaxime Ripard return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0); 30308302c35SEric Anholt } 30408302c35SEric Anholt 30577932adfSMaxime Ripard static void vc4_dpi_disable_clock(void *ptr) 30677932adfSMaxime Ripard { 30777932adfSMaxime Ripard struct vc4_dpi *dpi = ptr; 30877932adfSMaxime Ripard 30977932adfSMaxime Ripard clk_disable_unprepare(dpi->core_clock); 31077932adfSMaxime Ripard } 31177932adfSMaxime Ripard 31208302c35SEric Anholt static int vc4_dpi_bind(struct device *dev, struct device *master, void *data) 31308302c35SEric Anholt { 31408302c35SEric Anholt struct platform_device *pdev = to_platform_device(dev); 31508302c35SEric Anholt struct drm_device *drm = dev_get_drvdata(master); 31608302c35SEric Anholt struct vc4_dpi *dpi; 31708302c35SEric Anholt int ret; 31808302c35SEric Anholt 3197f0ba8f9SMaxime Ripard dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL); 32008302c35SEric Anholt if (!dpi) 32108302c35SEric Anholt return -ENOMEM; 3227f0ba8f9SMaxime Ripard 3237c9a4babSMaxime Ripard dpi->encoder.type = VC4_ENCODER_TYPE_DPI; 32408302c35SEric Anholt dpi->pdev = pdev; 32508302c35SEric Anholt dpi->regs = vc4_ioremap_regs(pdev, 0); 32608302c35SEric Anholt if (IS_ERR(dpi->regs)) 32708302c35SEric Anholt return PTR_ERR(dpi->regs); 3283051719aSEric Anholt dpi->regset.base = dpi->regs; 3293051719aSEric Anholt dpi->regset.regs = dpi_regs; 3303051719aSEric Anholt dpi->regset.nregs = ARRAY_SIZE(dpi_regs); 33108302c35SEric Anholt 33208302c35SEric Anholt if (DPI_READ(DPI_ID) != DPI_ID_VALUE) { 33308302c35SEric Anholt dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", 33408302c35SEric Anholt DPI_READ(DPI_ID), DPI_ID_VALUE); 33508302c35SEric Anholt return -ENODEV; 33608302c35SEric Anholt } 33708302c35SEric Anholt 33808302c35SEric Anholt dpi->core_clock = devm_clk_get(dev, "core"); 33908302c35SEric Anholt if (IS_ERR(dpi->core_clock)) { 34008302c35SEric Anholt ret = PTR_ERR(dpi->core_clock); 34108302c35SEric Anholt if (ret != -EPROBE_DEFER) 342*59ac702aSStefan Wahren drm_err(drm, "Failed to get core clock: %d\n", ret); 34308302c35SEric Anholt return ret; 34408302c35SEric Anholt } 345ff5b18ceSMaxime Ripard 34608302c35SEric Anholt dpi->pixel_clock = devm_clk_get(dev, "pixel"); 34708302c35SEric Anholt if (IS_ERR(dpi->pixel_clock)) { 34808302c35SEric Anholt ret = PTR_ERR(dpi->pixel_clock); 34908302c35SEric Anholt if (ret != -EPROBE_DEFER) 350*59ac702aSStefan Wahren drm_err(drm, "Failed to get pixel clock: %d\n", ret); 35108302c35SEric Anholt return ret; 35208302c35SEric Anholt } 35308302c35SEric Anholt 35408302c35SEric Anholt ret = clk_prepare_enable(dpi->core_clock); 355ff5b18ceSMaxime Ripard if (ret) { 356*59ac702aSStefan Wahren drm_err(drm, "Failed to turn on core clock: %d\n", ret); 357ff5b18ceSMaxime Ripard return ret; 358ff5b18ceSMaxime Ripard } 35908302c35SEric Anholt 36077932adfSMaxime Ripard ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi); 36177932adfSMaxime Ripard if (ret) 36277932adfSMaxime Ripard return ret; 36377932adfSMaxime Ripard 364e126d318SMaxime Ripard ret = drmm_encoder_init(drm, &dpi->encoder.base, 365445b287eSMaxime Ripard &vc4_dpi_encoder_funcs, 366e126d318SMaxime Ripard DRM_MODE_ENCODER_DPI, 367e126d318SMaxime Ripard NULL); 368e126d318SMaxime Ripard if (ret) 369e126d318SMaxime Ripard return ret; 370e126d318SMaxime Ripard 3717c9a4babSMaxime Ripard drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs); 37208302c35SEric Anholt 3737b1298e0SEric Anholt ret = vc4_dpi_init_bridge(dpi); 3747b1298e0SEric Anholt if (ret) 375e126d318SMaxime Ripard return ret; 37608302c35SEric Anholt 37708302c35SEric Anholt dev_set_drvdata(dev, dpi); 37808302c35SEric Anholt 37908302c35SEric Anholt return 0; 38008302c35SEric Anholt } 38108302c35SEric Anholt 38208302c35SEric Anholt static const struct component_ops vc4_dpi_ops = { 38308302c35SEric Anholt .bind = vc4_dpi_bind, 38408302c35SEric Anholt }; 38508302c35SEric Anholt 38608302c35SEric Anholt static int vc4_dpi_dev_probe(struct platform_device *pdev) 38708302c35SEric Anholt { 38808302c35SEric Anholt return component_add(&pdev->dev, &vc4_dpi_ops); 38908302c35SEric Anholt } 39008302c35SEric Anholt 3911ed54a19SUwe Kleine-König static void vc4_dpi_dev_remove(struct platform_device *pdev) 39208302c35SEric Anholt { 39308302c35SEric Anholt component_del(&pdev->dev, &vc4_dpi_ops); 39408302c35SEric Anholt } 39508302c35SEric Anholt 39608302c35SEric Anholt struct platform_driver vc4_dpi_driver = { 39708302c35SEric Anholt .probe = vc4_dpi_dev_probe, 3981ed54a19SUwe Kleine-König .remove_new = vc4_dpi_dev_remove, 39908302c35SEric Anholt .driver = { 40008302c35SEric Anholt .name = "vc4_dpi", 40108302c35SEric Anholt .of_match_table = vc4_dpi_dt_match, 40208302c35SEric Anholt }, 40308302c35SEric Anholt }; 404