LTSSM (full) in projects: linux - OpenGrok search results

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Searched full:ltssm (Results 1 – 25 of 35) sorted by relevance

/freebsd/sys/riscv/sifive/
H A D	fu740_pci_dw.c	`233 /* Hold LTSSM in reset whilst initialising the PHYs / in fupci_phy_init() 257 / Disable the aux clock whilst taking the LTSSM out of reset / in fupci_phy_init() 264 / Take LTSSM out of reset / in fupci_phy_init() 308 / Enable LTSSM */ in fupci_init()`
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A D	mediatek-pcie-cfg.yaml	`15 LTSSM, ASPM and so on.`
H A D	baikal,bt1-pcie.yaml	`102 access some additional PM, Reset-related and LTSSM signals.`
H A D	mediatek-pcie.txt	`31 - pipe_ckN :LTSSM and PHY/MAC layer operating clock`
/freebsd/sys/powerpc/mpc85xx/
H A D	pci_mpc85xx.c	`316 uint8_t ltssm, capptr; in fsl_pcib_attach() local 393 ltssm = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_LTSSM, 1); in fsl_pcib_attach() 394 if (ltssm < LTSSM_STAT_L0) { in fsl_pcib_attach()`
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A D	dwc3.txt	`61 LTSSM during USB3 Compliance mode.`
H A D	snps,dwc3.yaml	`185 The value driven to the PHY is controlled by the LTSSM during USB3`
/freebsd/sys/dev/bhnd/cores/pci/
H A D	bhnd_pcireg.h	`235 #define BHND_PCIE_PLP_LTSSMCTRLREG 0x208 /* LTSSM control / 248 #define BHND_PCIE_PLP_LTSSMDIAGREG 0x23C / LTSSM State Machine Diag */`
/freebsd/sys/dev/mlx5/mlx5_en/
H A D	en.h	`470 "Time from start until first transition to LTSSM.Detect_Q in usec", \ 473 "Time from start until first transition to LTSSM.L0 in usec", \ 487 "Number of times LTSSM entered L1 flow.", pcie_timers_states) \ 489 "Number of times LTSSM entered L23 flow.", pcie_timers_states) \`
/freebsd/sys/arm64/qoriq/
H A D	qoriq_dw_pci.c	`62 uint32_t ltssm_bit; /* LSB bit of LTSSM state field */`
/freebsd/sys/contrib/alpine-hal/
H A D	al_hal_pcie_w_reg.h	`534 /* Enable port to start LTSSM Link Training / 756 / Current state of the LTSSM / 759 / Decode of the Recovery. Equalization LTSSM state / 1178 / The ltssm is in RCVRY_LOCK state. */`
H A D	al_hal_pcie_interrupts.h	`123 /** [RC/EP] The LTSSM is in RCVRY_LOCK state. */`
H A D	al_hal_pcie.h	`831 * this function waits for link up indication, it polls LTSSM state until link is ready 883 * this function initiates Link retraining by directing the Physical Layer LTSSM 884 * to the Recovery state. If the LTSSM is already in Recovery or Configuration,`
H A D	al_hal_pcie.c	`477 al_dbg("PCIe %d: Port Debug 0: 0x%08x. LTSSM state :0x%x\n", in al_pcie_check_link() 1948 /** return AL_TRUE is link started (LTSSM enabled) and AL_FALSE otherwise */`
/illumos-gate/usr/src/uts/sun4u/io/px/
H A D	px_lib4u.h	`277 /* LPU LTSSM states */`
H A D	px_err.c	`525 /* LPU LTSSM Interrupt Table */ 623 { CHP_F, MnT6(lpus), LR4(LTSSM), "LPU LTSSM"},`
H A D	px_hlib.c	`1353 * The new PRM has values for LTSSM 8 ns timeout value and in lpu_init() 1354 * LTSSM 20 ns timeout value. But what do these values mean? in lpu_init() 1409 * LTSSM Status registers are test only. in lpu_init() 1428 * CSR_V LPU LTSSM LAYER interrupt regs (mask, status) in lpu_init()`
/freebsd/sys/arm64/rockchip/
H A D	rk3568_pcie.c	`212 /* Start Link Training and Status State Machine (LTSSM) */ in rk3568_pcie_init_soc()`
/freebsd/sys/contrib/dev/athk/ath11k/
H A D	pci.c	`348 ath11k_dbg(ab, ATH11K_DBG_PCI, "ltssm 0x%x\n", val); in ath11k_pci_enable_ltssm()`
/freebsd/sys/contrib/dev/athk/ath12k/
H A D	pci.c	`289 ath12k_dbg(ab, ATH12K_DBG_PCI, "pci ltssm 0x%x\n", val); in ath12k_pci_enable_ltssm()`
/freebsd/sys/dev/qlnx/qlnxe/
H A D	reg_addr.h	816 …ing both [MLW] and [MLS] out of reset, using the EEPROM, will prevent the ltssm from advancing pas… 923 …G_PCIE_CAP_LINK_TRAINING_K2 (0x1<<27) // LTSSM is in Configuratio… 1060 …-swing. 0x4-0x7 = Reserved. This field is reset to 0x0 on entry to the LTSSM Polling.Compliance… 1062 … is set to one, the device transmits a modified compliance pattern if the LTSSM enters Polling.Com… 1064 … (0x1<<11) // Compliance SOS. When set to one, the LTSSM is required to sen… 3410 …the measurement of RX/TX data throughput and time spent in each low-power LTSSM state. For more de… 3417 …urement results of RX/TX data throughput and time spent in each low-power LTSSM state. This viewpo… 3433 …LTSSM transitions to the Recovery state because of the UpdateFC timeout (if the timeout is impleme… 3445 …etry will occur. - If "Update FC DLLP's transmission block" is selected, LTSSM will transition to… 3450 …ected, it affects whole of the ordered set. It might cause timeout of the LTSSM. - If END/EDB/STP… [all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A D	reg_addr_k2.h	637 …G_PCIE_CAP_LINK_TRAINING (0x1<<27) // LTSSM is in Configuratio… 2123 …the measurement of RX/TX data throughput and time spent in each low-power LTSSM state. For more de… 2130 …urement results of RX/TX data throughput and time spent in each low-power LTSSM state. This viewpo… 2146 …LTSSM transitions to the Recovery state because of the UpdateFC timeout (if the timeout is impleme… 2158 …etry will occur. - If "Update FC DLLP's transmission block" is selected, LTSSM will transition to… 2163 …ected, it affects whole of the ordered set. It might cause timeout of the LTSSM. - If END/EDB/STP… 2357 …LANE_EN field is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2359 …When this bit is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2366 … (0x1<<0) // Hold and Release LTSSM. For as long as this register is '1', the core stays in… 2368 …1<<1) // Recovery Request. When this bit is set to '1' in L0 or L0s, the LTSSM starts transitioni… [all …]
H A D	reg_addr_e5.h	637 …G_PCIE_CAP_LINK_TRAINING (0x1<<27) // LTSSM is in Configuratio… 2123 …the measurement of RX/TX data throughput and time spent in each low-power LTSSM state. For more de… 2130 …urement results of RX/TX data throughput and time spent in each low-power LTSSM state. This viewpo… 2146 …LTSSM transitions to the Recovery state because of the UpdateFC timeout (if the timeout is impleme… 2158 …etry will occur. - If "Update FC DLLP's transmission block" is selected, LTSSM will transition to… 2163 …ected, it affects whole of the ordered set. It might cause timeout of the LTSSM. - If END/EDB/STP… 2357 …LANE_EN field is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2359 …When this bit is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2366 … (0x1<<0) // Hold and Release LTSSM. For as long as this register is '1', the core stays in… 2368 …1<<1) // Recovery Request. When this bit is set to '1' in L0 or L0s, the LTSSM starts transitioni… [all …]
H A D	reg_addr_bb.h	637 …G_PCIE_CAP_LINK_TRAINING (0x1<<27) // LTSSM is in Configuratio… 2123 …the measurement of RX/TX data throughput and time spent in each low-power LTSSM state. For more de… 2130 …urement results of RX/TX data throughput and time spent in each low-power LTSSM state. This viewpo… 2146 …LTSSM transitions to the Recovery state because of the UpdateFC timeout (if the timeout is impleme… 2158 …etry will occur. - If "Update FC DLLP's transmission block" is selected, LTSSM will transition to… 2163 …ected, it affects whole of the ordered set. It might cause timeout of the LTSSM. - If END/EDB/STP… 2357 …LANE_EN field is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2359 …When this bit is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2366 … (0x1<<0) // Hold and Release LTSSM. For as long as this register is '1', the core stays in… 2368 …1<<1) // Recovery Request. When this bit is set to '1' in L0 or L0s, the LTSSM starts transitioni… [all …]
H A D	reg_addr_ah_compile15.h	696 …_STATUS_REG_PCIE_CAP_LINK_TRAINING (0x1<<27) // LTSSM is in Configuratio… 2277 …the measurement of RX/TX data throughput and time spent in each low-power LTSSM state. For more de… 2288 …urement results of RX/TX data throughput and time spent in each low-power LTSSM state. This viewpo… 2306 …LTSSM transitions to the Recovery state because of the UpdateFC timeout (if the timeout is impleme… 2324 …etry will occur. - If "Update FC DLLP's transmission block" is selected, LTSSM will transition to… 2331 …ected, it affects whole of the ordered set. It might cause timeout of the LTSSM. - If END/EDB/STP… 2401 …LANE_EN field is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2403 …When this bit is set, the core ignores receiver detection from PHY during LTSSM Detect state and u… 2432 … (0x1<<0) // Hold and Release LTSSM. For as long as this register is '1', the core stays in… 2434 …1<<1) // Recovery Request. When this bit is set to '1' in L0 or L0s, the LTSSM starts transitioni… [all …]