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/linux/drivers/nvmem/
H A Drockchip-efuse.c3 * Rockchip eFuse Driver
58 struct rockchip_efuse_chip *efuse = context; in rockchip_rk3288_efuse_read() local
62 ret = clk_prepare_enable(efuse->clk); in rockchip_rk3288_efuse_read()
64 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n"); in rockchip_rk3288_efuse_read()
68 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
71 writel(readl(efuse->base + REG_EFUSE_CTRL) & in rockchip_rk3288_efuse_read()
73 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
74 writel(readl(efuse->base + REG_EFUSE_CTRL) | in rockchip_rk3288_efuse_read()
76 efuse->base + REG_EFUSE_CTRL); in rockchip_rk3288_efuse_read()
78 writel(readl(efuse->base + REG_EFUSE_CTRL) | in rockchip_rk3288_efuse_read()
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H A Djz4780-efuse.c3 * JZ4780 EFUSE Memory Support driver
10 * Currently supports JZ4780 efuse which has 8K programmable bit.
11 * Efuse is separated into seven segments as below:
72 struct jz4780_efuse *efuse = context; in jz4780_efuse_read() local
87 regmap_update_bits(efuse->map, JZ_EFUCTRL, in jz4780_efuse_read()
94 ret = regmap_read_poll_timeout(efuse->map, JZ_EFUSTATE, in jz4780_efuse_read()
99 dev_err(efuse->dev, "Time out while reading efuse data"); in jz4780_efuse_read()
103 ret = regmap_bulk_read(efuse->map, JZ_EFUDATA(0), in jz4780_efuse_read()
119 .name = "jz4780-efuse",
142 struct jz4780_efuse *efuse; in jz4780_efuse_probe() local
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H A Dzynqmp_nvmem.c32 * efuse access type
44 * @flag: 0 - represents efuse read and 1- represents efuse write
49 * read/write efuse memory.
64 struct xilinx_efuse *efuse; in zynqmp_efuse_access() local
98 efuse = dma_alloc_coherent(dev, sizeof(struct xilinx_efuse), in zynqmp_efuse_access()
100 if (!efuse) in zynqmp_efuse_access()
112 efuse->flag = EFUSE_WRITE; in zynqmp_efuse_access()
114 efuse->flag = EFUSE_READ; in zynqmp_efuse_access()
117 efuse->src = dma_buf; in zynqmp_efuse_access()
118 efuse->size = words; in zynqmp_efuse_access()
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H A Dmtk-efuse.c113 { .compatible = "mediatek,mt8173-efuse", .data = &mtk_efuse_pdata },
114 { .compatible = "mediatek,mt8186-efuse", .data = &mtk_mt8186_efuse_pdata },
115 { .compatible = "mediatek,efuse", .data = &mtk_efuse_pdata },
132 .name = "mediatek,efuse",
143 pr_err("Failed to register efuse driver\n"); in mtk_efuse_init()
159 MODULE_DESCRIPTION("Mediatek EFUSE driver");
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts8 efuse##n { \
10 vout-supply = <&efuse##n>; \
15 #define EFUSE(hexaddr, num) \ macro
16 efuse@##hexaddr { \
21 efuse##num: vout { \
22 regulator-name = __stringify(efuse##num##-reg); \
166 EFUSE(10, 03);
167 EFUSE(11, 04);
168 EFUSE(12, 01);
169 EFUSE(13, 02);
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dmediatek,efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/mediatek,efuse.yaml#
7 title: MediaTek efuse
10 MediaTek's efuse is used for storing calibration data, it can be accessed
23 pattern: "^efuse@[0-9a-f]+$"
28 - const: mediatek,mt8188-efuse
29 - const: mediatek,mt8186-efuse
30 - const: mediatek,mt8186-efuse
34 - mediatek,mt8186-efuse
35 - mediatek,mt8188-efuse
36 - const: mediatek,efuse
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H A Drockchip-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#
7 title: Rockchip eFuse
19 - rockchip,rk3066a-efuse
20 - rockchip,rk3188-efuse
21 - rockchip,rk3228-efuse
22 - rockchip,rk3288-efuse
23 - rockchip,rk3328-efuse
24 - rockchip,rk3368-efuse
25 - rockchip,rk3399-efuse
28 - rockchip,rockchip-efuse
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H A Damlogic,meson6-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#
7 title: Amlogic Meson6 eFuse
20 - amlogic,meson6-efuse
21 - amlogic,meson8-efuse
22 - amlogic,meson8b-efuse
43 efuse: efuse@0 {
44 compatible = "amlogic,meson6-efuse";
H A Damlogic,meson-gxbb-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/amlogic,meson-gxbb-efuse.yaml#
7 title: Amlogic Meson GX eFuse
19 - const: amlogic,meson-gxbb-efuse
21 - const: amlogic,meson-gx-efuse
22 - const: amlogic,meson-gxbb-efuse
43 efuse: efuse {
44 compatible = "amlogic,meson-gxbb-efuse";
H A Dingenic,jz4780-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
7 title: Ingenic JZ EFUSE driver
18 - ingenic,jz4780-efuse
24 # Handle for the ahb for the efuse.
38 efuse@134100d0 {
39 compatible = "ingenic,jz4780-efuse";
H A Dsocionext,uniphier-efuse.yaml4 $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#
7 title: Socionext UniPhier eFuse
19 const: socionext,uniphier-efuse
32 efuse@100 {
33 compatible = "socionext,uniphier-efuse";
37 efuse@200 {
38 compatible = "socionext,uniphier-efuse";
/linux/Documentation/devicetree/bindings/regulator/
H A Dti-abb-regulator.txt35 efuse: (see Optional properties)
36 RBB enable efuse Mask: (See Optional properties)
37 FBB enable efuse Mask: (See Optional properties)
38 Vset value efuse Mask: (See Optional properties)
47 - "efuse-address" - Contains efuse base address used to pick up ABB info.
49 "efuse-address" is required for this.
55 efuse: Mandatory if 'efuse-address' register is defined. Provides offset
56 from efuse-address to pick up ABB characteristics. Set to 0 if
57 'efuse-address' is not defined.
58 RBB enable efuse Mask: Optional if 'efuse-address' register is defined.
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/linux/Documentation/devicetree/bindings/fuse/
H A Dnvidia,tegra20-fuse.yaml17 - nvidia,tegra20-efuse
18 - nvidia,tegra30-efuse
19 - nvidia,tegra114-efuse
20 - nvidia,tegra124-efuse
21 - nvidia,tegra210-efuse
22 - nvidia,tegra186-efuse
23 - nvidia,tegra194-efuse
24 - nvidia,tegra234-efuse
27 - const: nvidia,tegra132-efuse
28 - const: nvidia,tegra124-efuse
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/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw88xxa.c15 #include "efuse.h"
34 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8812a_read_amplifier_type() local
36 efuse->ext_pa_2g = (efuse->pa_type_2g & BIT(5)) && in rtw8812a_read_amplifier_type()
37 (efuse->pa_type_2g & BIT(4)); in rtw8812a_read_amplifier_type()
38 efuse->ext_lna_2g = (efuse->lna_type_2g & BIT(7)) && in rtw8812a_read_amplifier_type()
39 (efuse->lna_type_2g & BIT(3)); in rtw8812a_read_amplifier_type()
41 efuse->ext_pa_5g = (efuse->pa_type_5g & BIT(1)) && in rtw8812a_read_amplifier_type()
42 (efuse->pa_type_5g & BIT(0)); in rtw8812a_read_amplifier_type()
43 efuse->ext_lna_5g = (efuse->lna_type_5g & BIT(7)) && in rtw8812a_read_amplifier_type()
44 (efuse->lna_type_5g & BIT(3)); in rtw8812a_read_amplifier_type()
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H A Drtw8723x.c73 rtw_dbg(rtwdev, RTW_DBG_EFUSE, "Fixed invalid EFUSE value: " \
74 # name "=0x%x\n", rtwdev->efuse.name)
185 rtw_dbg(rtwdev, RTW_DBG_EFUSE, "EFUSE raw logical map:\n"); in efuse_debug_dump()
188 rtw_dbg(rtwdev, RTW_DBG_EFUSE, "Parsed rtw8723x EFUSE data:\n"); in efuse_debug_dump()
226 static void rtw8723xe_efuse_parsing(struct rtw_efuse *efuse, in rtw8723xe_efuse_parsing() argument
229 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8723xe_efuse_parsing()
232 static void rtw8723xu_efuse_parsing(struct rtw_efuse *efuse, in rtw8723xu_efuse_parsing() argument
235 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8723xu_efuse_parsing()
238 static void rtw8723xs_efuse_parsing(struct rtw_efuse *efuse, in rtw8723xs_efuse_parsing() argument
241 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8723xs_efuse_parsing()
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H A Defuse.c8 #include "efuse.h"
31 /* efuse header format
43 u32 physical_size = rtwdev->efuse.physical_size; in rtw_dump_logical_efuse_map()
44 u32 protect_size = rtwdev->efuse.protect_size; in rtw_dump_logical_efuse_map()
45 u32 logical_size = rtwdev->efuse.logical_size; in rtw_dump_logical_efuse_map()
90 u32 size = rtwdev->efuse.physical_size; in rtw_dump_physical_efuse_map()
149 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_parse_efuse_map() local
150 u32 phy_size = efuse->physical_size; in rtw_parse_efuse_map()
151 u32 log_size = efuse->logical_size; in rtw_parse_efuse_map()
165 rtw_err(rtwdev, "failed to dump efuse physical map\n"); in rtw_parse_efuse_map()
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H A Dmain.c16 #include "efuse.h"
1003 WARN(1, "invalid hw configuration from efuse\n"); in rtw_hw_config_rf_ant_num()
1217 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_update_sta_info() local
1248 if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) in rtw_update_sta_info()
1250 else if (efuse->hw_cap.nss == 2) in rtw_update_sta_info()
1313 tx_num = efuse->hw_cap.nss; in rtw_update_sta_info()
1431 wifi_only = !rtwdev->efuse.btcoex; in rtw_power_on()
1574 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_init_ht_cap() local
1588 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40)) in rtw_init_ht_cap()
1596 for (i = 0; i < efuse->hw_cap.nss; i++) in rtw_init_ht_cap()
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H A Drtw8814a.c15 #include "efuse.h"
34 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8814a_read_rfe_type() local
36 if (!(efuse->rfe_option & BIT(7))) in rtw8814a_read_rfe_type()
40 efuse->rfe_option = 0; in rtw8814a_read_rfe_type()
42 efuse->rfe_option = 1; in rtw8814a_read_rfe_type()
47 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8814a_read_amplifier_type() local
49 switch (efuse->rfe_option) { in rtw8814a_read_amplifier_type()
52 efuse->pa_type_2g = 0; in rtw8814a_read_amplifier_type()
53 efuse->lna_type_2g = 0; in rtw8814a_read_amplifier_type()
55 efuse->pa_type_5g = BIT(0); in rtw8814a_read_amplifier_type()
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H A Dcoex.c117 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_freerun_check() local
124 if (efuse->share_ant || ant_distance <= 5 || !coex_stat->wl_gl_busy) in rtw_coex_freerun_check()
827 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_update_wl_ch_info() local
841 (efuse->share_ant && center_chan <= 14 && in rtw_coex_update_wl_ch_info()
1008 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_btc_wltoggle_table_a() local
1016 if (efuse->share_ant) { in rtw_btc_wltoggle_table_a()
1094 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_table() local
1101 if (efuse->share_ant) { in rtw_coex_table()
1223 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw_coex_tdma() local
1259 if (efuse->share_ant) { in rtw_coex_tdma()
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H A Drtw8821c.c23 static void rtw8821ce_efuse_parsing(struct rtw_efuse *efuse, in rtw8821ce_efuse_parsing() argument
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8821ce_efuse_parsing()
29 static void rtw8821cu_efuse_parsing(struct rtw_efuse *efuse, in rtw8821cu_efuse_parsing() argument
32 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8821cu_efuse_parsing()
35 static void rtw8821cs_efuse_parsing(struct rtw_efuse *efuse, in rtw8821cs_efuse_parsing() argument
38 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8821cs_efuse_parsing()
51 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_read_efuse() local
57 efuse->rfe_option = map->rfe_option & 0x1f; in rtw8821c_read_efuse()
58 efuse->rf_board_option = map->rf_board_option; in rtw8821c_read_efuse()
59 efuse->crystal_cap = map->xtal_k; in rtw8821c_read_efuse()
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/linux/drivers/phy/mediatek/
H A Dphy-mtk-pcie.c36 * struct mtk_pcie_lane_efuse - eFuse data for each lane
40 * @lane_efuse_supported: software eFuse data is supported for this lane
52 * @sw_efuse_supported: support software to load eFuse data
65 * @sw_efuse_en: software eFuse enable status
67 * @efuse: pointer to eFuse data for each lane
77 struct mtk_pcie_lane_efuse *efuse; member
83 struct mtk_pcie_lane_efuse *data = &pcie_phy->efuse[lane]; in mtk_pcie_efuse_set_lane()
106 * Initialize the phy by setting the efuse data.
136 struct mtk_pcie_lane_efuse *efuse = &pcie_phy->efuse[lane]; in mtk_pcie_efuse_read_for_lane() local
142 ret = nvmem_cell_read_variable_le_u32(dev, efuse_id, &efuse->tx_pmos); in mtk_pcie_efuse_read_for_lane()
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/linux/Documentation/devicetree/bindings/opp/
H A Dti,omap-opp-supply.yaml10 OMAP5, DRA7, and AM57 families of SoCs have Class 0 AVS eFuse
37 - description: OMAP5+ optimized voltages in efuse(Class 0) VDD along with
40 - description: OMAP5+ optimized voltages in efuse(class0) VDD but no VBB
52 ti,efuse-settings:
54 optimized efuse configuration.
63 - description: efuse offset where the optimized voltage is located
81 - ti,efuse-settings
95 ti,efuse-settings =
/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A D8723a.c192 struct rtl8723au_efuse *efuse = &priv->efuse_wifi.efuse8723; in rtl8723au_parse_efuse() local
194 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8723au_parse_efuse()
197 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8723au_parse_efuse()
200 efuse->cck_tx_power_index_A, in rtl8723au_parse_efuse()
201 sizeof(efuse->cck_tx_power_index_A)); in rtl8723au_parse_efuse()
203 efuse->cck_tx_power_index_B, in rtl8723au_parse_efuse()
204 sizeof(efuse->cck_tx_power_index_B)); in rtl8723au_parse_efuse()
207 efuse->ht40_1s_tx_power_index_A, in rtl8723au_parse_efuse()
208 sizeof(efuse->ht40_1s_tx_power_index_A)); in rtl8723au_parse_efuse()
210 efuse->ht40_1s_tx_power_index_B, in rtl8723au_parse_efuse()
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H A D8192c.c416 struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192; in rtl8192cu_parse_efuse() local
418 if (efuse->rtl_id != cpu_to_le16(0x8129)) in rtl8192cu_parse_efuse()
421 ether_addr_copy(priv->mac_addr, efuse->mac_addr); in rtl8192cu_parse_efuse()
424 efuse->cck_tx_power_index_A, in rtl8192cu_parse_efuse()
425 sizeof(efuse->cck_tx_power_index_A)); in rtl8192cu_parse_efuse()
427 efuse->cck_tx_power_index_B, in rtl8192cu_parse_efuse()
428 sizeof(efuse->cck_tx_power_index_B)); in rtl8192cu_parse_efuse()
431 efuse->ht40_1s_tx_power_index_A, in rtl8192cu_parse_efuse()
432 sizeof(efuse->ht40_1s_tx_power_index_A)); in rtl8192cu_parse_efuse()
434 efuse->ht40_1s_tx_power_index_B, in rtl8192cu_parse_efuse()
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/linux/drivers/opp/
H A Dti-opp-supply.c28 * @optimized_uv: Optimized voltage from efuse
56 * @efuse_voltage_mask: mask required for efuse register representing voltage
57 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume
73 * Picks up efuse based optimized voltages for VDD unique per device and
90 /* pick up Efuse based voltages */ in _store_optimized_voltages()
100 dev_err(dev, "Unable to map Efuse registers\n"); in _store_optimized_voltages()
105 /* Fetch efuse-settings. */ in _store_optimized_voltages()
106 prop = of_find_property(dev->of_node, "ti,efuse-settings", NULL); in _store_optimized_voltages()
108 dev_err(dev, "No 'ti,efuse-settings' property found\n"); in _store_optimized_voltages()
117 dev_err(dev, "Invalid 'ti,efuse-settings'\n"); in _store_optimized_voltages()
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