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/linux/Documentation/devicetree/bindings/iio/adc/
H A Dti,ads1015.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
19 - ti,ads1015
20 - ti,ads1115
21 - ti,tla2021
22 - ti,tla2024
30 "#address-cells":
33 "#size-cells":
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H A Dti,ads1119.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
28 reset-gpios:
31 avdd-supply: true
32 dvdd-supply: true
34 vref-supply:
38 "#address-cells":
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H A Dti,am3359-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,am3359-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - enum:
16 - ti,am3359-adc
17 - ti,am4372-adc
18 - items:
19 - enum:
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/linux/Documentation/hwmon/
H A Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
37 Pins AIN0 to AIN2 are positive differential inputs for channels 0 to 2
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/linux/drivers/iio/adc/
H A Drn5t618-adc.c1 // SPDX-License-Identifier: GPL-2.0+
28 /* average 4-time conversion mode */
52 AIN1, enumerator
53 AIN0 enumerator
63 [AIN1] = {1, 1},
64 [AIN0] = {1, 1},
72 ret = regmap_bulk_read(rn5t618->regmap, reg, data, sizeof(data)); in rn5t618_read_adc_reg()
88 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0); in rn5t618_adc_irq()
89 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0); in rn5t618_adc_irq()
91 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r); in rn5t618_adc_irq()
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H A Dad7173.c1 // SPDX-License-Identifier: GPL-2.0+
7 * AD7172-2/AD7172-4/AD7173-8/AD7175-2
8 * AD7175-8/AD7176-2/AD7177-2
18 #include <linux/clk-provider.h>
146 (pin2) < st->info->num_voltage_in && \
147 (pin2) >= st->info->num_voltage_in_div)
219 24845000, 24845000, 20725000, 20725000, /* 0-3 */
220 15564000, 13841000, 10390000, 10390000, /* 4-7 */
221 4994000, 2499000, 1000000, 500000, /* 8-11 */
222 395500, 200000, 100000, 59890, /* 12-15 */
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H A Dti_am335x_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
26 #include <linux/dma-mapping.h>
56 return readl(adc->mfd_tscadc->tscadc_base + reg); in tiadc_readl()
62 writel(val, adc->mfd_tscadc->tscadc_base + reg); in tiadc_writel()
69 step_en = ((1 << adc_dev->channels) - 1); in get_adc_step_mask()
70 step_en <<= TOTAL_STEPS - adc_dev->channels + 1; in get_adc_step_mask()
79 for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) { in get_adc_chan_step_mask()
80 if (chan->channel == adc_dev->channel_line[i]) { in get_adc_chan_step_mask()
83 step = adc_dev->channel_step[i]; in get_adc_chan_step_mask()
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/linux/sound/soc/codecs/
H A Dmt6351.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6351.c -- mt6351 ALSA SoC audio codec driver
8 #include <linux/dma-mapping.h>
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3", in get_cap_reg_val()
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8", in get_play_reg_val()
266 struct snd_soc_component *cmpnt = dai->component; in mt6351_codec_dai_hw_params()
270 dev_dbg(priv->dev, "%s(), substream->stream %d, rate %d\n", in mt6351_codec_dai_hw_params()
271 __func__, substream->stream, rate); in mt6351_codec_dai_hw_params()
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H A Dmt6357.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL); in set_playback_gpio()
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET, in set_playback_gpio()
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_playback_gpio()
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL); in set_capture_gpio()
49 regmap_write(priv->regmap, MT6357_GPIO_MODE3_SET, in set_capture_gpio()
61 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0, in set_capture_gpio()
79 stage = up ? i : MT6357_HPLOUT_STG_CTRL_VAUDP15_MAX - i; in hp_main_output_ramp()
80 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1, in hp_main_output_ramp()
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H A Dmt6358.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6358.c -- mt6358 ALSA SoC audio codec driver
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
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H A Dmt6359.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6359.c -- mt6359 ALSA SoC audio codec driver
24 regmap_update_bits(priv->regmap, MT6359_SMT_CON1, 0x3ff0, 0x3ff0); in mt6359_set_gpio_smt()
30 regmap_update_bits(priv->regmap, MT6359_DRV_CON2, 0xffff, 0x8888); in mt6359_set_gpio_driving()
31 regmap_update_bits(priv->regmap, MT6359_DRV_CON3, 0xffff, 0x8888); in mt6359_set_gpio_driving()
32 regmap_update_bits(priv->regmap, MT6359_DRV_CON4, 0x00ff, 0x88); in mt6359_set_gpio_driving()
38 regmap_write(priv->regmap, MT6359_GPIO_MODE2_CLR, 0x0ffe); in mt6359_set_playback_gpio()
39 regmap_write(priv->regmap, MT6359_GPIO_MODE2_SET, 0x0249); in mt6359_set_playback_gpio()
42 regmap_write(priv->regmap, MT6359_GPIO_MODE3_CLR, 0x6); in mt6359_set_playback_gpio()
43 regmap_write(priv->regmap, MT6359_GPIO_MODE3_SET, 0x1); in mt6359_set_playback_gpio()
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H A Dadau1372.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
24 #include "adau-utils.h"
125 static const DECLARE_TLV_DB_MINMAX(adau1372_digital_tlv, -9563, 0);
126 static const DECLARE_TLV_DB_SCALE(adau1372_pga_tlv, -1200, 75, 0);
189 SOC_ENUM("ADC 0+1 High-Pass-Filter", adau1372_hpf0_1_enum),
190 SOC_ENUM("ADC 2+3 High-Pass-Filter", adau1372_hpf2_3_enum),
361 SND_SOC_DAPM_INPUT("AIN0"),
362 SND_SOC_DAPM_INPUT("AIN1"),
482 { "PGA0", NULL, "AIN0" },
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H A Dmt6359.h1 /* SPDX-License-Identifier: GPL-2.0 */
4062 MUX_MIC_TYPE_0, /* ain0, micbias 0 */
4063 MUX_MIC_TYPE_1, /* ain1, micbias 1 */
4277 #define CODEC_MT6359_NAME "mtk-codec-mt6359"
/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dti,am3359-tsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
14 const: ti,am3359-tsc
22 ti,x-plate-resistance:
26 ti,coordinate-readouts:
36 ti,wire-config:
38 wires on touchscreen. We need to provide an 8-bit number where the
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-soquartz-blade.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3566-soquartz.dtsi"
14 compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
21 vcc3v0_sd: vcc3v0-sd-regulator {
22 compatible = "regulator-fixed";
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H A Drk3566-soquartz-cm4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 SOQuartz on CM4-IO carrier board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: vcc12v-dcin-regulator {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc12v_dcin";
19 regulator-always-on;
20 regulator-boot-on;
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H A Drk3566-soquartz-model-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-soquartz.dtsi"
9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
16 vcc12v_dcin: vcc12v-dcin-regulator {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc12v_dcin";
19 regulator-always-on;
20 regulator-boot-on;
21 regulator-min-microvolt = <12000000>;
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
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