Lines Matching +full:ain0 +full:- +full:ain1
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <3300000>;
32 regulator-max-microvolt = <3300000>;
33 regulator-name = "eth_vio";
34 vin-supply = <&buck4>;
37 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
38 compatible = "regulator-fixed";
39 enable-active-high;
41 off-on-delay-us = <12000>;
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
44 regulator-max-microvolt = <3300000>;
45 regulator-min-microvolt = <3300000>;
46 regulator-name = "VDD_3V3_SD";
47 startup-delay-us = <100>;
48 vin-supply = <&buck4>;
51 reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */
52 compatible = "regulator-fixed";
53 regulator-always-on;
54 regulator-min-microvolt = <3300000>;
55 regulator-max-microvolt = <3300000>;
56 regulator-name = "VDD_3P3V_AWO";
59 wlan_pwrseq: wifi-pwrseq {
60 compatible = "mmc-pwrseq-simple";
61 reset-gpios = <&ioexp 1 GPIO_ACTIVE_LOW>;
66 cpu-supply = <&buck2>;
70 cpu-supply = <&buck2>;
74 cpu-supply = <&buck2>;
78 cpu-supply = <&buck2>;
82 assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>;
83 assigned-clock-rates = <393216000>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_ecspi1>;
89 cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_ecspi2>;
96 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_eqos_rgmii>;
103 phy-handle = <ðphy0g>;
104 phy-mode = "rgmii-id";
108 compatible = "snps,dwmac-mdio";
109 #address-cells = <1>;
110 #size-cells = <0>;
113 ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
114 compatible = "ethernet-phy-id0007.c110",
115 "ethernet-phy-ieee802.3-c22";
116 interrupt-parent = <&gpio3>;
118 pinctrl-0 = <&pinctrl_ethphy0>;
119 pinctrl-names = "default";
121 reset-assert-us = <1000>;
122 reset-deassert-us = <1000>;
123 reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
124 /* Non-default PHY population option. */
128 ethphy0g: ethernet-phy@5 { /* Micrel KSZ9131RNXI */
129 compatible = "ethernet-phy-id0022.1642",
130 "ethernet-phy-ieee802.3-c22";
131 interrupt-parent = <&gpio3>;
133 micrel,led-mode = <0>;
134 pinctrl-0 = <&pinctrl_ethphy0>;
135 pinctrl-names = "default";
137 reset-assert-us = <1000>;
138 reset-deassert-us = <1000>;
139 reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_fec_rmii>;
149 phy-handle = <ðphy1f>;
150 phy-mode = "rmii";
151 fsl,magic-packet;
155 #address-cells = <1>;
156 #size-cells = <0>;
159 ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */
160 compatible = "ethernet-phy-id0007.c110",
161 "ethernet-phy-ieee802.3-c22";
162 interrupt-parent = <&gpio4>;
164 pinctrl-0 = <&pinctrl_ethphy1>;
165 pinctrl-names = "default";
167 reset-assert-us = <1000>;
168 reset-deassert-us = <1000>;
169 reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
170 /* Non-default PHY population option. */
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_flexcan1>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_flexcan2>;
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_flexspi>;
194 compatible = "jedec,spi-nor";
196 spi-max-frequency = <80000000>;
197 spi-tx-bus-width = <4>;
198 spi-rx-bus-width = <4>;
203 gpio-line-names =
204 "DHCOM-G", "", "", "", "", "DHCOM-I", "DHCOM-J", "DHCOM-L",
205 "DHCOM-B", "DHCOM-A", "", "DHCOM-H", "", "", "", "",
211 gpio-line-names =
213 "", "", "", "DHCOM-K", "", "", "", "",
214 "", "", "", "", "DHCOM-INT", "", "", "",
219 gpio-line-names =
221 "", "", "", "", "", "", "SOM-HW0", "",
222 "", "", "", "", "", "", "SOM-MEM0", "SOM-MEM1",
223 "SOM-MEM2", "SOM-HW2", "", "", "", "", "", "";
227 gpio-line-names =
230 "", "", "", "SOM-HW1", "", "", "", "",
231 "", "", "", "DHCOM-D", "", "", "", "";
235 gpio-line-names =
236 "", "", "DHCOM-C", "", "", "", "", "",
238 "", "", "", "", "", "", "DHCOM-E", "DHCOM-F",
243 clock-frequency = <100000>;
244 pinctrl-names = "default", "gpio";
245 pinctrl-0 = <&pinctrl_i2c3>;
246 pinctrl-1 = <&pinctrl_i2c3_gpio>;
247 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
248 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_tc9595>;
256 clock-names = "ref";
258 assigned-clocks = <&clk IMX8MP_CLK_CLKOUT2_SEL>,
261 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
262 assigned-clock-rates = <13000000>, <13000000>, <208000000>;
263 reset-gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
267 #address-cells = <1>;
268 #size-cells = <0>;
274 data-lanes = <1 2 3 4>;
275 remote-endpoint = <&dsi_out>;
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_pmic>;
286 interrupt-parent = <&gpio1>;
295 buck1: BUCK1 { /* VDD_SOC (dual-phase with BUCK3) */
296 regulator-min-microvolt = <850000>;
297 regulator-max-microvolt = <1000000>;
298 regulator-ramp-delay = <3125>;
299 regulator-always-on;
300 regulator-boot-on;
304 nxp,dvs-run-voltage = <950000>;
305 nxp,dvs-standby-voltage = <850000>;
306 regulator-min-microvolt = <850000>;
307 regulator-max-microvolt = <1000000>;
308 regulator-ramp-delay = <3125>;
309 regulator-always-on;
310 regulator-boot-on;
314 regulator-min-microvolt = <3300000>;
315 regulator-max-microvolt = <3300000>;
316 regulator-always-on;
317 regulator-boot-on;
321 regulator-min-microvolt = <1800000>;
322 regulator-max-microvolt = <1800000>;
323 regulator-always-on;
324 regulator-boot-on;
328 regulator-min-microvolt = <1100000>;
329 regulator-max-microvolt = <1100000>;
330 regulator-always-on;
331 regulator-boot-on;
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-always-on;
338 regulator-boot-on;
342 regulator-min-microvolt = <1800000>;
343 regulator-max-microvolt = <1800000>;
344 regulator-always-on;
345 regulator-boot-on;
349 regulator-min-microvolt = <3300000>;
350 regulator-max-microvolt = <3300000>;
354 regulator-min-microvolt = <1800000>;
355 regulator-max-microvolt = <3300000>;
363 interrupts-extended = <&ioexp 7 IRQ_TYPE_EDGE_FALLING>;
364 #address-cells = <1>;
365 #size-cells = <0>;
367 channel@0 { /* Voltage over AIN0 and AIN1. */
371 channel@1 { /* Voltage over AIN0 and AIN3. */
375 channel@2 { /* Voltage over AIN1 and AIN3. */
383 channel@4 { /* Voltage over AIN0 and GND. */
387 channel@5 { /* Voltage over AIN1 and GND. */
403 interrupts-extended = <&gpio4 0 IRQ_TYPE_EDGE_FALLING>;
404 pinctrl-names = "default";
405 pinctrl-0 = <&pinctrl_touch>;
406 vio-supply = <&buck4>;
410 compatible = "atmel,24c32"; /* M24C32-D */
418 interrupts-extended = <&ioexp 3 IRQ_TYPE_EDGE_FALLING>;
419 wakeup-source;
423 compatible = "atmel,24c32"; /* M24C32-D */
429 compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
435 compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
443 gpio-controller;
444 #gpio-cells = <2>;
445 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
446 interrupt-controller;
447 #interrupt-cells = <2>;
448 pinctrl-names = "default";
449 pinctrl-0 = <&pinctrl_ioexp>;
450 wakeup-source;
452 gpio-line-names =
455 "DHCOM-W", "DHCOM-V", "DHCOM-U", "DHCOM-T",
461 clock-frequency = <100000>;
462 pinctrl-names = "default", "gpio";
463 pinctrl-0 = <&pinctrl_i2c4>;
464 pinctrl-1 = <&pinctrl_i2c4_gpio>;
465 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
466 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
471 clock-frequency = <100000>;
472 pinctrl-names = "default", "gpio";
473 pinctrl-0 = <&pinctrl_i2c5>;
474 pinctrl-1 = <&pinctrl_i2c5_gpio>;
475 scl-gpios = <&gpio3 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
476 sda-gpios = <&gpio3 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
481 samsung,burst-clock-frequency = <160000000>;
482 samsung,esc-clock-frequency = <10000000>;
489 data-lanes = <1 2 3 4>;
490 remote-endpoint = <&tc_bridge_in>;
497 pinctrl-0 = <&pinctrl_pwm1>;
498 pinctrl-names = "default";
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_uart1>;
507 wakeup-source;
512 pinctrl-names = "default";
513 pinctrl-0 = <&pinctrl_uart2>;
514 uart-has-rtscts;
524 assigned-clocks = <&clk IMX8MP_CLK_UART2>;
525 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
526 assigned-clock-rates = <80000000>;
529 compatible = "cypress,cyw4373a0-bt";
530 shutdown-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>;
531 max-speed = <4000000>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_uart3>;
538 uart-has-rtscts;
543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_uart4>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_usb1_vbus>;
578 pinctrl-names = "default", "state_100mhz", "state_200mhz";
579 pinctrl-0 = <&pinctrl_usdhc1>;
580 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
581 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
582 mmc-pwrseq = <&wlan_pwrseq>;
583 vmmc-supply = <&buck4>;
584 bus-width = <4>;
585 non-removable;
586 cap-power-off-card;
587 keep-power-in-suspend;
590 #address-cells = <1>;
591 #size-cells = <0>;
595 compatible = "cypress,cyw4373-fmac", "brcm,bcm4329-fmac";
597 * The "host-wake" interrupt output is by default not
606 pinctrl-names = "default", "state_100mhz", "state_200mhz";
607 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
608 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
609 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
610 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
611 vmmc-supply = <®_usdhc2_vmmc>;
612 bus-width = <4>;
618 pinctrl-names = "default", "state_100mhz", "state_200mhz";
619 pinctrl-0 = <&pinctrl_usdhc3>;
620 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
621 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
622 vmmc-supply = <&buck4>;
623 vqmmc-supply = <&buck5>;
624 bus-width = <8>;
625 non-removable;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_wdog>;
632 fsl,ext-reset-output;
637 pinctrl-0 = <&pinctrl_hog_base
645 pinctrl-names = "default";
647 pinctrl_dhcom_a: dhcom-a-grp {
649 /* ENET_QOS_EVENT0-OUT */
654 pinctrl_dhcom_b: dhcom-b-grp {
656 /* ENET_QOS_EVENT0-IN */
661 pinctrl_dhcom_c: dhcom-c-grp {
668 pinctrl_dhcom_d: dhcom-d-grp {
675 pinctrl_dhcom_e: dhcom-e-grp {
682 pinctrl_dhcom_f: dhcom-f-grp {
689 pinctrl_dhcom_g: dhcom-g-grp {
696 pinctrl_dhcom_h: dhcom-h-grp {
703 pinctrl_dhcom_i: dhcom-i-grp {
710 pinctrl_dhcom_j: dhcom-j-grp {
717 pinctrl_dhcom_k: dhcom-k-grp {
724 pinctrl_dhcom_l: dhcom-l-grp {
731 pinctrl_dhcom_m: dhcom-m-grp {
738 pinctrl_dhcom_n: dhcom-n-grp {
740 /* CSI2_D3- */
745 pinctrl_dhcom_o: dhcom-o-grp {
752 pinctrl_dhcom_p: dhcom-p-grp {
754 /* CSI2_D2- */
759 pinctrl_dhcom_q: dhcom-q-grp {
766 pinctrl_dhcom_r: dhcom-r-grp {
768 /* CSI2_D1- */
773 pinctrl_dhcom_s: dhcom-s-grp {
780 pinctrl_dhcom_int: dhcom-int-grp {
787 pinctrl_hog_base: dhcom-hog-base-grp {
800 pinctrl_ecspi1: dhcom-ecspi1-grp {
809 pinctrl_ecspi2: dhcom-ecspi2-grp {
818 pinctrl_eqos_rgmii: dhcom-eqos-rgmii-grp { /* RGMII */
837 pinctrl_eqos_rmii: dhcom-eqos-rmii-grp { /* RMII */
853 pinctrl_ethphy0: dhcom-ethphy0-grp {
860 pinctrl_ethphy1: dhcom-ethphy1-grp {
869 pinctrl_fec_rgmii: dhcom-fec-rgmii-grp { /* RGMII */
890 pinctrl_fec_rmii: dhcom-fec-rmii-grp { /* RMII */
906 pinctrl_flexcan1: dhcom-flexcan1-grp {
913 pinctrl_flexcan2: dhcom-flexcan2-grp {
920 pinctrl_flexspi: dhcom-flexspi-grp {
931 pinctrl_hdmi: dhcom-hdmi-grp {
938 pinctrl_i2c3: dhcom-i2c3-grp {
945 pinctrl_i2c3_gpio: dhcom-i2c3-gpio-grp {
952 pinctrl_i2c4: dhcom-i2c4-grp {
959 pinctrl_i2c4_gpio: dhcom-i2c4-gpio-grp {
966 pinctrl_i2c5: dhcom-i2c5-grp {
973 pinctrl_i2c5_gpio: dhcom-i2c5-gpio-grp {
980 pinctrl_ioexp: dhcom-ioexp-grp {
987 pinctrl_pmic: dhcom-pmic-grp {
994 pinctrl_pwm1: dhcom-pwm1-grp {
1000 pinctrl_tc9595: dhcom-tc9595-grp {
1004 /* DSI-CONV_INT Interrupt */
1009 pinctrl_sai3: dhcom-sai3-grp {
1018 pinctrl_touch: dhcom-touch-grp {
1025 pinctrl_uart1: dhcom-uart1-grp {
1035 pinctrl_uart2: dhcom-uart2-grp {
1045 pinctrl_uart3: dhcom-uart3-grp {
1054 pinctrl_uart4: dhcom-uart4-grp {
1061 pinctrl_usb1_vbus: dhcom-usb1-grp {
1068 pinctrl_usdhc1: dhcom-usdhc1-grp {
1079 pinctrl_usdhc1_100mhz: dhcom-usdhc1-100mhz-grp {
1090 pinctrl_usdhc1_200mhz: dhcom-usdhc1-200mhz-grp {
1101 pinctrl_usdhc2: dhcom-usdhc2-grp {
1113 pinctrl_usdhc2_100mhz: dhcom-usdhc2-100mhz-grp {
1125 pinctrl_usdhc2_200mhz: dhcom-usdhc2-200mhz-grp {
1137 pinctrl_usdhc2_vmmc: dhcom-usdhc2-vmmc-grp {
1143 pinctrl_usdhc2_gpio: dhcom-usdhc2-gpio-grp {
1149 pinctrl_usdhc3: dhcom-usdhc3-grp {
1166 pinctrl_usdhc3_100mhz: dhcom-usdhc3-100mhz-grp {
1183 pinctrl_usdhc3_200mhz: dhcom-usdhc3-200mhz-grp {
1200 pinctrl_wdog: dhcom-wdog-grp {