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/freebsd/contrib/tcpdump/
H A Dprint-802_11.c430 * 0 for 20 MHz, 1 for 40 MHz;
436 { /* 20 Mhz */ { 6.5f, /* SGI */ 7.2f, },
437 /* 40 Mhz */ { 13.5f, /* SGI */ 15.0f, },
441 { /* 20 Mhz */ { 13.0f, /* SGI */ 14.4f, },
442 /* 40 Mhz */ { 27.0f, /* SGI */ 30.0f, },
446 { /* 20 Mhz */ { 19.5f, /* SGI */ 21.7f, },
447 /* 40 Mhz */ { 40.5f, /* SGI */ 45.0f, },
451 { /* 20 Mhz */ { 26.0f, /* SGI */ 28.9f, },
452 /* 40 Mhz */ { 54.0f, /* SGI */ 60.0f, },
456 { /* 20 Mhz */ { 39.0f, /* SGI */ 43.3f, },
[all …]
/freebsd/contrib/wpa/src/common/
H A Dieee802_11_common.c1375 * @freq: Frequency (MHz) to convert
1701 case 32: /* channels 1..7; 40 MHz */ in ieee80211_chan_to_freq_us()
1702 case 33: /* channels 5..11; 40 MHz */ in ieee80211_chan_to_freq_us()
1706 case 1: /* channels 36,40,44,48 */ in ieee80211_chan_to_freq_us()
1708 case 22: /* channels 36,44; 40 MHz */ in ieee80211_chan_to_freq_us()
1709 case 23: /* channels 52,60; 40 MHz */ in ieee80211_chan_to_freq_us()
1710 case 27: /* channels 40,48; 40 MHz */ in ieee80211_chan_to_freq_us()
1711 case 28: /* channels 56,64; 40 MHz */ in ieee80211_chan_to_freq_us()
1716 case 24: /* channels 100-140; 40 MHz */ in ieee80211_chan_to_freq_us()
1721 case 25: /* channels 149,157; 40 MHz */ in ieee80211_chan_to_freq_us()
[all …]
H A Dhw_features_common.c138 "HT40: control channel: %d (%d MHz), secondary channel: %d (%d MHz)", in allowed_ht40_channel_pair()
141 /* Verify that HT40 secondary channel is an allowed 20 MHz in allowed_ht40_channel_pair()
291 wpa_printf(MSG_DEBUG, "Found overlapping 20 MHz HT BSS: " in check_20mhz_bss()
316 wpa_printf(MSG_DEBUG, "40 MHz affected channel range: [%d,%d] MHz", in check_40mhz_2g4()
324 /* Check for overlapping 20 MHz BSS */ in check_40mhz_2g4()
328 "Overlapping 20 MHz BSS is found"); in check_40mhz_2g4()
352 "40 MHz pri/sec mismatch with BSS " in check_40mhz_2g4()
373 "40 MHz Intolerant is set on channel %d in BSS " in check_40mhz_2g4()
449 /* TODO: 320 MHz */ in punct_update_legacy_bw()
492 data->bandwidth = 40; in hostapd_set_freq_params()
[all …]
H A Docv.c148 * Secondary channel only needs be checked for 40 MHz in the 2.4 GHz in ocv_verify_tx_params()
151 * 40 MHz. in ocv_verify_tx_params()
153 if (tx_chanwidth == 40 && ci->frequency < 2500 && in ocv_verify_tx_params()
162 * When using an 80+80 MHz channel to transmit, verify that we use in ocv_verify_tx_params()
/freebsd/contrib/wpa/src/ap/
H A Dieee802_11_ht.c115 - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
116 - all STAs in the BSS are 20 MHz HT in 20 MHz BSS
120 however and at least one 20 MHz HT STA is associated
200 wpa_printf(MSG_ERROR, "40 MHz affected channel range: [%d,%d] MHz", in is_40_allowed()
220 "HT: Received 20/40 BSS Coexistence Management frame from " in hostapd_2040_coex_action()
229 "Ignore 20/40 BSS Coexistence Management frame since 40 MHz capability is not enabled"); in hostapd_2040_coex_action()
235 "Ignore too short 20/40 BSS Coexistence Management frame"); in hostapd_2040_coex_action()
239 /* 20/40 BSS Coexistence element */ in hostapd_2040_coex_action()
249 "Truncated 20/40 BSS Coexistence element"); in hostapd_2040_coex_action()
255 "20/40 BSS Coexistence Information field: 0x%x (%s%s%s%s%s%s)", in hostapd_2040_coex_action()
[all …]
H A Dhw_features.c156 "chan=%d freq=%d MHz max_tx_power=%d dBm%s", in hostapd_get_hw_features()
345 /* Check list of neighboring BSSes (from scan) to see whether 40 MHz is in ieee80211n_check_scan()
364 wpa_printf(MSG_INFO, "20/40 MHz operation not permitted on " in ieee80211n_check_scan()
389 … "HE: 40 MHz channel width is not supported in 2.4 GHz; clear secondary channel configuration"); in ieee80211n_check_scan()
403 wpa_printf(MSG_INFO, "Fallback to 20 MHz"); in ieee80211n_check_scan()
429 * channel is the SEC channel of a 40 MHz BSS, so need to include the in ieee80211n_scan_channels_2g4()
430 * scanning coverage here to be 40 MHz from the center frequency. in ieee80211n_scan_channels_2g4()
432 affected_start = (pri_freq + sec_freq) / 2 - 40; in ieee80211n_scan_channels_2g4()
433 affected_end = (pri_freq + sec_freq) / 2 + 40; in ieee80211n_scan_channels_2g4()
434 wpa_printf(MSG_DEBUG, "40 MHz affected channel range: [%d,%d] MHz", in ieee80211n_scan_channels_2g4()
[all …]
/freebsd/share/man/man4/
H A Dsym.4204 .Bl -column sym53c1510d "80MHz" "Width" "SRAM" "PCI64"
206 .It "sym53c810 10MHz 8Bit N N Y"
207 .It "sym53c810a 10MHz 8Bit N N Y"
208 .It "sym53c815 10MHz 8Bit N N Y"
209 .It "sym53c825 10MHz 16Bit N N Y"
210 .It "sym53c825a 10MHz 16Bit 4KB N Y"
211 .It "sym53c860 20MHz 8Bit N N Y"
212 .It "sym53c875 20MHz 16Bit 4KB N Y"
213 .It "sym53c876 20MHz 16Bit 4KB N Y"
214 .It "sym53c885 20MHz 16Bit 4KB N Y"
[all …]
H A Dahc.493 .It "aic7770" Ta "10" Ta "VL" Ta "10MHz" Ta "16Bit" Ta "4" Ta "1"
94 .It "aic7850" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "8Bit" Ta "3" Ta ""
95 .It "aic7860" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "8Bit" Ta "3" Ta ""
96 .It "aic7870" Ta "10" Ta "PCI/32" Ta "10MHz" Ta "16Bit" Ta "16" Ta ""
97 .It "aic7880" Ta "10" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta ""
98 .It "aic7890" Ta "20" Ta "PCI/32" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
99 .It "aic7891" Ta "20" Ta "PCI/64" Ta "40MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
100 .It "aic7892" Ta "20" Ta "PCI/64" Ta "80MHz" Ta "16Bit" Ta "16" Ta "3 4 5 6 7 8"
101 .It "aic7895" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5"
102 .It "aic7895C" Ta "15" Ta "PCI/32" Ta "20MHz" Ta "16Bit" Ta "16" Ta "2 3 4 5 8"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Drk3399_dmc.txt64 - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz.
70 MHz (Mega Hz). When DDR frequency is less than
75 the ODT disable frequency in MHz (Mega Hz).
82 value is 40.
91 Default value is 40.
95 driver strength. Default value is 40.
101 then ODT disable frequency in MHz (Mega Hz).
117 Default value is 40.
121 driver strength. Default value is 40.
128 MHz (Mega Hz). When the DDR frequency is less then
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5312/
H A Dar5312phy.h26 #define AR_PHY_PLL_CTL_44_5312 0x14d6 /* 44 MHz for 11b, 11g */
27 #define AR_PHY_PLL_CTL_40_5312 0x14d4 /* 40 MHz for 11a, turbos */
28 #define AR_PHY_PLL_CTL_40_5312_HALF 0x15d4 /* 40 MHz for 11a, turbos (Half)*/
29 #define AR_PHY_PLL_CTL_40_5312_QUARTER 0x16d4 /* 40 MHz for 11a, turbos (Quarter)*/
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_dfs.c29 /* 20MHz */
32 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
38 /* 40MHz */
41 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
47 /* 80MHz */
50 RADAR_SPEC(0, 40, 4, 59, 96, 380, 150, 4900, 100096, 40, 0,
59 /* 20MHz */
64 RADAR_SPEC(0, 40, 4, 54, 96, 480, 150, 2900, 80100, 40, 0,
68 /* 40MHz */
73 RADAR_SPEC(0, 40, 4, 54, 96, 480, 150, 2900, 80100, 40, 0,
[all …]
/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dphy-ctxt.h20 /* and 320 MHz for EHT */
27 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
31 * 40Mhz |____|____|
32 * 80Mhz |____|____|____|____|
33 * 160Mhz |____|____|____|____|____|____|____|____|
34 * 320MHz |____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|____|
145 * @sbb_bandwidth: 0 disabled, 1 - 40Mhz ... 4 - 320MHz
H A Dmac.h36 * @MAC_PROT_FLG_FAT_PROT: protect 40 MHz transmissions
449 * (0=SISO, 1=MIMO2) x (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz)
461 * Nss (0-siso, 1-mimo2) x BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) x
473 * (0=SISO, 1=MIMO2) x (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz)
486 * BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz, 4-320MHz) x
522 * extended to 20us for BW > 160Mhz or for MCS w/ 4096-QAM.
H A Drs.h16 * bandwidths <= 80MHz
18 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz
39 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel
40 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel
41 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel
42 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel
43 * @IWL_TLC_MNG_CH_WIDTH_320MHZ: 320MHZ channel
123 * @IWL_TLC_MCS_PER_BW_80: mcs for bw - 20Hhz, 40Hhz, 80Hhz
124 * @IWL_TLC_MCS_PER_BW_160: mcs for bw - 160Mhz
125 * @IWL_TLC_MCS_PER_BW_320: mcs for bw - 320Mhz
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml108 Defines the DDR3 DLL bypass frequency in MHz. When DDR frequency is less
116 Defines the PHY dll bypass frequency in MHz (Mega Hz). When DDR frequency
124 Defines the auto PD disable frequency in MHz.
128 minimum: 1000000 # In case anyone thought this was MHz.
140 default: 40
156 default: 40
164 default: 40
176 minimum: 1000000 # In case anyone thought this was MHz.
204 default: 40
212 default: 40
[all...]
/freebsd/sys/dev/ath/ath_hal/ar5416/
H A Dar5416phy.h122 #define HT40_CHANNEL_CENTER_SHIFT 10 /* MHz */
131 #define AR_PHY_FC_DYN2040_EN 0x00000004 /* Enable dyn 20/40 mode */
132 #define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008 /* dyn 20/40 - primary only */
133 … AR_PHY_FC_DYN2040_PRI_CH 0x00000010 /* dyn 20/40 - primary ch offset (0=+10MHz, 1=-10MHz)…
134 #define AR_PHY_FC_DYN2040_EXT_CH 0x00000020 /* dyn 20/40 - ext ch spacing (0=20MHz/ 1=25MHz…
136 #define AR_PHY_FC_SHORT_GI_40 0x00000080 /* allow short GI for HT 40 */
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_radio.c63 * Take the MHz channel value and set the Channel value
71 * (freq_ref = 40MHz)
75 * (freq_ref = 40MHz/(24>>amode_ref_sel))
77 * For 5GHz channels which are 5MHz spaced,
79 * (freq_ref = 40MHz)
142 * freq_ref = (40 / (refdiva >> a_mode_ref_sel)); in ar9300_set_channel()
/freebsd/contrib/wpa/src/drivers/
H A Ddriver_common.c114 return "20 MHz (no HT)"; in channel_width_to_string()
116 return "20 MHz"; in channel_width_to_string()
118 return "40 MHz"; in channel_width_to_string()
120 return "80 MHz"; in channel_width_to_string()
122 return "80+80 MHz"; in channel_width_to_string()
124 return "160 MHz"; in channel_width_to_string()
126 return "320 MHz"; in channel_width_to_string()
140 return 40; in channel_width_to_int()
/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Drfi.c11 * DDR needs frequency in units of 16.666MHz, so provide FW with the
15 /* frequency 2667MHz */
20 /* frequency 2933MHz */
27 /* frequency 3200MHz */
32 /* frequency 3733MHz */
37 /* frequency 4000MHz */
42 /* frequency 4267MHz */
47 /* frequency 4400MHz */
52 /* frequency 5200MHz */
53 {cpu_to_le16(312), {36, 38, 40, 4
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc5121.dtsi35 timebase-frequency = <49500000>;/* 49.5 MHz (csb/4) */
36 bus-frequency = <198000000>; /* 198 MHz csb bus */
37 clock-frequency = <396000000>; /* 396 MHz ppc core */
96 bus-frequency = <66000000>; /* 66 MHz ips bus */
352 interrupts = <40 0x8>;
364 interrupts = <40 0x8>;
376 interrupts = <40 0x8>;
388 interrupts = <40 0x8>;
400 interrupts = <40 0x8>;
412 interrupts = <40
[all...]
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9280.c54 * Take the MHz channel value and set the Channel value
62 * (freq_ref = 40MHz)
66 * (freq_ref = 40MHz/(24>>amodeRefSel))
68 * For 5GHz channels which are 5MHz spaced,
70 * (freq_ref = 40MHz)
134 /* Enable 2G (fractional) mode for channels which are 5MHz spaced */ in ar9280SetChannel()
137 * Workaround for talking on PSB non-5MHz channels; in ar9280SetChannel()
138 * the pre-Merlin chips only had a 2.5MHz channel in ar9280SetChannel()
146 * resolution in this reference is 2.5MHz) and thus in ar9280SetChannel()
/freebsd/sys/dev/ath/ath_hal/ar5212/
H A Dar5212phy.h140 #define AR_PHY_PLL_CTL_40 0xaa /* 40 MHz */
141 #define AR_PHY_PLL_CTL_44 0xab /* 44 MHz for 11b, 11g */
142 #define AR_PHY_PLL_CTL_44_5112 0xeb /* 44 MHz for 11b, 11g */
143 #define AR_PHY_PLL_CTL_40_5112 0xea /* 40 MHz for 11a, turbos */
144 #define AR_PHY_PLL_CTL_40_5413 0x04 /* 40 MHz for 11a, turbos with 5413 */
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dstmpe.txt28 0 -> 1.625 MHz 2 || 3 -> 6.5 MHz
29 1 -> 3.25 MHz
33 stmpe1601: stmpe1601@40 {
/freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/
H A Duncore-power.json10 …uency that is configured in the filter. (filter_band0=XXX, with XXX in 100Mhz units). One can als…
20 …uency that is configured in the filter. (filter_band1=XXX, with XXX in 100Mhz units). One can als…
30 …uency that is configured in the filter. (filter_band2=XXX, with XXX in 100Mhz units). One can als…
40 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
50 …uency that is configured in the filter. (filter_band0=XXX, with XXX in 100Mhz units). One can als…
61 …uency that is configured in the filter. (filter_band1=XXX, with XXX in 100Mhz units). One can als…
72 …uency that is configured in the filter. (filter_band2=XXX, with XXX in 100Mhz units). One can als…
83 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
224 "Filter": "filter_band3=40",
268 "Filter": "edge=1,filter_band3=40",
/freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/
H A Duncore-power.json10 …quency that is configured in the filter. (filter_band0=XXX with XXX in 100Mhz units). One can als…
20 …quency that is configured in the filter. (filter_band1=XXX with XXX in 100Mhz units). One can als…
30 …quency that is configured in the filter. (filter_band2=XXX with XXX in 100Mhz units). One can als…
40 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
50 …quency that is configured in the filter. (filter_band0=XXX with XXX in 100Mhz units). One can als…
61 …quency that is configured in the filter. (filter_band1=XXX with XXX in 100Mhz units). One can als…
72 …quency that is configured in the filter. (filter_band2=XXX with XXX in 100Mhz units). One can als…
83 …uency that is configured in the filter. (filter_band3=XXX, with XXX in 100Mhz units). One can als…
223 "Filter": "filter_band3=40",
267 "Filter": "edge=1,filter_band3=40",

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