sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

SPDX: license IDs for some ISC-related files.

Merge fresh head.

IFC @247348.

Sync with HEAD.

IFC @ r244983.

Bring over the basic spectral scan framework code from Qualcomm Atheros.

This includes the HAL routines to setup, enable/activate/disable spectral
scan and configure the relevant registers.

This st

Bring over the basic spectral scan framework code from Qualcomm Atheros.

This includes the HAL routines to setup, enable/activate/disable spectral
scan and configure the relevant registers.

This still requires driver interaction to enable spectral scan reporting.
Specifically:

* call ah_spectralConfigure() to configure and enable spectral scan;
* .. there's currently no way to disable spectral scan... that will have
to follow.
* call ah_spectralStart() to force start a spectral report;
* call ah_spectralStop() to force stop an active spectral report.

The spectral scan results appear as PHY errors (type 0x5 on the AR9280,
same as radar) but with the spectral scan bit set (0x10 in the last byte
of the frame) identifying it as a spectral report rather than a radar
FFT report.

Caveats:

* It's likely quite difficult to run spectral _and_ radar at the same
time. Enabling spectral scan disables the radar thresholds but
leaves radar enabled. Thus, the driver (for now) needs to ensure
that only one or the other is enabled.

* .. it needs testing on HT40 mode.

Tested:

* AR9280 in STA mode, HT/20 only

TODO:

* Test on AR9285, AR9287;
* Test in both HT20 and HT40 modes;
* .. all the driver glue.

Obtained from: Qualcomm Atheros

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Add the AR9280 and later spectral scan register definitions.

Obtained from: Linux ath9k, Qualcomm Atheros (datasheet)

Add radar_bin_thresh_sel (bit 24:26), which defines when
to consider the radar FFT report bins as "strong".

MFC

Merge head r233826 through r234834.

IFC @ r234692

sys/amd64/include/cpufunc.h
sys/amd64/include/fpu.h
sys/amd64/amd64/fpu.c
sys/amd64/vmm/vmm.c

- Add API to allow vmm FPU state init/save/restore.

FP stuff discussed with: kib

Add the BT register definitions for AR9285/AR9287 BT coexistence.

Obtained from: Linux ath9k

IFC @230489 (pending review).

IFC @ r227804

Pull in the virtio drivers from head.

Disable writing to the extension CYCPWR1 register.
This seems to make ANI behave better on the AR5416/AR5418.

Sponsored by: Hobnob, Inc.

IFC @ r226824

Add an AR5416 aware version of the "current RSSI" function.

Pre-11n devices and AR5416 use AR_PHY(263) for current RX RSSI.
AR9130 and later have a fourth calibration register (for doing
ADC calibra

Add an AR5416 aware version of the "current RSSI" function.

Pre-11n devices and AR5416 use AR_PHY(263) for current RX RSSI.
AR9130 and later have a fourth calibration register (for doing
ADC calibration) and thus the register has moved to AR_PHY(271).

This isn't currently used by any of the active code; I'm committing
this for completeness and in case any third party code attempts to
use it for legacy reasons.

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IFC @ r222830

MFC

Add some missing DFS chipset functionality to the FreeBSD HAL.

Please note - this doesn't in any way constitute a full DFS
implementation, it merely adds the relevant capability bits and
radar detec

Add some missing DFS chipset functionality to the FreeBSD HAL.

Please note - this doesn't in any way constitute a full DFS
implementation, it merely adds the relevant capability bits and
radar detection threshold register access.

The particulars:

* Add new capability bits outlining what the DFS capabilities
are of the various chipsets.
* Add HAL methods to set and get the radar related register values.
* Add AR5212 and AR5416+ DFS radar related register value
routines.
* Add a missing HAL phy error code that's related to radar event
processing.
* Add HAL_PHYERR_PARAM, a data type that encapsulates the radar
register values.

The AR5212 routines are just for completeness. The AR5416 routines
are a super-set of those; I may later on do a drive-by pass to
tidy up duplicate code.

Obtained from: Linux, Atheros

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MFC

Bring over my AR9287 work in progress.

It isn't linked into the build because it's missing the TX power
and PDADC programming code.

This code is mostly based on the ath9k codebase, compared against

Bring over my AR9287 work in progress.

It isn't linked into the build because it's missing the TX power
and PDADC programming code.

This code is mostly based on the ath9k codebase, compared against
the Atheros codebase as appropriate.

What's implemented:

* probe/attach
* EEPROM board value programming
* RX initial calibration
* radio channel programming
* general MAC / baseband setup
* async fifo setup
* open-loop tx power calibration

What's missing before it can be enabled by default:

* TX power / calibration setting code
* closed-loop tx power calibration routines
* TSF2 handling
* generic timer support from ath9k

Obtained from: Atheros, ath9k

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MFC

When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled.

The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where
RIFS is disabled by default.

When disabling RIFS for Sowl (AR9160) and Howl (AR9130), make sure RIFS
is totally disabled.

The Atheros HAL code does this for Sowl/Howl but not for Owl (AR5416) where
RIFS is disabled by default.

This seems to quieten the occasional baseband hang I've been seeing with
the AR9160 in STA mode under constant heavy traffic load.

Obtained from: Atheros

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