| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra124-dfll-fcpu.c | 141 { 204000000UL, { 1112619, -29295, 402 } },
142 { 306000000UL, { 1150460, -30585, 402 } },
143 { 408000000UL, { 1190122, -31865, 402 } },
144 { 510000000UL, { 1231606, -33155, 402 } },
145 { 612000000UL, { 1274912, -34435, 402 } },
146 { 714000000UL, { 1320040, -35725, 402 } },
147 { 816000000UL, { 1366990, -37005, 402 } },
148 { 918000000UL, { 1415762, -38295, 402 } },
149 { 1020000000UL, { 1466355, -39575, 402 } },
150 { 1122000000UL, { 1518771, -40865, 402 } },
[all …]
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | s32g2.dtsi | 625 can2: can@402a8000 {
638 can3: can@402b2000 {
651 uart2: serial@402bc000 {
659 spi3: spi@402c8000 {
672 spi4: spi@402cc000 {
685 spi5: spi@402d0000 {
698 i2c3: i2c@402d8000 {
709 i2c4: i2c@402dc000 {
720 usdhc0: mmc@402f0000 {
|
| H A D | s32g3.dtsi | 696 can2: can@402a8000 {
710 can3: can@402b2000 {
724 uart2: serial@402bc000 {
732 spi3: spi@402c8000 {
745 spi4: spi@402cc000 {
758 spi5: spi@402d0000 {
771 i2c3: i2c@402d8000 {
783 i2c4: i2c@402dc000 {
795 usdhc0: mmc@402f0000 {
|
| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | renesas,wdt.yaml | 102 clocks = <&cpg CPG_MOD 402>;
104 resets = <&cpg 402>;
|
| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | whale2.dtsi | 28 pmu_gate: clock-controller@402b0000 {
35 aon_gate: clock-controller@402e0000 {
272 pin_controller: pinctrl@402a0000 {
|
| H A D | sharkl3.dtsi | 34 pmu_regs: syscon@402b0000 {
51 aon_apb_regs: syscon@402e0000 {
|
| /linux/drivers/net/can/esd/ |
| H A D | Kconfig | 3 tristate "esd electronics gmbh CAN-PCI(e)/402 family"
|
| /linux/drivers/crypto/intel/qat/qat_4xxx/ |
| H A D | adf_4xxx_hw_data.h | 38 /* Firmware for 402XXX */
|
| /linux/drivers/clk/renesas/ |
| H A D | r8a7792-cpg-mssr.c | 98 DEF_MOD("rwdt", 402, R8A7792_CLK_R),
155 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a77470-cpg-mssr.c | 101 DEF_MOD("rwdt", 402, R8A77470_CLK_R),
164 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a77995-cpg-mssr.c | 148 DEF_MOD("rwdt", 402, R8A77995_CLK_R),
202 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7745-cpg-mssr.c | 114 DEF_MOD("rwdt", 402, R8A7745_CLK_R),
181 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a77980-cpg-mssr.c | 138 DEF_MOD("rwdt", 402, R8A77980_CLK_R),
202 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7794-cpg-mssr.c | 121 DEF_MOD("rwdt", 402, R8A7794_CLK_R),
191 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7791-cpg-mssr.c | 128 DEF_MOD("rwdt", 402, R8A7791_CLK_R),
210 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7790-cpg-mssr.c | 140 DEF_MOD("rwdt", 402, R8A7790_CLK_R),
212 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7742-cpg-mssr.c | 129 DEF_MOD("rwdt", 402, R8A7742_CLK_R),
203 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a774c0-cpg-mssr.c | 166 DEF_MOD("rwdt", 402, R8A774C0_CLK_R),
252 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a7743-cpg-mssr.c | 118 DEF_MOD("rwdt", 402, R8A7743_CLK_R),
197 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a77990-cpg-mssr.c | 168 DEF_MOD("rwdt", 402, R8A77990_CLK_R),
266 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a774b1-cpg-mssr.c | 158 DEF_MOD("rwdt", 402, R8A774B1_CLK_R),
250 MOD_CLK_ID(402), /* RWDT */
|
| H A D | r8a774e1-cpg-mssr.c | 165 DEF_MOD("rwdt", 402, R8A774E1_CLK_R),
262 MOD_CLK_ID(402), /* RWDT */
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | hisilicon-hip04-net.txt | 66 interrupts = <0 402 4>;
|
| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7ulp.dtsi | 148 lpuart4: serial@402d0000 {
160 lpuart5: serial@402e0000 {
|
| /linux/include/uapi/linux/ |
| H A D | vbox_err.h | 96 #define VERR_NET_HOST_NOT_FOUND (-402)
|