1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2 /* Copyright(c) 2014 - 2020 Intel Corporation */ 3 #ifndef ADF_4XXX_HW_DATA_H_ 4 #define ADF_4XXX_HW_DATA_H_ 5 6 #include <linux/units.h> 7 #include <adf_accel_devices.h> 8 9 #define ADF_4XXX_MAX_ACCELENGINES 9 10 11 #define ADF_4XXX_ACCELENGINES_MASK (0x1FF) 12 #define ADF_4XXX_ADMIN_AE_MASK (0x100) 13 14 #define ADF_4XXX_HICPPAGENTCMDPARERRLOG_MASK 0x1F 15 #define ADF_4XXX_PARITYERRORMASK_ATH_CPH_MASK 0xF000F 16 #define ADF_4XXX_PARITYERRORMASK_CPR_XLT_MASK 0x10001 17 #define ADF_4XXX_PARITYERRORMASK_DCPR_UCS_MASK 0x30007 18 #define ADF_4XXX_PARITYERRORMASK_PKE_MASK 0x3F 19 20 /* 21 * SSMFEATREN bit mask 22 * BIT(4) - enables parity detection on CPP 23 * BIT(12) - enables the logging of push/pull data errors 24 * in pperr register 25 * BIT(16) - BIT(23) - enable parity detection on SPPs 26 */ 27 #define ADF_4XXX_SSMFEATREN_MASK \ 28 (BIT(4) | BIT(12) | BIT(16) | BIT(17) | BIT(18) | \ 29 BIT(19) | BIT(20) | BIT(21) | BIT(22) | BIT(23)) 30 31 /* Firmware Binaries */ 32 #define ADF_4XXX_FW "qat_4xxx.bin" 33 #define ADF_4XXX_MMP "qat_4xxx_mmp.bin" 34 #define ADF_4XXX_SYM_OBJ "qat_4xxx_sym.bin" 35 #define ADF_4XXX_DC_OBJ "qat_4xxx_dc.bin" 36 #define ADF_4XXX_ASYM_OBJ "qat_4xxx_asym.bin" 37 #define ADF_4XXX_ADMIN_OBJ "qat_4xxx_admin.bin" 38 /* Firmware for 402XXX */ 39 #define ADF_402XX_FW "qat_402xx.bin" 40 #define ADF_402XX_MMP "qat_402xx_mmp.bin" 41 #define ADF_402XX_SYM_OBJ "qat_402xx_sym.bin" 42 #define ADF_402XX_DC_OBJ "qat_402xx_dc.bin" 43 #define ADF_402XX_ASYM_OBJ "qat_402xx_asym.bin" 44 #define ADF_402XX_ADMIN_OBJ "qat_402xx_admin.bin" 45 46 /* RL constants */ 47 #define ADF_4XXX_RL_PCIE_SCALE_FACTOR_DIV 100 48 #define ADF_4XXX_RL_PCIE_SCALE_FACTOR_MUL 102 49 #define ADF_4XXX_RL_DCPR_CORRECTION 1 50 #define ADF_4XXX_RL_SCANS_PER_SEC 954 51 #define ADF_4XXX_RL_MAX_TP_ASYM 173750UL 52 #define ADF_4XXX_RL_MAX_TP_SYM 95000UL 53 #define ADF_4XXX_RL_MAX_TP_DC 45000UL 54 #define ADF_4XXX_RL_SLICE_REF 1000UL 55 56 /* Clocks frequency */ 57 #define ADF_4XXX_AE_FREQ (1000 * HZ_PER_MHZ) 58 59 void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id); 60 void adf_clean_hw_data_4xxx(struct adf_hw_device_data *hw_data); 61 62 #endif 63