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/linux/Documentation/devicetree/bindings/mtd/
H A Dingenic,nand.yaml71 <3 0 0x19000000 0x1000000>,
127 partition@c00000 {
132 partition@4c00000 {
/linux/arch/microblaze/boot/dts/
H A Dsystem.dts131 xlnx,include-datawidth-matching-3 = <0x0>;
161 xlnx,synch-mem-3 = <0x0>;
165 xlnx,synch-pipedelay-3 = <0x2>;
169 xlnx,tavdv-ps-mem-3 = <0x3a98>;
173 xlnx,tcedv-ps-mem-3 = <0x3a98>;
177 xlnx,thzce-ps-mem-3 = <0x1b58>;
181 xlnx,thzoe-ps-mem-3 = <0x1b58>;
185 xlnx,tlzwe-ps-mem-3 = <0x0>;
189 xlnx,twc-ps-mem-3 = <0x3a98>;
193 xlnx,twp-ps-mem-3 = <0x2ee0>;
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,secure-proxy.yaml39 minItems: 3
45 pattern: "^rx_[0-9]{3}$"
70 secure_proxy: mailbox@32c00000 {
H A Dnvidia,tegra186-hsp.yaml114 hsp_top0: hsp@3c00000 {
/linux/Documentation/devicetree/bindings/mfd/
H A Dsyscon-common.yaml60 minItems: 3
67 syscon: syscon@1c00000 {
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186-p3310.dtsi48 compatible = "ethernet-phy-ieee802.3-c22";
59 memory-controller@2c00000 {
161 hsp@3c00000 {
198 pmic: pmic@3c {
378 cpu@3 {
H A Dtegra194-p3668.dtsi17 rtc0 = "/bpmp/i2c/pmic@3c";
40 compatible = "ethernet-phy-ieee802.3-c22";
49 memory-controller@2c00000 {
109 usb2-3 {
117 usb3-3 {
136 pmic: pmic@3c {
/linux/Documentation/devicetree/bindings/display/
H A Darm,komeda.yaml94 display@c00000 {
102 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
H A Dxylon,logicvc-display.yaml25 In version 3 of the controller, each layer has fixed memory offset and address
75 # 3-bit LVDS interface (C_DISPLAY_INTERFACE == 4)
76 - lvds-3bits
157 video RAM base (C_VMEM_BASEADDR), only for version 3.
214 logicvc: logicvc@43c00000 {
272 layer@3 {
273 reg = <3>;
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sm8350.yaml90 pcie@1c00000 {
106 #address-cells = <3>;
142 <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
H A Dqcom,pcie-sc8180x.yaml87 pcie@1c00000 {
107 #address-cells = <3>;
152 <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
H A Dqcom,pcie-sa8775p.yaml89 pcie@1c00000 {
106 #address-cells = <3>;
145 <0 0 0 3 &intc GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>,
H A Dqcom,pcie-sm8150.yaml88 pcie@1c00000 {
104 #address-cells = <3>;
138 <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
H A Dqcom,pcie-sm8250.yaml100 pcie@1c00000 {
117 #address-cells = <3>;
153 <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
H A Dqcom,pcie-ep.yaml230 minItems: 3
231 maxItems: 3
233 minItems: 3
234 maxItems: 3
245 pcie_ep: pcie-ep@1c00000 {
281 max-link-speed = <3>;
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,fimd.yaml140 3 - for parallel output,
169 fimd@11c00000 {
190 port@3 {
191 reg = <3>;
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-linksys-viper.dts124 partition@1c00000 {
187 port@3 {
188 reg = <3>;
H A Darmada-385-db-ap.dts100 bm,pool-short = <3>;
110 bm,pool-short = <3>;
131 bm,pool-short = <3>;
165 pcie@3,0 {
232 partition@c00000 {
H A Darmada-370-netgear-rn104.dts77 g762: g762@3e {
141 gpios = <&pca9554 3 GPIO_ACTIVE_LOW>;
296 partition@c00000 {
H A Darmada-xp-netgear-rn2120.dts44 /* Controller for rear fan #1 of 3 (Protechnic
46 g762_fan1: g762@3e {
55 /* Controller for rear (center) fan #2 of 3 */
65 /* Controller for rear fan #3 of 3 */
351 partition@c00000 {
/linux/arch/mips/boot/dts/ingenic/
H A Dci20.dts47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
63 led-3 {
97 gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
464 partition@c00000 {
469 partition@4c00000 {
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5.dtsi57 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
90 #interrupt-cells = <3>;
105 serial_0: serial@12c00000 {
177 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
178 #pwm-cells = <3>;
202 interrupts = <10 3>;
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7280-lpasscorecc.yaml152 lpass_hm: clock-controller@3c00000 {
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa27x.dtsi44 interrupts = <3>;
63 pwm2: pwm@40c00000 {
/linux/arch/powerpc/boot/dts/fsl/
H A Db4qds.dtsi54 3 0 0xf 0xffdf0000 0x00008000>;
91 partition@c00000 {
98 board-control@3,0 {
100 reg = <3 0 0x300>;
203 i2c@3 {

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