xref: /linux/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts (revision 0cac5ce06e524755b3dac1e0a060b05992076d93)
1*44964e81SNiravkumar L Rabara// SPDX-License-Identifier: GPL-2.0-only
2*44964e81SNiravkumar L Rabara/*
3*44964e81SNiravkumar L Rabara * Copyright (C) 2025, Altera Corporation
4*44964e81SNiravkumar L Rabara */
5*44964e81SNiravkumar L Rabara#include "socfpga_agilex5.dtsi"
6*44964e81SNiravkumar L Rabara
7*44964e81SNiravkumar L Rabara/ {
8*44964e81SNiravkumar L Rabara	model = "SoCFPGA Agilex3 SoCDK";
9*44964e81SNiravkumar L Rabara	compatible = "intel,socfpga-agilex3-socdk", "intel,socfpga-agilex3",
10*44964e81SNiravkumar L Rabara		     "intel,socfpga-agilex5";
11*44964e81SNiravkumar L Rabara
12*44964e81SNiravkumar L Rabara	aliases {
13*44964e81SNiravkumar L Rabara		serial0 = &uart0;
14*44964e81SNiravkumar L Rabara		ethernet2 = &gmac2;
15*44964e81SNiravkumar L Rabara	};
16*44964e81SNiravkumar L Rabara
17*44964e81SNiravkumar L Rabara	chosen {
18*44964e81SNiravkumar L Rabara		stdout-path = "serial0:115200n8";
19*44964e81SNiravkumar L Rabara	};
20*44964e81SNiravkumar L Rabara
21*44964e81SNiravkumar L Rabara	cpus {
22*44964e81SNiravkumar L Rabara		/delete-node/ cpu@2;
23*44964e81SNiravkumar L Rabara		/delete-node/ cpu@3;
24*44964e81SNiravkumar L Rabara	};
25*44964e81SNiravkumar L Rabara
26*44964e81SNiravkumar L Rabara	leds {
27*44964e81SNiravkumar L Rabara		compatible = "gpio-leds";
28*44964e81SNiravkumar L Rabara
29*44964e81SNiravkumar L Rabara		led0 {
30*44964e81SNiravkumar L Rabara			label = "hps_led0";
31*44964e81SNiravkumar L Rabara			gpios = <&porta 1 GPIO_ACTIVE_HIGH>;
32*44964e81SNiravkumar L Rabara		};
33*44964e81SNiravkumar L Rabara
34*44964e81SNiravkumar L Rabara		led1 {
35*44964e81SNiravkumar L Rabara			label = "hps_led1";
36*44964e81SNiravkumar L Rabara			gpios = <&porta 12 GPIO_ACTIVE_HIGH>;
37*44964e81SNiravkumar L Rabara		};
38*44964e81SNiravkumar L Rabara
39*44964e81SNiravkumar L Rabara	};
40*44964e81SNiravkumar L Rabara
41*44964e81SNiravkumar L Rabara	memory@80000000 {
42*44964e81SNiravkumar L Rabara		device_type = "memory";
43*44964e81SNiravkumar L Rabara		/* We expect the bootloader to fill in the reg */
44*44964e81SNiravkumar L Rabara		reg = <0x0 0x80000000 0x0 0x0>;
45*44964e81SNiravkumar L Rabara	};
46*44964e81SNiravkumar L Rabara};
47*44964e81SNiravkumar L Rabara
48*44964e81SNiravkumar L Rabara&gmac2 {
49*44964e81SNiravkumar L Rabara	status = "okay";
50*44964e81SNiravkumar L Rabara	phy-mode = "rgmii-id";
51*44964e81SNiravkumar L Rabara	phy-handle = <&emac2_phy0>;
52*44964e81SNiravkumar L Rabara	max-frame-size = <9000>;
53*44964e81SNiravkumar L Rabara
54*44964e81SNiravkumar L Rabara	mdio0 {
55*44964e81SNiravkumar L Rabara		compatible = "snps,dwmac-mdio";
56*44964e81SNiravkumar L Rabara		#address-cells = <1>;
57*44964e81SNiravkumar L Rabara		#size-cells = <0>;
58*44964e81SNiravkumar L Rabara
59*44964e81SNiravkumar L Rabara		emac2_phy0: ethernet-phy@0 {
60*44964e81SNiravkumar L Rabara			reg = <0>;
61*44964e81SNiravkumar L Rabara			rxc-skew-ps = <0>;
62*44964e81SNiravkumar L Rabara			rxdv-skew-ps = <0>;
63*44964e81SNiravkumar L Rabara			rxd0-skew-ps = <0>;
64*44964e81SNiravkumar L Rabara			rxd1-skew-ps = <0>;
65*44964e81SNiravkumar L Rabara			rxd2-skew-ps = <0>;
66*44964e81SNiravkumar L Rabara			rxd3-skew-ps = <0>;
67*44964e81SNiravkumar L Rabara			txc-skew-ps = <0>;
68*44964e81SNiravkumar L Rabara			txen-skew-ps = <60>;
69*44964e81SNiravkumar L Rabara			txd0-skew-ps = <60>;
70*44964e81SNiravkumar L Rabara			txd1-skew-ps = <60>;
71*44964e81SNiravkumar L Rabara			txd2-skew-ps = <60>;
72*44964e81SNiravkumar L Rabara			txd3-skew-ps = <60>;
73*44964e81SNiravkumar L Rabara		};
74*44964e81SNiravkumar L Rabara	};
75*44964e81SNiravkumar L Rabara};
76*44964e81SNiravkumar L Rabara
77*44964e81SNiravkumar L Rabara&gpio0 {
78*44964e81SNiravkumar L Rabara	status = "okay";
79*44964e81SNiravkumar L Rabara};
80*44964e81SNiravkumar L Rabara
81*44964e81SNiravkumar L Rabara&gpio1 {
82*44964e81SNiravkumar L Rabara	status = "okay";
83*44964e81SNiravkumar L Rabara};
84*44964e81SNiravkumar L Rabara
85*44964e81SNiravkumar L Rabara&osc1 {
86*44964e81SNiravkumar L Rabara	clock-frequency = <25000000>;
87*44964e81SNiravkumar L Rabara};
88*44964e81SNiravkumar L Rabara
89*44964e81SNiravkumar L Rabara&qspi {
90*44964e81SNiravkumar L Rabara	status = "okay";
91*44964e81SNiravkumar L Rabara	flash@0 {
92*44964e81SNiravkumar L Rabara		compatible = "jedec,spi-nor";
93*44964e81SNiravkumar L Rabara		reg = <0>;
94*44964e81SNiravkumar L Rabara		spi-max-frequency = <100000000>;
95*44964e81SNiravkumar L Rabara		m25p,fast-read;
96*44964e81SNiravkumar L Rabara		cdns,read-delay = <2>;
97*44964e81SNiravkumar L Rabara		cdns,tshsl-ns = <50>;
98*44964e81SNiravkumar L Rabara		cdns,tsd2d-ns = <50>;
99*44964e81SNiravkumar L Rabara		cdns,tchsh-ns = <4>;
100*44964e81SNiravkumar L Rabara		cdns,tslch-ns = <4>;
101*44964e81SNiravkumar L Rabara		spi-tx-bus-width = <4>;
102*44964e81SNiravkumar L Rabara		spi-rx-bus-width = <4>;
103*44964e81SNiravkumar L Rabara
104*44964e81SNiravkumar L Rabara		partitions {
105*44964e81SNiravkumar L Rabara			compatible = "fixed-partitions";
106*44964e81SNiravkumar L Rabara			#address-cells = <1>;
107*44964e81SNiravkumar L Rabara			#size-cells = <1>;
108*44964e81SNiravkumar L Rabara
109*44964e81SNiravkumar L Rabara			qspi_boot: partition@0 {
110*44964e81SNiravkumar L Rabara				label = "u-boot";
111*44964e81SNiravkumar L Rabara				reg = <0x0 0x00c00000>;
112*44964e81SNiravkumar L Rabara			};
113*44964e81SNiravkumar L Rabara
114*44964e81SNiravkumar L Rabara			root: partition@c00000 {
115*44964e81SNiravkumar L Rabara				label = "root";
116*44964e81SNiravkumar L Rabara				reg = <0x00c00000 0x03400000>;
117*44964e81SNiravkumar L Rabara			};
118*44964e81SNiravkumar L Rabara		};
119*44964e81SNiravkumar L Rabara	};
120*44964e81SNiravkumar L Rabara};
121*44964e81SNiravkumar L Rabara
122*44964e81SNiravkumar L Rabara&smmu {
123*44964e81SNiravkumar L Rabara	status = "okay";
124*44964e81SNiravkumar L Rabara};
125*44964e81SNiravkumar L Rabara
126*44964e81SNiravkumar L Rabara&uart0 {
127*44964e81SNiravkumar L Rabara	status = "okay";
128*44964e81SNiravkumar L Rabara};
129*44964e81SNiravkumar L Rabara
130*44964e81SNiravkumar L Rabara&watchdog0 {
131*44964e81SNiravkumar L Rabara	status = "okay";
132*44964e81SNiravkumar L Rabara};
133