11a59d1b8SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-or-later 2845e5ef1SMichal Simek/* 3845e5ef1SMichal Simek * Device Tree Generator version: 1.1 4845e5ef1SMichal Simek * 5845e5ef1SMichal Simek * (C) Copyright 2007-2008 Xilinx, Inc. 6845e5ef1SMichal Simek * (C) Copyright 2007-2009 Michal Simek 7845e5ef1SMichal Simek * 8845e5ef1SMichal Simek * Michal SIMEK <monstr@monstr.eu> 9845e5ef1SMichal Simek * 10845e5ef1SMichal Simek * CAUTION: This file is automatically generated by libgen. 11845e5ef1SMichal Simek * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6 12845e5ef1SMichal Simek * 13845e5ef1SMichal Simek * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101 14845e5ef1SMichal Simek */ 15845e5ef1SMichal Simek 16845e5ef1SMichal Simek/dts-v1/; 17845e5ef1SMichal Simek/ { 18845e5ef1SMichal Simek #address-cells = <1>; 19845e5ef1SMichal Simek #size-cells = <1>; 20845e5ef1SMichal Simek compatible = "xlnx,microblaze"; 21845e5ef1SMichal Simek model = "testing"; 22845e5ef1SMichal Simek DDR2_SDRAM: memory@90000000 { 23845e5ef1SMichal Simek device_type = "memory"; 24845e5ef1SMichal Simek reg = < 0x90000000 0x10000000 >; 25845e5ef1SMichal Simek } ; 26845e5ef1SMichal Simek aliases { 27845e5ef1SMichal Simek ethernet0 = &Hard_Ethernet_MAC; 28845e5ef1SMichal Simek serial0 = &RS232_Uart_1; 29845e5ef1SMichal Simek } ; 30845e5ef1SMichal Simek chosen { 31845e5ef1SMichal Simek bootargs = "console=ttyUL0,115200 highres=on"; 32a7a9e2f0SRob Herring stdout-path = "/plb@0/serial@84000000"; 33845e5ef1SMichal Simek } ; 34845e5ef1SMichal Simek cpus { 35845e5ef1SMichal Simek #address-cells = <1>; 36845e5ef1SMichal Simek #cpus = <0x1>; 37845e5ef1SMichal Simek #size-cells = <0>; 38845e5ef1SMichal Simek microblaze_0: cpu@0 { 39845e5ef1SMichal Simek clock-frequency = <125000000>; 40845e5ef1SMichal Simek compatible = "xlnx,microblaze-7.10.d"; 41845e5ef1SMichal Simek d-cache-baseaddr = <0x90000000>; 42845e5ef1SMichal Simek d-cache-highaddr = <0x9fffffff>; 43845e5ef1SMichal Simek d-cache-line-size = <0x10>; 44845e5ef1SMichal Simek d-cache-size = <0x2000>; 45845e5ef1SMichal Simek device_type = "cpu"; 46845e5ef1SMichal Simek i-cache-baseaddr = <0x90000000>; 47845e5ef1SMichal Simek i-cache-highaddr = <0x9fffffff>; 48845e5ef1SMichal Simek i-cache-line-size = <0x10>; 49845e5ef1SMichal Simek i-cache-size = <0x2000>; 50845e5ef1SMichal Simek model = "microblaze,7.10.d"; 51845e5ef1SMichal Simek reg = <0>; 52845e5ef1SMichal Simek timebase-frequency = <125000000>; 53845e5ef1SMichal Simek xlnx,addr-tag-bits = <0xf>; 54845e5ef1SMichal Simek xlnx,allow-dcache-wr = <0x1>; 55845e5ef1SMichal Simek xlnx,allow-icache-wr = <0x1>; 56845e5ef1SMichal Simek xlnx,area-optimized = <0x0>; 57845e5ef1SMichal Simek xlnx,cache-byte-size = <0x2000>; 58845e5ef1SMichal Simek xlnx,d-lmb = <0x1>; 59845e5ef1SMichal Simek xlnx,d-opb = <0x0>; 60845e5ef1SMichal Simek xlnx,d-plb = <0x1>; 61845e5ef1SMichal Simek xlnx,data-size = <0x20>; 62845e5ef1SMichal Simek xlnx,dcache-addr-tag = <0xf>; 63845e5ef1SMichal Simek xlnx,dcache-always-used = <0x1>; 64845e5ef1SMichal Simek xlnx,dcache-byte-size = <0x2000>; 65845e5ef1SMichal Simek xlnx,dcache-line-len = <0x4>; 66845e5ef1SMichal Simek xlnx,dcache-use-fsl = <0x1>; 67845e5ef1SMichal Simek xlnx,debug-enabled = <0x1>; 68845e5ef1SMichal Simek xlnx,div-zero-exception = <0x1>; 69845e5ef1SMichal Simek xlnx,dopb-bus-exception = <0x0>; 70845e5ef1SMichal Simek xlnx,dynamic-bus-sizing = <0x1>; 71845e5ef1SMichal Simek xlnx,edge-is-positive = <0x1>; 72845e5ef1SMichal Simek xlnx,family = "virtex5"; 73845e5ef1SMichal Simek xlnx,endianness = <0x1>; 74845e5ef1SMichal Simek xlnx,fpu-exception = <0x1>; 75845e5ef1SMichal Simek xlnx,fsl-data-size = <0x20>; 76845e5ef1SMichal Simek xlnx,fsl-exception = <0x0>; 77845e5ef1SMichal Simek xlnx,fsl-links = <0x0>; 78845e5ef1SMichal Simek xlnx,i-lmb = <0x1>; 79845e5ef1SMichal Simek xlnx,i-opb = <0x0>; 80845e5ef1SMichal Simek xlnx,i-plb = <0x1>; 81845e5ef1SMichal Simek xlnx,icache-always-used = <0x1>; 82845e5ef1SMichal Simek xlnx,icache-line-len = <0x4>; 83845e5ef1SMichal Simek xlnx,icache-use-fsl = <0x1>; 84845e5ef1SMichal Simek xlnx,ill-opcode-exception = <0x1>; 85845e5ef1SMichal Simek xlnx,instance = "microblaze_0"; 86845e5ef1SMichal Simek xlnx,interconnect = <0x1>; 87845e5ef1SMichal Simek xlnx,interrupt-is-edge = <0x0>; 88845e5ef1SMichal Simek xlnx,iopb-bus-exception = <0x0>; 89845e5ef1SMichal Simek xlnx,mmu-dtlb-size = <0x4>; 90845e5ef1SMichal Simek xlnx,mmu-itlb-size = <0x2>; 91845e5ef1SMichal Simek xlnx,mmu-tlb-access = <0x3>; 92845e5ef1SMichal Simek xlnx,mmu-zones = <0x10>; 93845e5ef1SMichal Simek xlnx,number-of-pc-brk = <0x1>; 94845e5ef1SMichal Simek xlnx,number-of-rd-addr-brk = <0x0>; 95845e5ef1SMichal Simek xlnx,number-of-wr-addr-brk = <0x0>; 96845e5ef1SMichal Simek xlnx,opcode-0x0-illegal = <0x1>; 97845e5ef1SMichal Simek xlnx,pvr = <0x2>; 98845e5ef1SMichal Simek xlnx,pvr-user1 = <0x0>; 99845e5ef1SMichal Simek xlnx,pvr-user2 = <0x0>; 100845e5ef1SMichal Simek xlnx,reset-msr = <0x0>; 101845e5ef1SMichal Simek xlnx,sco = <0x0>; 102845e5ef1SMichal Simek xlnx,unaligned-exceptions = <0x1>; 103845e5ef1SMichal Simek xlnx,use-barrel = <0x1>; 104845e5ef1SMichal Simek xlnx,use-dcache = <0x1>; 105845e5ef1SMichal Simek xlnx,use-div = <0x1>; 106845e5ef1SMichal Simek xlnx,use-ext-brk = <0x1>; 107845e5ef1SMichal Simek xlnx,use-ext-nm-brk = <0x1>; 108845e5ef1SMichal Simek xlnx,use-extended-fsl-instr = <0x0>; 109845e5ef1SMichal Simek xlnx,use-fpu = <0x2>; 110845e5ef1SMichal Simek xlnx,use-hw-mul = <0x2>; 111845e5ef1SMichal Simek xlnx,use-icache = <0x1>; 112845e5ef1SMichal Simek xlnx,use-interrupt = <0x1>; 113845e5ef1SMichal Simek xlnx,use-mmu = <0x3>; 114845e5ef1SMichal Simek xlnx,use-msr-instr = <0x1>; 115845e5ef1SMichal Simek xlnx,use-pcmp-instr = <0x1>; 116845e5ef1SMichal Simek } ; 117845e5ef1SMichal Simek } ; 118845e5ef1SMichal Simek mb_plb: plb@0 { 119845e5ef1SMichal Simek #address-cells = <1>; 120845e5ef1SMichal Simek #size-cells = <1>; 121845e5ef1SMichal Simek compatible = "xlnx,plb-v46-1.03.a", "xlnx,plb-v46-1.00.a", "simple-bus"; 122845e5ef1SMichal Simek ranges ; 123845e5ef1SMichal Simek FLASH: flash@a0000000 { 124845e5ef1SMichal Simek bank-width = <2>; 125845e5ef1SMichal Simek compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; 126845e5ef1SMichal Simek reg = < 0xa0000000 0x2000000 >; 127845e5ef1SMichal Simek xlnx,family = "virtex5"; 128845e5ef1SMichal Simek xlnx,include-datawidth-matching-0 = <0x1>; 129845e5ef1SMichal Simek xlnx,include-datawidth-matching-1 = <0x0>; 130845e5ef1SMichal Simek xlnx,include-datawidth-matching-2 = <0x0>; 131845e5ef1SMichal Simek xlnx,include-datawidth-matching-3 = <0x0>; 132845e5ef1SMichal Simek xlnx,include-negedge-ioregs = <0x0>; 133845e5ef1SMichal Simek xlnx,include-plb-ipif = <0x1>; 134845e5ef1SMichal Simek xlnx,include-wrbuf = <0x1>; 135845e5ef1SMichal Simek xlnx,max-mem-width = <0x10>; 136845e5ef1SMichal Simek xlnx,mch-native-dwidth = <0x20>; 137845e5ef1SMichal Simek xlnx,mch-plb-clk-period-ps = <0x1f40>; 138845e5ef1SMichal Simek xlnx,mch-splb-awidth = <0x20>; 139845e5ef1SMichal Simek xlnx,mch0-accessbuf-depth = <0x10>; 140845e5ef1SMichal Simek xlnx,mch0-protocol = <0x0>; 141845e5ef1SMichal Simek xlnx,mch0-rddatabuf-depth = <0x10>; 142845e5ef1SMichal Simek xlnx,mch1-accessbuf-depth = <0x10>; 143845e5ef1SMichal Simek xlnx,mch1-protocol = <0x0>; 144845e5ef1SMichal Simek xlnx,mch1-rddatabuf-depth = <0x10>; 145845e5ef1SMichal Simek xlnx,mch2-accessbuf-depth = <0x10>; 146845e5ef1SMichal Simek xlnx,mch2-protocol = <0x0>; 147845e5ef1SMichal Simek xlnx,mch2-rddatabuf-depth = <0x10>; 148845e5ef1SMichal Simek xlnx,mch3-accessbuf-depth = <0x10>; 149845e5ef1SMichal Simek xlnx,mch3-protocol = <0x0>; 150845e5ef1SMichal Simek xlnx,mch3-rddatabuf-depth = <0x10>; 151845e5ef1SMichal Simek xlnx,mem0-width = <0x10>; 152845e5ef1SMichal Simek xlnx,mem1-width = <0x20>; 153845e5ef1SMichal Simek xlnx,mem2-width = <0x20>; 154845e5ef1SMichal Simek xlnx,mem3-width = <0x20>; 155845e5ef1SMichal Simek xlnx,num-banks-mem = <0x1>; 156845e5ef1SMichal Simek xlnx,num-channels = <0x0>; 157845e5ef1SMichal Simek xlnx,priority-mode = <0x0>; 158845e5ef1SMichal Simek xlnx,synch-mem-0 = <0x0>; 159845e5ef1SMichal Simek xlnx,synch-mem-1 = <0x0>; 160845e5ef1SMichal Simek xlnx,synch-mem-2 = <0x0>; 161845e5ef1SMichal Simek xlnx,synch-mem-3 = <0x0>; 162845e5ef1SMichal Simek xlnx,synch-pipedelay-0 = <0x2>; 163845e5ef1SMichal Simek xlnx,synch-pipedelay-1 = <0x2>; 164845e5ef1SMichal Simek xlnx,synch-pipedelay-2 = <0x2>; 165845e5ef1SMichal Simek xlnx,synch-pipedelay-3 = <0x2>; 166845e5ef1SMichal Simek xlnx,tavdv-ps-mem-0 = <0x1adb0>; 167845e5ef1SMichal Simek xlnx,tavdv-ps-mem-1 = <0x3a98>; 168845e5ef1SMichal Simek xlnx,tavdv-ps-mem-2 = <0x3a98>; 169845e5ef1SMichal Simek xlnx,tavdv-ps-mem-3 = <0x3a98>; 170845e5ef1SMichal Simek xlnx,tcedv-ps-mem-0 = <0x1adb0>; 171845e5ef1SMichal Simek xlnx,tcedv-ps-mem-1 = <0x3a98>; 172845e5ef1SMichal Simek xlnx,tcedv-ps-mem-2 = <0x3a98>; 173845e5ef1SMichal Simek xlnx,tcedv-ps-mem-3 = <0x3a98>; 174845e5ef1SMichal Simek xlnx,thzce-ps-mem-0 = <0x88b8>; 175845e5ef1SMichal Simek xlnx,thzce-ps-mem-1 = <0x1b58>; 176845e5ef1SMichal Simek xlnx,thzce-ps-mem-2 = <0x1b58>; 177845e5ef1SMichal Simek xlnx,thzce-ps-mem-3 = <0x1b58>; 178845e5ef1SMichal Simek xlnx,thzoe-ps-mem-0 = <0x1b58>; 179845e5ef1SMichal Simek xlnx,thzoe-ps-mem-1 = <0x1b58>; 180845e5ef1SMichal Simek xlnx,thzoe-ps-mem-2 = <0x1b58>; 181845e5ef1SMichal Simek xlnx,thzoe-ps-mem-3 = <0x1b58>; 182845e5ef1SMichal Simek xlnx,tlzwe-ps-mem-0 = <0x88b8>; 183845e5ef1SMichal Simek xlnx,tlzwe-ps-mem-1 = <0x0>; 184845e5ef1SMichal Simek xlnx,tlzwe-ps-mem-2 = <0x0>; 185845e5ef1SMichal Simek xlnx,tlzwe-ps-mem-3 = <0x0>; 186845e5ef1SMichal Simek xlnx,twc-ps-mem-0 = <0x2af8>; 187845e5ef1SMichal Simek xlnx,twc-ps-mem-1 = <0x3a98>; 188845e5ef1SMichal Simek xlnx,twc-ps-mem-2 = <0x3a98>; 189845e5ef1SMichal Simek xlnx,twc-ps-mem-3 = <0x3a98>; 190845e5ef1SMichal Simek xlnx,twp-ps-mem-0 = <0x11170>; 191845e5ef1SMichal Simek xlnx,twp-ps-mem-1 = <0x2ee0>; 192845e5ef1SMichal Simek xlnx,twp-ps-mem-2 = <0x2ee0>; 193845e5ef1SMichal Simek xlnx,twp-ps-mem-3 = <0x2ee0>; 194845e5ef1SMichal Simek xlnx,xcl0-linesize = <0x4>; 195845e5ef1SMichal Simek xlnx,xcl0-writexfer = <0x1>; 196845e5ef1SMichal Simek xlnx,xcl1-linesize = <0x4>; 197845e5ef1SMichal Simek xlnx,xcl1-writexfer = <0x1>; 198845e5ef1SMichal Simek xlnx,xcl2-linesize = <0x4>; 199845e5ef1SMichal Simek xlnx,xcl2-writexfer = <0x1>; 200845e5ef1SMichal Simek xlnx,xcl3-linesize = <0x4>; 201845e5ef1SMichal Simek xlnx,xcl3-writexfer = <0x1>; 202845e5ef1SMichal Simek } ; 203845e5ef1SMichal Simek Hard_Ethernet_MAC: xps-ll-temac@81c00000 { 204845e5ef1SMichal Simek #address-cells = <1>; 205845e5ef1SMichal Simek #size-cells = <1>; 206845e5ef1SMichal Simek compatible = "xlnx,compound"; 207845e5ef1SMichal Simek ranges ; 208845e5ef1SMichal Simek ethernet@81c00000 { 209845e5ef1SMichal Simek compatible = "xlnx,xps-ll-temac-1.01.b", "xlnx,xps-ll-temac-1.00.a"; 210845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 211845e5ef1SMichal Simek interrupts = < 5 2 >; 212845e5ef1SMichal Simek llink-connected = <&PIM3>; 213845e5ef1SMichal Simek local-mac-address = [ 00 0a 35 00 00 00 ]; 214845e5ef1SMichal Simek reg = < 0x81c00000 0x40 >; 215845e5ef1SMichal Simek xlnx,bus2core-clk-ratio = <0x1>; 216845e5ef1SMichal Simek xlnx,phy-type = <0x1>; 217845e5ef1SMichal Simek xlnx,phyaddr = <0x1>; 218845e5ef1SMichal Simek xlnx,rxcsum = <0x0>; 219845e5ef1SMichal Simek xlnx,rxfifo = <0x1000>; 220845e5ef1SMichal Simek xlnx,temac-type = <0x0>; 221845e5ef1SMichal Simek xlnx,txcsum = <0x0>; 222845e5ef1SMichal Simek xlnx,txfifo = <0x1000>; 223845e5ef1SMichal Simek } ; 224845e5ef1SMichal Simek } ; 225845e5ef1SMichal Simek IIC_EEPROM: i2c@81600000 { 226845e5ef1SMichal Simek compatible = "xlnx,xps-iic-2.00.a"; 227845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 228845e5ef1SMichal Simek interrupts = < 6 2 >; 229845e5ef1SMichal Simek reg = < 0x81600000 0x10000 >; 230845e5ef1SMichal Simek xlnx,clk-freq = <0x7735940>; 231845e5ef1SMichal Simek xlnx,family = "virtex5"; 232845e5ef1SMichal Simek xlnx,gpo-width = <0x1>; 233845e5ef1SMichal Simek xlnx,iic-freq = <0x186a0>; 234845e5ef1SMichal Simek xlnx,scl-inertial-delay = <0x0>; 235845e5ef1SMichal Simek xlnx,sda-inertial-delay = <0x0>; 236845e5ef1SMichal Simek xlnx,ten-bit-adr = <0x0>; 237845e5ef1SMichal Simek } ; 238845e5ef1SMichal Simek LEDs_8Bit: gpio@81400000 { 239845e5ef1SMichal Simek compatible = "xlnx,xps-gpio-1.00.a"; 240845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 241845e5ef1SMichal Simek interrupts = < 7 2 >; 242845e5ef1SMichal Simek reg = < 0x81400000 0x10000 >; 243845e5ef1SMichal Simek xlnx,all-inputs = <0x0>; 244845e5ef1SMichal Simek xlnx,all-inputs-2 = <0x0>; 245845e5ef1SMichal Simek xlnx,dout-default = <0x0>; 246845e5ef1SMichal Simek xlnx,dout-default-2 = <0x0>; 247845e5ef1SMichal Simek xlnx,family = "virtex5"; 248845e5ef1SMichal Simek xlnx,gpio-width = <0x8>; 249845e5ef1SMichal Simek xlnx,interrupt-present = <0x1>; 250845e5ef1SMichal Simek xlnx,is-bidir = <0x1>; 251845e5ef1SMichal Simek xlnx,is-bidir-2 = <0x1>; 252845e5ef1SMichal Simek xlnx,is-dual = <0x0>; 253845e5ef1SMichal Simek xlnx,tri-default = <0xffffffff>; 254845e5ef1SMichal Simek xlnx,tri-default-2 = <0xffffffff>; 255845e5ef1SMichal Simek #gpio-cells = <2>; 256845e5ef1SMichal Simek gpio-controller; 257845e5ef1SMichal Simek } ; 258845e5ef1SMichal Simek 259845e5ef1SMichal Simek gpio-leds { 260845e5ef1SMichal Simek compatible = "gpio-leds"; 261845e5ef1SMichal Simek 262845e5ef1SMichal Simek heartbeat { 263845e5ef1SMichal Simek label = "Heartbeat"; 264845e5ef1SMichal Simek gpios = <&LEDs_8Bit 4 1>; 265845e5ef1SMichal Simek linux,default-trigger = "heartbeat"; 266845e5ef1SMichal Simek }; 267845e5ef1SMichal Simek 268845e5ef1SMichal Simek yellow { 269845e5ef1SMichal Simek label = "Yellow"; 270845e5ef1SMichal Simek gpios = <&LEDs_8Bit 5 1>; 271845e5ef1SMichal Simek }; 272845e5ef1SMichal Simek 273845e5ef1SMichal Simek red { 274845e5ef1SMichal Simek label = "Red"; 275845e5ef1SMichal Simek gpios = <&LEDs_8Bit 6 1>; 276845e5ef1SMichal Simek }; 277845e5ef1SMichal Simek 278845e5ef1SMichal Simek green { 279845e5ef1SMichal Simek label = "Green"; 280845e5ef1SMichal Simek gpios = <&LEDs_8Bit 7 1>; 281845e5ef1SMichal Simek }; 282845e5ef1SMichal Simek } ; 283*7cca9b8bSLinus Walleij 284*7cca9b8bSLinus Walleij gpio-restart { 285*7cca9b8bSLinus Walleij compatible = "gpio-restart"; 286*7cca9b8bSLinus Walleij /* 287*7cca9b8bSLinus Walleij * FIXME: is this active low or active high? 288*7cca9b8bSLinus Walleij * the current flag (1) indicates active low. 289*7cca9b8bSLinus Walleij * delay measures are templates, should be adjusted 290*7cca9b8bSLinus Walleij * to datasheet or trial-and-error with real hardware. 291*7cca9b8bSLinus Walleij */ 292*7cca9b8bSLinus Walleij gpios = <&LEDs_8Bit 2 1>; 293*7cca9b8bSLinus Walleij active-delay = <100>; 294*7cca9b8bSLinus Walleij inactive-delay = <10>; 295*7cca9b8bSLinus Walleij wait-delay = <100>; 296*7cca9b8bSLinus Walleij }; 297*7cca9b8bSLinus Walleij 298845e5ef1SMichal Simek RS232_Uart_1: serial@84000000 { 299845e5ef1SMichal Simek clock-frequency = <125000000>; 300845e5ef1SMichal Simek compatible = "xlnx,xps-uartlite-1.00.a"; 301845e5ef1SMichal Simek current-speed = <115200>; 302845e5ef1SMichal Simek device_type = "serial"; 303845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 304845e5ef1SMichal Simek interrupts = < 8 0 >; 305845e5ef1SMichal Simek port-number = <0>; 306845e5ef1SMichal Simek reg = < 0x84000000 0x10000 >; 307845e5ef1SMichal Simek xlnx,baudrate = <0x1c200>; 308845e5ef1SMichal Simek xlnx,data-bits = <0x8>; 309845e5ef1SMichal Simek xlnx,family = "virtex5"; 310845e5ef1SMichal Simek xlnx,odd-parity = <0x0>; 311845e5ef1SMichal Simek xlnx,use-parity = <0x0>; 312845e5ef1SMichal Simek } ; 313845e5ef1SMichal Simek debug_module: debug@84400000 { 314845e5ef1SMichal Simek compatible = "xlnx,mdm-1.00.d"; 315845e5ef1SMichal Simek reg = < 0x84400000 0x10000 >; 316845e5ef1SMichal Simek xlnx,family = "virtex5"; 317845e5ef1SMichal Simek xlnx,interconnect = <0x1>; 318845e5ef1SMichal Simek xlnx,jtag-chain = <0x2>; 319845e5ef1SMichal Simek xlnx,mb-dbg-ports = <0x1>; 320845e5ef1SMichal Simek xlnx,uart-width = <0x8>; 321845e5ef1SMichal Simek xlnx,use-uart = <0x1>; 322845e5ef1SMichal Simek xlnx,write-fsl-ports = <0x0>; 323845e5ef1SMichal Simek } ; 324845e5ef1SMichal Simek mpmc@90000000 { 325845e5ef1SMichal Simek #address-cells = <1>; 326845e5ef1SMichal Simek #size-cells = <1>; 327845e5ef1SMichal Simek compatible = "xlnx,mpmc-4.02.a"; 328845e5ef1SMichal Simek ranges ; 329845e5ef1SMichal Simek PIM3: sdma@84600180 { 330845e5ef1SMichal Simek compatible = "xlnx,ll-dma-1.00.a"; 331845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 332845e5ef1SMichal Simek interrupts = < 2 2 1 2 >; 333845e5ef1SMichal Simek reg = < 0x84600180 0x80 >; 334845e5ef1SMichal Simek } ; 335845e5ef1SMichal Simek } ; 336845e5ef1SMichal Simek xps_intc_0: interrupt-controller@81800000 { 337845e5ef1SMichal Simek #interrupt-cells = <0x2>; 338845e5ef1SMichal Simek compatible = "xlnx,xps-intc-1.00.a"; 339845e5ef1SMichal Simek interrupt-controller ; 340845e5ef1SMichal Simek reg = < 0x81800000 0x10000 >; 341845e5ef1SMichal Simek xlnx,kind-of-intr = <0x100>; 342845e5ef1SMichal Simek xlnx,num-intr-inputs = <0x9>; 343845e5ef1SMichal Simek } ; 344845e5ef1SMichal Simek xps_timer_1: timer@83c00000 { 345845e5ef1SMichal Simek compatible = "xlnx,xps-timer-1.00.a"; 346845e5ef1SMichal Simek interrupt-parent = <&xps_intc_0>; 347845e5ef1SMichal Simek interrupts = < 3 2 >; 348845e5ef1SMichal Simek reg = < 0x83c00000 0x10000 >; 349845e5ef1SMichal Simek xlnx,count-width = <0x20>; 350845e5ef1SMichal Simek xlnx,one-timer-only = <0x0>; 351845e5ef1SMichal Simek } ; 352845e5ef1SMichal Simek } ; 353845e5ef1SMichal Simek} ; 354