Home
last modified time | relevance | path

Searched +full:31 +full:- +full:1024 (Results 1 – 25 of 773) sorted by relevance

12345678910>>...31

/linux/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
73 mode "640x480-85"
77 # 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock)
94 mode "640x480-100"
98 # 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock)
[all …]
/linux/drivers/video/fbdev/
H A Dvalkyriefb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Vmode-switching changes and vmode 15/17 modifications created 29 August
13 * Ported to 68k Macintosh by David Huggins-Daines <dhd@debian.org>
20 * pmc-valkyrie.h: Console support for PowerMac "control" display adaptor.
23 * pmc-valkyrie.c: Console support for PowerMac "control" display adaptor.
28 * pmc-control.h: Console support for PowerMac "control" display adaptor.
31 * pmc-control.c: Console support for PowerMac "control" display adaptor.
39 /* Valkyrie registers are word-aligned on m68k */
90 /* Register values for 1024x768, 75Hz mode (17) */
96 * I was going to use 12, 31, 3, which I found by myself, but instead I'm
[all …]
H A Dq40fb.c2 * linux/drivers/video/q40fb.c -- Q40 frame buffer device
6 * Richard Zidlicky <rz@linux-m68k.org>
31 .smem_len = 1024*1024,
34 .line_length = 1024*2,
39 .xres = 1024,
41 .xres_virtual = 1024,
70 ((u32 *)info->pseudo_palette)[regno] = ((red & 31) <<6) | in q40fb_setcolreg()
71 ((green & 31) << 11) | in q40fb_setcolreg()
88 return -ENXIO; in q40fb_probe()
93 info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev); in q40fb_probe()
[all …]
/linux/drivers/net/ethernet/freescale/
H A Ducc_geth.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) Freescale Semicondutor, Inc. 2006-2009. All rights reserved.
12 * - Rearrange code and style fixes
41 u8 res0[0x100 - sizeof(struct ucc_fast)];
46 u32 hafdup; /* half-duplex reg. */
57 u8 res3[0x180 - 0x15A];
105 u8 res5[0x200 - 0x1c4];
119 #define TEMODER_NUM_OF_QUEUES_SHIFT (15-15) /* Number of queues <<
128 #define REMODER_VLAN_OPERATION_TAGGED_SHIFT (31-9 ) /* vlan operation
130 #define REMODER_VLAN_OPERATION_NON_TAGGED_SHIFT (31-10) /* vlan operation non
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-trogdor-wormdingler-rev1-boe.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * SKU: 0x400 => 1024
8 * - bits 11..8: Panel ID: 0x4 (BOE)
11 /dts-v1/;
13 #include "sc7180-trogdor-wormdingler.dtsi"
14 #include "sc7180-trogdor-rt5682i-sku.dtsi"
18 compatible = "google,wormdingler-sku1024", "qcom,sc7180";
22 qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
23 qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
24 qcom,phy-drive-ldo-level = <450>;
[all …]
/linux/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga_reg.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 1998-2021 VMware, Inc.
28 * svga_reg.h --
100 #define SVGA_MAX_CURSOR_CMD_BYTES (40 * 1024)
101 #define SVGA_MAX_CURSOR_CMD_DIMENSION 1024
138 SVGA_REG_NUM_DISPLAYS = 31,
211 SVGA_PALETTE_BASE = 1024,
237 #define SVGA_GMR_NULL ((uint32)-1)
238 #define SVGA_GMR_FRAMEBUFFER ((uint32)-2)
258 #define SVGA_CB_MAX_COMMAND_SIZE (32 * 1024)
[all …]
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
[all …]
/linux/sound/isa/ad1816a/
H A Dad1816a_lib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
4 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
24 for (timeout = 1000; timeout-- > 0; udelay(10)) in snd_ad1816a_busy_wait()
28 dev_warn(chip->car in snd_ad1816a_busy_wait()
[all...]
/linux/arch/powerpc/sysdev/
H A Dcpm_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
39 return -ENODEV; in cpm_init()
68 (CONFIG_PPC_EARLY_DEBUG_CPM_ADDR - PHYS_IMMR_BASE + in udbg_init_cpm()
71 (in_be32(&cpm_udbg_txdesc[1]) - PHYS_IMMR_BASE + in udbg_init_cpm()
81 setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG); in udbg_init_cpm()
108 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_save_regs()
110 cpm2_gc->cpdata = in_be32(&iop->dat); in cpm2_gpio32_save_regs()
116 struct cpm2_ioports __iomem *iop = cpm2_gc->regs; in cpm2_gpio32_get()
[all …]
/linux/drivers/usb/isp1760/
H A Disp1760-core.c1 // SPDX-License-Identifier: GPL-2.0
24 #include "isp1760-core.h"
25 #include "isp1760-hcd.h"
26 #include "isp1760-regs.h"
27 #include "isp1760-udc.h"
31 struct isp1760_hcd *hcd = &isp->hcd; in isp1760_init_core()
32 struct isp1760_udc *udc = &isp->udc; in isp1760_init_core()
35 /* Low-level chip reset */ in isp1760_init_core()
36 if (isp->rst_gpio) { in isp1760_init_core()
37 gpiod_set_value_cansleep(isp->rst_gpio, 1); in isp1760_init_core()
[all …]
/linux/drivers/net/ethernet/atheros/alx/
H A Dhw.h43 /* Transmit Packet Descriptor, contains 4 32-bit words.
45 * 31 16 0
46 * +----------------+----------------+
47 * | vlan-tag | buf length |
48 * +----------------+----------------+
50 * +----------------+----------------+
52 * +----------------+----------------+
54 * +----------------+----------------+
56 * Word 2 and 3 combine to form a 64-bit buffer address
68 * 0-+ 0-+
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-platform-hidma-mgmt1 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
10 What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
19 What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
31 What: /sys/devices/platform/hidma-mgmt*/dma_channels
40 What: /sys/devices/platform/hidma-mgmt*/hw_version_major
48 What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
56 What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
62 Contains a value between 0 and 31. Maximum number of
68 What: /sys/devices/platform/hidma-mgmt*/max_read_request
75 of two and can be between 128 and 1024.
[all …]
/linux/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige.h1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
4 * - this file contains software data structures and any chip-specific
7 * Copyright (C) 2020-2021 NVIDIA CORPORATION & AFFILIATES
13 #include <linux/io-64-nonatomic-lo-hi.h>
22 * will be capped at a realistic value of 1024 entries.
25 #define MLXBF_GIGE_MAX_RXQ_SZ 1024
145 #define MLXBF_GIGE_RX_CQE_CHKSUM_MASK GENMASK(31, 16)
151 #define MLXBF_GIGE_TX_WQE_UPDATE_MASK GENMASK(31, 31)
/linux/sound/x86/
H A Dintel_hdmi_lpe_audio.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * intel_hdmi_lpe_audio.h - Intel HDMI LPE audio driver
23 #define HAD_MAX_BUFFER ((1024 * 1024 - 1) & ~0x3f)
24 #define HAD_DEFAULT_BUFFER (600 * 1024) /* default prealloc size */
28 #define HAD_MIN_PERIOD_BYTES 1024 /* might be smaller */
74 /* HDMI Controller register offsets - audio domain common */
119 u32 left_align:1; /* 0: MSB bits 0-23, 1: bits 8-31 */
151 /* samp_freq values - Sampling rate as per IEC60958 Ver 3 */
312 #define HDMI_AUDIO_UNDERRUN (1U << 31)
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-tx53-x13x.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
3 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
6 /dts-v1/;
7 #include "imx53-tx53.dtsi"
8 #include <dt-bindings/input/input.h>
11 model = "Ka-Ro electronics TX53 module (LVDS)";
21 compatible = "pwm-backlight";
23 power-supply = <&reg_3v3>;
24 brightness-levels = <
28 30 31 32 33 34 35 36 37 38 39
[all …]
H A Dimx6qdl-tx6-lvds.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
3 * Copyright 2017 Lothar Waßmann <LW@KARO-electronics.de>
14 compatible = "pwm-backlight";
16 power-supply = <&reg_lcd0_pwr>;
17 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
20 30 31 32 33 34 35 36 37 38 39
28 default-brightness-level = <50>;
32 compatible = "pwm-backlight";
34 power-supply = <&reg_lcd1_pwr>;
35 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
[all …]
/linux/arch/x86/kvm/vmx/
H A Dtdx_arch.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #define TDX_FIELD_MASK GENMASK_ULL(31, 0)
81 #define TDX_TD_ATTR_KL BIT_ULL(31)
87 * TD_PARAMS is provided as an input to TDH_MNG_INIT, the size of which is 1024B.
109 } __packed __aligned(1024);
128 * frequency of the core crystal clock on TDX-capable platforms, i.e. the TDX
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dcsky,mpintc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/csky,mpintc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: C-SKY Multi-processors Interrupt Controller
10 - Guo Ren <guoren@kernel.org>
13 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
14 SMP soc, and it also could be used in non-SMP system.
17 0-15 : software irq, and we use 15 as our IPI_IRQ.
18 16-31 : private irq, and we use 16 as the co-processor timer.
[all …]
/linux/arch/powerpc/perf/
H A Dbhrb.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/ppc-opcode.h>
14 /* r3 = n (where n = [0-31])
16 * is 1024. We have limited number of table entries here as POWER8 implements
22 cmpldi r3,31
/linux/drivers/iommu/
H A Drockchip-iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Module Authors: Simon Xue <xxm@rock-chips.com>
13 #include <linux/dma-mapping.h>
30 #include "iommu-pages.h"
39 #define RK_MMU_INT_CLEAR 0x18 /* Acknowledge and re-arm irq */
57 #define RK_MMU_STATUS_STALL_NOT_ACTIVE BIT(31)
63 #define RK_MMU_CMD_DISABLE_STALL 3 /* Stop stall re-enables paging */
73 #define NUM_DT_ENTRIES 1024
74 #define NUM_PT_ENTRIES 1024
135 dma_sync_single_for_device(dom->dma_dev, dma, size, DMA_TO_DEVICE); in rk_table_flush()
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_marvel.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define MARVEL_MAX_PIDS 32 /* as long as we rely on 43-bit superpage */
22 #define MARVEL_IRQ_VEC_IRQ_MASK ((1 << MARVEL_IRQ_VEC_PE_SHIFT) - 1)
53 #define EV7_MASK40(addr) ((addr) & ((1UL << 41) - 1))
65 #define EV7_CSR_OFFSET(name) ((unsigned long)&((ev7_csrs *)NULL)->name.csr)
89 /* AGP Control Registers -- port 3 only */
196 io7_csr rsvd6[31];
213 unsigned dac : 1; /* <2> -- window 3 only */
215 unsigned addr : 12; /* <31:20> */
225 * For level-sensative interrupts, int_num is encoded as:
[all …]
/linux/drivers/infiniband/sw/rxe/
H A Drxe_param.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
20 else if (mtu < 1024) in rxe_mtu_int_to_enum()
33 mtu -= RXE_MAX_HDR_LENGTH; in eth_mtu_int_to_enum()
40 RXE_MAX_MR_SIZE = -1ull,
62 RXE_MAX_INLINE_DATA = RXE_MAX_WQE_SIZE -
74 RXE_MAX_AH = (1<<15) - 1, /* 32Ki - 1 */
91 RXE_MAX_QP = DEFAULT_MAX_VALUE - RXE_MIN_QP_INDEX,
95 RXE_MAX_SRQ = DEFAULT_MAX_VALUE - RXE_MIN_SRQ_INDEX,
99 RXE_MAX_MR = RXE_MAX_MR_INDEX - RXE_MIN_MR_INDEX,
102 RXE_MAX_MW = RXE_MAX_MW_INDEX - RXE_MIN_MW_INDEX,
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dfarch_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2012 Solarflare Communications Inc.
15 * F<type>_<min-rev><max-rev>_
20 * -------------------------------------------------------------
25 * <min-rev> is the first revision to which the definition applies:
32 * then <max-rev> is the last revision to which the definition applies;
149 #define FRF_AB_EE_SPI_HCMD_CMD_EN_LBN 31
235 #define FRF_AB_EE_VPD_CYCLE_PENDING_LBN 31
270 #define FRF_BB_EE_STRAP_EN_LBN 31
[all …]
/linux/drivers/net/ethernet/sfc/falcon/
H A Dfarch_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2012 Solarflare Communications Inc.
15 * F<type>_<min-rev><max-rev>_
20 * -------------------------------------------------------------
25 * <min-rev> is the first revision to which the definition applies:
32 * then <max-rev> is the last revision to which the definition applies;
149 #define FRF_AB_EE_SPI_HCMD_CMD_EN_LBN 31
235 #define FRF_AB_EE_VPD_CYCLE_PENDING_LBN 31
270 #define FRF_BB_EE_STRAP_EN_LBN 31
[all …]
/linux/drivers/net/ethernet/ibm/
H A Dibmveth.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
119 #define IBMVETH_MAX_BUF_SIZE (1024 * 128)
120 #define IBMVETH_MAX_TX_BUF_SIZE (1024 * 64)
125 static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 };
226 #define IBMVETH_RXQ_TOGGLE_SHIFT 31

12345678910>>...31