Lines Matching +full:31 +full:- +full:1024
43 /* Transmit Packet Descriptor, contains 4 32-bit words.
45 * 31 16 0
46 * +----------------+----------------+
47 * | vlan-tag | buf length |
48 * +----------------+----------------+
50 * +----------------+----------------+
52 * +----------------+----------------+
54 * +----------------+----------------+
56 * Word 2 and 3 combine to form a 64-bit buffer address
68 * 0-+ 0-+
75 * 7-+ 7-+
86 * 18-+ 18-+
93 * 25-+ 25 |
94 * 26-+ 26 |
98 * 30-+ 30-+
99 * 31 End of packet 31 End of packet
144 #define TPD_EOP_SHIFT 31
151 * declared in register --- every
156 /* Receive Return Descriptor, contains 4 32-bit words.
158 * 31 16 0
159 * +----------------+----------------+
161 * +----------------+----------------+
163 * +----------------+----------------+
165 * +----------------+----------------+
167 * +----------------+----------------+
171 * 0--+ 0--+
186 * 15-+ 15-+
187 * 16-+ 16-+
190 * 19-+ 19 | Protocol ID
191 * 20-+ 20 | (23:16)
194 * 23 | 23-+
196 * 25 | Start index of RFD-ring 25-+
197 * 26 | (31:20) 26 | RSS Q-num (27:25)
198 * 27 | 27-+
199 * 28 | 28-+
201 * 30 | 30 | (31:28)
202 * 31-+ 31-+
206 * 0--+
219 * 13-+
223 * 17-+
225 * 19-+
231 * 25 Incomplete packet due to insufficient rx-desc
237 * 31 Updated, indicate to driver that this RRD is refreshed.
259 /* non-ip packet */
320 #define RRD_UPDATED_SHIFT 31
351 #define ALX_MAX_JUMBO_PKT_SIZE (9*1024)
352 #define ALX_MAX_TSO_PKT_SIZE (7*1024)
405 u64 rx_sz_127B; /* 65-127 byte RX packets */
406 u64 rx_sz_255B; /* 128-255 byte RX packets */
407 u64 rx_sz_511B; /* 256-511 byte RX packets */
408 u64 rx_sz_1023B; /* 512-1023 byte RX packets */
409 u64 rx_sz_1518B; /* 1024-1518 byte RX packets */
429 u64 tx_sz_127B; /* 65-127 byte TX packets */
430 u64 tx_sz_255B; /* 128-255 byte TX packets */
431 u64 tx_sz_511B; /* 256-511 byte TX packets */
432 u64 tx_sz_1023B; /* 512-1023 byte TX packets */
433 u64 tx_sz_1518B; /* 1024-1518 byte TX packets */
486 /* auto-neg advertisement or force mode config */
503 return hw->pdev->revision >> ALX_PCI_REVID_SHIFT; in alx_hw_revision()
508 return hw->pdev->revision & 1; in alx_hw_with_cr()
513 return hw->pdev->device & 1; in alx_hw_giga()
518 writeb(val, hw->hw_addr + reg); in alx_write_mem8()
523 writew(val, hw->hw_addr + reg); in alx_write_mem16()
528 return readw(hw->hw_addr + reg); in alx_read_mem16()
533 writel(val, hw->hw_addr + reg); in alx_write_mem32()
538 return readl(hw->hw_addr + reg); in alx_read_mem32()
543 readl(hw->hw_addr); in alx_post_write()