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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td29 "ARM v8.2 UAO PState extension (psuao)">;
33 "ARM v8.2 PAN AT S1E1R and AT S1E1W Variation">;
54 let Encoding{2-0} = op2;
58 def : AT<"S1E1R", 0b000, 0b0111, 0b1000, 0b000>;
59 def : AT<"S1E2R", 0b100, 0b0111, 0b1000, 0b000>;
60 def : AT<"S1E3R", 0b110, 0b0111, 0b1000, 0b000>;
61 def : AT<"S1E1W", 0b000, 0b0111, 0b1000, 0b001>;
64 def : AT<"S1E0R", 0b000, 0b0111, 0b1000, 0b010>;
65 def : AT<"S1E0W", 0b000, 0b0111, 0b1000, 0b011>;
72 def : AT<"S1E1RP", 0b000, 0b0111, 0b1001, 0b000>;
[all …]
H A DAArch64SMEInstrInfo.td13 def AArch64_smstart : SDNode<"AArch64ISD::SMSTART", SDTypeProfile<0, 2,
17 def AArch64_smstop : SDNode<"AArch64ISD::SMSTOP", SDTypeProfile<0, 2,
25 def AArch64_restore_zt : SDNode<"AArch64ISD::RESTORE_ZT", SDTypeProfile<0, 2,
28 def AArch64_save_zt : SDNode<"AArch64ISD::SAVE_ZT", SDTypeProfile<0, 2,
97 defm BFMOPA_MPPZZ : sme_bf16_outer_product<0b000, "bfmopa", int_aarch64_sme_mopa_wide>;
113 defm SMOPA_MPPZZ_S : sme_int_outer_product_i32<0b000, "smopa", int_aarch64_sme_smopa_wide>;
124 defm SMOPA_MPPZZ_D : sme_int_outer_product_i64<0b000, "smopa", int_aarch64_sme_smopa_wide>;
310 defm FMLAL_VG2_M2ZZ_HtoS : sme2_fp_mla_long_array_vg2_single<"fmlal", 0b000, MatrixOp32, ZZ_h, ZP…
311 defm FMLAL_VG4_M4ZZ_HtoS : sme2_fp_mla_long_array_vg4_single<"fmlal", 0b000, MatrixOp32, ZZZZ_h, …
312 defm FMLAL_VG2_M2Z2Z_HtoS : sme2_fp_mla_long_array_vg2_multi<"fmlal", 0b000, MatrixOp32, ZZ_h_mul…
[all …]
H A DAArch64SVEInstrInfo.td31 SDTCisVec<0>, SDTCisVec<1>, SDTCisPtrTy<2>,
49 def SDT_AArch64_LD1Replicate : SDTypeProfile<1, 2, [
50 SDTCisVec<0>, SDTCisVec<1>, SDTCisPtrTy<2>,
60 SDTCisVec<0>, SDTCisVec<1>, SDTCisPtrTy<2>, SDTCisVec<3>, SDTCisVT<4, OtherVT>,
65 SDTCisVec<0>, SDTCisVec<1>, SDTCisVec<2>, SDTCisInt<3>, SDTCisVT<4, OtherVT>,
109 SDTCisVec<0>, SDTCisPtrTy<1>, SDTCisVec<2>,
110 SDTCVecEltisVT<2,i1>, SDTCisSameNumEltsAs<0,2>
118 SDTCisVec<0>, SDTCisVec<1>, SDTCisPtrTy<2>, SDTCisVec<3>, SDTCisVT<4, OtherVT>,
123 SDTCisVec<0>, SDTCisVec<1>, SDTCisVec<2>, SDTCisInt<3>, SDTCisVT<4, OtherVT>,
147 def sve_cntd_imm : ComplexPattern<i64, 1, "SelectRDVLImm<1, 16, 2>">;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZk.td25 SDTCisVT<2, XLenVT>,
46 def byteselect : RISCVOp<i32>, TImmLeaf<i32, [{return isUInt<2>(Imm);}]> {
47 let ParserMatchClass = UImmAsmOperand<2>;
48 let DecoderMethod = "decodeUImmOperand<2>";
62 : RVInstR<{0b00, funct5}, 0b000, OPC_OP, (outs GPR:$rd),
65 bits<2> bs;
88 def AES64DS : ALU_rr<0b0011101, 0b000, "aes64ds">;
89 def AES64DSM : ALU_rr<0b0011111, 0b000, "aes64dsm">;
95 def AES64KS2 : ALU_rr<0b0111111, 0b000, "aes64ks2">;
106 def AES64ES : ALU_rr<0b0011001, 0b000, "aes64e
[all...]
H A DRISCVInstrInfoXCV.td14 class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
24 class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
43 def CV_EXTRACT : CVBitManipRII<0b00, 0b000, "cv.extract">;
44 def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;
54 def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
79 class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
90 class CVInstMacN<bits<2> funct2, bits<3> funct3, string opcodestr>
94 class CVInstMulN<bits<2> funct2, bits<3> funct3, string opcodestr>
165 class CVInstAluRRI<bits<2> funct2, bits<3> funct3, string opcodestr>
347 def CV_ # NAME # _H : CVSIMDRR<funct5, F, funct1, 0b000, "c
[all...]
H A DRISCVInstrInfoC.td100 ImmLeaf<XLenVT, [{return isShiftedUInt<5, 2>(Imm);}]> {
109 return isShiftedUInt<5, 2>(Imm);
115 ImmLeaf<XLenVT, [{return isShiftedUInt<6, 2>(Imm);}]> {
124 return isShiftedUInt<6, 2>(Imm);
179 [{return isShiftedUInt<8, 2>(Imm) && (Imm != 0);}]> {
188 return isShiftedUInt<8, 2>(Imm) && (Imm != 0);
233 let DecoderMethod = "decodeUImmOperand<2>";
273 let Inst{11-10} = imm{3-2};
276 let Inst{2} = imm{4};
280 class Shift_right<bits<2> funct2, string OpcodeStr, RegisterClass cls,
[all …]
H A DRISCVInstrInfoF.td23 : SDTypeProfile<1, 2, [SDTCisVT<0, i64>, SDTCisFP<1>,
24 SDTCisVT<2, i64>]>;
26 : SDTypeProfile<1, 2, [SDTCisVT<0, XLenVT>, SDTCisFP<1>,
27 SDTCisVT<2, XLenVT>]>;
30 : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
137 // doesn't affect the output originally always set it to 0b000 ('rne'). As old
177 class FPFMA_rrr_frm<RISCVOpcode opcode, bits<2> funct2, string opcodestr,
183 multiclass FPFMA_rrr_frm_m<RISCVOpcode opcode, bits<2> funct2,
329 defm FSGNJ_S : FPALU_rr_m<0b0010000, 0b000, "fsgnj.s", Ext>;
335 defm FMIN_S : FPALU_rr_m<0b0010100, 0b000, "fmin.s", Ext, Commutable=1>;
[all …]
H A DRISCVInstrInfo.td25 def SDT_RISCVSelectCC : SDTypeProfile<1, 5, [SDTCisSameAs<1, 2>,
30 SDTCisVT<2, OtherVT>,
33 def SDT_RISCVWriteCSR : SDTypeProfile<0, 2, [SDTCisInt<0>, SDTCisInt<1>]>;
34 def SDT_RISCVSwapCSR : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisInt<1>,
35 SDTCisInt<2>]>;
36 def SDT_RISCVReadCounterWide : SDTypeProfile<2, 2, [SDTCisVT<0, i32>,
38 SDTCisInt<2>,
43 def SDT_RISCVIntBinOpW : SDTypeProfile<1, 2, [
44 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64>
47 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64>, SDTCisVT<3, i64>
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td16 SDTCisSameAs<1, 2>,
20 SDTCisSameAs<1, 2>,
24 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
25 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
26 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
27 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
28 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
30 SDTCisVT<2, i32>, SDTCisSameAs<0, 3>,
54 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
56 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepInstrInfo.td48 let Inst{7-5} = 0b000;
100 let Inst{7-5} = 0b000;
176 let Inst{7-5} = 0b000;
223 let opExtendable = 2;
256 let Inst{7-5} = 0b000;
298 let Inst{7-5} = 0b000;
320 let opExtendable = 2;
330 let Inst{7-5} = 0b000;
364 let Inst{7-5} = 0b000;
376 let Inst{7-5} = 0b000;
[all...]
/freebsd/sys/contrib/device-tree/src/arm/realtek/
H A Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
43 rpc_comm: rpc@b000 {
71 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
73 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
75 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
77 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
131 misc: syscon@1b000 {
156 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
199 reg-shift = <2>;
211 reg-shift = <2>;
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7981b.dtsi10 #address-cells = <2>;
11 #size-cells = <2>;
47 #address-cells = <2>;
48 #size-cells = <2>;
66 topckgen: clock-controller@1001b000 {
94 #pwm-cells = <2>;
173 spi@1100b000 {
205 #gpio-cells = <2>;
206 #interrupt-cells = <2>;
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dimx1-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
38 clock-controller@21b000 {
/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dqcom,spmi-sdam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
44 sdam_1: nvram@b000 {
54 bits = <6 2>;
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dintel,keembay-ocs-hcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
41 crypto@3000b000 {
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrArithmetic.td38 def MxOpMode8_d_EA : MxOpModeEncoding<0b000>;
61 /// F E D C | B A 9 | 8 7 6 | 5 4 3 | 2 1 0
78 !eq(SRC_TYPE.RLet, "d") : (descend 0b000, (operand "$opd", 3))
97 /*MODE*/0b000,
117 /// F E D C B A 9 8 | 7 6 | 5 4 3 | 2 1 0
154 /*MODE*/0b000,
327 /// F E D C | B A 9 | 8 | 7 6 | 5 4 | 3 | 2 1 0
423 /*MODE*/0b000,
533 /// F E D C B A 9 | 8 7 6 | 5 4 3 | 2 1 0
552 0b000,
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx27.dtsi180 uart2: serial@1000b000 {
305 #gpio-cells = <2>;
307 #interrupt-cells = <2>;
316 #gpio-cells = <2>;
318 #interrupt-cells = <2>;
327 #gpio-cells = <2>;
329 #interrupt-cells = <2>;
338 #gpio-cells = <2>;
340 #interrupt-cells = <2>;
349 #gpio-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
57 maxItems: 2
72 spi@4000b000 {
/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/
H A Dmtk-svs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
82 #address-cells = <2>;
83 #size-cells = <2>;
85 svs@1100b000 {
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dst,stm32-dma2d.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
62 dma2d: dma2d@4002b000 {
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dnvidia,tegra210-emc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
72 external-memory-controller@7001b000 {
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra72x.dtsi27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
81 ti,mbox-tx = <6 2 2>;
82 ti,mbox-rx = <4 2 2>;
86 ti,mbox-tx = <5 2 2>;
87 ti,mbox-rx = <1 2 2>;
94 ti,mbox-tx = <6 2 2>;
95 ti,mbox-rx = <4 2 2>;
/freebsd/sys/dts/arm/
H A Dvybrid-cosmic.dts10 * 2. Redistributions in binary form must reproduce the above copyright
74 adc0: adc@4003B000 {
H A Dvybrid-colibri-vf50.dts10 * 2. Redistributions in binary form must reproduce the above copyright
66 adc0: adc@4003B000 {
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dst,stm32-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
70 maxItems: 2
88 i2s2: audio-controller@4000b000 {

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