Lines Matching +full:2 +full:b000
16 SDTCisSameAs<1, 2>,
20 SDTCisSameAs<1, 2>,
24 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
25 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
26 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
27 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
28 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
30 SDTCisVT<2, i32>, SDTCisSameAs<0, 3>,
54 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
56 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def immZExt2Ptr : ImmLeaf<iPTR, [{return isUInt<2>(Imm);}]>;
64 def timmZExt2Ptr : TImmLeaf<iPTR, [{return isUInt<2>(Imm);}]>;
70 def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>;
310 // power of 2
315 // inverse of an exact power of 2
390 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
391 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
392 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
393 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
410 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
411 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
412 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
413 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
415 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
416 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
417 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
418 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
530 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
531 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
532 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
533 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
535 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
536 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
537 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
538 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
603 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
604 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
605 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
934 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
935 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
936 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
937 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
972 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
973 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
974 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
975 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
986 class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>;
987 class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>;
988 class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>;
989 class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>;
996 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
997 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
998 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
999 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
1001 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
1002 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
1003 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
1004 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
1061 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
1062 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
1063 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
1064 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
1091 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1092 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1093 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1094 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
2028 // The fexp2.df instruction multiplies the first operand by 2 to the power of