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/linux/drivers/staging/media/meson/vdec/
H A Dcodec_h264.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <media/v4l2-mem2mem.h>
8 #include <media/videobuf2-dma-contig.h>
26 #define CMD_SRC_CHANGE 1
32 #define SEI_DATA_READY BIT(15)
45 #define ERROR_FLAG BIT(9)
57 #define AR_PRESENT_FLAG BIT(0)
62 * This is a 16x16 encoded picture that will trigger drain firmware-side.
72 0x63, 0x6f, 0x64, 0x65, 0x63, 0x20, 0x2d, 0x20, 0x43, 0x6f, 0x70, 0x79,
75 0x77, 0x77, 0x77, 0x2e, 0x76, 0x69, 0x64, 0x65, 0x6f, 0x6c, 0x61, 0x6e,
[all …]
/linux/include/linux/
H A Dcper.h1 /* SPDX-License-Identifier: GPL-2.0-only */
80 /* Non-Maskable Interrupt */
87 0xD4, 0x64, 0xB3, 0x8F)
100 * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
107 * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
114 * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
157 /* If set, the component must be re-initialized or re-enabled prior to use */
208 /* PCI/PCI-X Bus */
218 0xDE, 0x3E, 0x2C, 0x64)
284 #define CPER_ARM_VALID_MPIDR BIT(0)
[all …]
/linux/drivers/reset/
H A Dreset-k230.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2022-2024 Canaan Bright Sight Co., Ltd
4 * Copyright (C) 2024-2025 Junhui Liu <junhui.liu@pigmoral.tech>
10 * up to 255 * 0.25 = 63.75 µs. For RST_TYPE_FLUSH, the reset bit is
16 * unambiguously signal whether hardware reset removal or clock-stop period
21 …* https://kendryte-download.canaan-creative.com/developer/k230/HDK/K230%E7%A1%AC%E4%BB%B6%E6%96%87…
30 #include <linux/reset-controller.h>
33 #include <dt-bindings/reset/canaan,k230-rst.h>
36 * enum k230_rst_type - K230 reset types
38 * Automatically clears, has write enable and done bit, active high
[all …]
/linux/include/video/
H A Dtdfx.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/i2c-algo-bit.h>
34 #define HWCURLOC 0x64
76 #define COLORFORE (0x00100000 + 0x64)
91 #define AUTOINC_DSTX BIT(10)
92 #define AUTOINC_DSTY BIT(11)
98 #define STATUS_RETRACE BIT(6)
99 #define STATUS_BUSY BIT(9)
100 #define MISCINIT1_CLUT_INV BIT(0)
101 #define MISCINIT1_2DBLOCK_DIS BIT(15)
[all …]
/linux/drivers/bus/mhi/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 #define ECABAP_HIGHER 0x64
62 #define BHI_OEMPKHASH(n) (0x64 + (0x4 * (n)))
81 #define BHIE_RXVECADDR_HIGH_OFFS 0x64
112 #define MHICTRL_RESET_MASK BIT(1)
114 #define MHISTATUS_SYSERR_MASK BIT(2)
115 #define MHISTATUS_READY_MASK BIT(0)
144 #define MHI_TRE_GET_DWORD(tre, word) le32_to_cpu((tre)->dword[(word)])
145 #define MHI_TRE_GET_CMD_CHID(tre) FIELD_GET(GENMASK(31, 24), MHI_TRE_GET_DWORD(tre, 1))
146 #define MHI_TRE_GET_CMD_TYPE(tre) FIELD_GET(GENMASK(23, 16), MHI_TRE_GET_DWORD(tre, 1))
[all …]
/linux/sound/soc/codecs/
H A Dtas2764-quirks.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 * Disable noise gate and flip down reserved bit in NS_CFG0
15 #define TAS2764_NOISE_GATE_DISABLE BIT(0)
22 * CONV_VBAT_PVDD_MODE=1
24 #define TAS2764_CONV_VBAT_PVDD_MODE BIT(1)
33 #define TAS2764_DMOD_RST BIT(2)
42 #define TAS2764_UNK_SEQ0 BIT(3)
50 * Unknown 0x614 - 0x61f writes
52 #define TAS2764_APPLE_UNK_SEQ1 BIT(4)
72 #define TAS2764_APPLE_UNK_SEQ2 BIT(5)
[all …]
H A Drt1318-sdw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt1318-sdw.c -- rt1318 SDCA ALSA SoC amplifier audio driver
19 #include <sound/soc-dapm.h>
21 #include "rt1318-sdw.h"
29 { 0xc007, 0x64 },
135 { 0xdba8, 0x64 },
137 { 0xdda8, 0x64 },
175 { 0xc007, 0x64 },
218 { 0xdd94, 0x64 },
347 struct sdw_slave_prop *prop = &slave->prop; in rt1318_read_prop()
[all …]
/linux/include/sound/
H A Dtas2781.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 // Copyright (C) 2022 - 2025 Texas Instruments Incorporated
12 // Author: Shenghao Ding <shenghao-ding@ti.com>
13 // Author: Kevin Lu <kevin-lu@ti.com>
24 #include "tas2781-dsp.h"
27 #define TAS2781_DRV_VER 1
54 #define TASDEVICE_REG_SWRESET_RESET BIT(0)
56 #define TAS5825_REG_SWRESET_RESET (BIT(
[all...]
H A Dac97_codec.h1 /* SPDX-License-Identifier: GPL-2.0+
24 /* specific - SigmaTel */
25 #define AC97_SIGMATEL_OUTSEL 0x64 /* Output Select, STAC9758 */
33 #define AC97_SIGMATEL_MULTICHN 0x74 /* Multi-Channel programming */
37 /* specific - Analog Devices */
47 /* specific - Cirrus Logic */
56 /* specific - Conexant */
58 #define AC97_CXR_SPDIFEN (1<<3)
59 #define AC97_CXR_COPYRGT (1<<2)
64 /* specific - ALC */
[all …]
/linux/Documentation/trace/
H A Duprobetracer.rst2 Uprobe-tracer: Uprobe-based Event Tracing
9 --------
13 Similar to the kprobe-event tracer, this doesn't need to be activated via
18 However unlike kprobe-event tracer, the uprobe event interface expects the
26 -------------------------
32 -:[GRP/][EVENT] : Clear uprobe or uretprobe event
47 $retval : Fetch return value.(\*1)
49 +|-[u]OFFS(FETCHARG) : Fetch memory at FETCHARG +|- OFFS address.(\*2)(\*3)
54 (x8/x16/x32/x64), "string" and bitfield are supported.
56 (\*1) only for return probe.
[all …]
/linux/include/linux/mfd/
H A Dtps65912.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
117 #define TPS65912_VERNUM 0x64
118 #define TPS6591X_MAX_REGISTER 0x64
121 #define TPS65912_INT_STS_PWRHOLD_F BIT(0)
122 #define TPS65912_INT_STS_VMON BIT(1)
123 #define TPS65912_INT_STS_PWRON BIT(2)
124 #define TPS65912_INT_STS_PWRON_LP BIT(3)
125 #define TPS65912_INT_STS_PWRHOLD_R BIT(4)
126 #define TPS65912_INT_STS_HOTDIE BIT(5)
[all …]
H A Dbd9571mwv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * ROHM BD9571MWV-M and BD9574MWF-M driver
31 #define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0 BIT(0)
32 #define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1 BIT(1)
33 #define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0C BIT(2)
34 #define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1C BIT(3)
63 #define BD9571MWV_GPIO_INT_SET 0x64
80 #define BD9571MWV_INT_INTREQ_MD1_INT BIT(0)
81 #define BD9571MWV_INT_INTREQ_MD2_E1_INT BIT(1)
82 #define BD9571MWV_INT_INTREQ_MD2_E2_INT BIT(2)
[all …]
H A Dmax77686-private.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * max77686-private.h - Voltage regulator driver for the Maxim 77686/802
34 /* Reserved: 0x0B-0x0F */
78 /* Reserved: 0x3A-0x3F */
106 /* Reserved: 0x5A-0x5F */
111 MAX77686_REG_LDO5CTRL2 = 0x64,
133 /* Reserved: 0x7A-0x7D */
189 /* Reserved: 0x0C-0x0D */
214 /* Reserved: 0x25-0x26 */
224 /* Reserved: 0x30-0x36 */
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
22 maxItems: 1
26 maxItems: 1
28 enable-gpios:
30 maxItems: 1
32 reset-gpios:
[all …]
/linux/drivers/irqchip/
H A Dirq-imx-mu-msi.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * Based on drivers/mailbox/imx-mailbox.c
27 #include <linux/irqchip/irq-msi-lib.h>
48 IMX_MU_V2 = BIT(1),
52 #define IMX_MU_xCR_RIEn(data, x) ((data->cfg->type) & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
53 #define IMX_MU_xSR_RFn(data, x) ((data->cfg->type) & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
75 iowrite32(val, msi_data->regs + offs); in imx_mu_write()
80 return ioread32(msi_data->regs + offs); in imx_mu_read()
88 raw_spin_lock_irqsave(&msi_data->lock, flags); in imx_mu_xcr_rmw()
89 val = imx_mu_read(msi_data, msi_data->cfg->xCR[type]); in imx_mu_xcr_rmw()
[all …]
/linux/drivers/acpi/pmic/
H A Dintel_pmic_bytcrc.c1 // SPDX-License-Identifier: GPL-2.0
15 #define PWR_SOURCE_SELECT BIT(1)
23 .bit = ??,
28 .bit = 0x00,
29 }, /* SYSX -> VSYS_SX */
33 .bit = 0x00,
34 }, /* SYSU -> VSYS_U */
37 .reg = 0x64,
38 .bit = 0x00,
39 }, /* SYSS -> VSYS_S */
[all …]
/linux/lib/math/
H A Ddiv64.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on former do_div() implementation from asm-parisc/div64.h:
6 * Copyright (C) 1999 Hewlett-Packard Co
7 * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
10 * Generic C version of 64bit/32bit division and modulo, with
11 * 64bit result and 32bit remainder.
16 * for some CPUs. __div64_32() can be overridden by linking arch-specific
28 /* Not needed on 64bit architectures */
36 uint64_t res, d = 1; in __div64_32()
39 /* Reduce the thing a bit first */ in __div64_32()
[all …]
/linux/crypto/asymmetric_keys/
H A Dselftest_rsa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Self-tests for PKCS#7 RSA signature verification.
15 /* 4096-bit RSA certificate */
45 "\xe8\xde\x09\x31\x89\xed\x0e\x11\xa1\xfa\x8a\xe9\xe9\x64\x59\x62"
73 "\xcc\x4d\x14\x61\x64\x81\x93\xd3\x33\xed\xc8\xff\xf1\x78\xcc\x5f"
100 "\x0a\xd1\x95\x76\x8d\xec\x9e\xdd\x0b\x15\x97\x64\xad\xe5\xf2\x62"
109 "\x74\x20\x64\x61\x74\x61\x20\x75\x73\x65\x64\x20\x66\x6f\x72\x20"
116 /* RSA signature using PKCS#1 v1.5 padding with SHA-256 */
141 "\x22\x66\xc5\x3b\xc1\xba\xfc\x53\x18\x98\xe2\x21\x64\xc6\x52\x87"
157 "\xdd\x23\xd6\x53\xb1\x74\x77\x12\xf7\x9c\xf0\x9a\x6b\xf7\xa9\x64"
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
[all …]
/linux/sound/pci/
H A Dazt3328.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
6 * "WRITE_ONLY" == register does not indicate actual bit values */
25 /* able to reactivate output after output muting due to 8/16bit
27 * 0x0001 is the only bit that's able to start the DMA counter */
31 /* able to reactivate output after output muting due to 8/16bit
42 * (bit 1 of port 0x64 indicates interrupt for one of these three types)
47 #define IRQ_FINISHED_DMABUF_1 0x0002 /* 1st dmabuf finished & ACK */
52 /* start address of 1st DMA transfer area, PU:0x00000000 */
85 …REQ_SUSPECTED_66200 0x06 | SOUNDFORMAT_XTAL2 /* 66200 (13240 * 5); 64000 may have been nicer :-\ */
[all …]
/linux/sound/soc/ti/
H A Domap-dmic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * omap-dmic.h -- OMAP Digital Microphone Controller
27 #define OMAP_DMIC_FIFO_DMIC3L_DATA_REG 0x64
29 /* IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR bit fields */
30 #define OMAP_DMIC_IRQ (1 << 0)
31 #define OMAP_DMIC_IRQ_FULL (1 << 1)
32 #define OMAP_DMIC_IRQ_ALMST_EMPTY (1 << 2)
33 #define OMAP_DMIC_IRQ_EMPTY (1 << 3)
36 /* DMIC_DMAENABLE bit fields */
39 /* DMIC_CTRL bit fields */
[all …]
/linux/Documentation/bpf/
H A Dbpf_design_QA.rst18 Q: Is BPF a generic instruction set similar to x64 and arm64?
19 -------------------------------------------------------------
23 -------------------------------------
27 -----------------------------------------------------------
34 with two most used architectures x64 and arm64 (and takes into
45 A: NO. BPF calling convention only allows registers R1-R5 to be used
47 (unlike x64 ISA that allows msft, cdecl and other conventions)
50 -----------------------------------------------------------------
54 ------------------------------------------
62 Q: Does C-calling convention diminishes possible use cases?
[all …]
/linux/drivers/media/usb/gspca/
H A Dpac207.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2005 Thomas Kaiser thomas@kaiser-linux.li
9 * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
33 #define PAC207_EXPOSURE_MAX 90 /* 1 sec expo time / 1 fps */
69 .priv = 1},
81 {0x49, 0x64, 0x64, 0x64, 0x04, 0x10, 0xf0, 0x30},
89 struct usb_device *udev = gspca_dev->dev; in pac207_write_regs()
92 if (gspca_dev->usb_err < 0) in pac207_write_regs()
95 memcpy(gspca_dev->usb_buf, buffer, length); in pac207_write_regs()
100 gspca_dev->usb_buf, length, PAC207_CTRL_TIMEOUT); in pac207_write_regs()
[all …]
/linux/Documentation/devicetree/bindings/media/
H A Drenesas,drif.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Gen3 Digital Radio Interface Controller (DRIF)
10 - Ramesh Shanmugasundaram <rashanmu@gmail.com>
11 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
14 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
17 +---------------------+ +---------------------+
18 | |-----SCK------->|CLK |
19 | Master |-----SS-------->|SYNC DRIFn (slave) |
[all …]
/linux/sound/soc/tegra/
H A Dtegra210_sfc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tegra210_sfc.h - Definitions for Tegra210 SFC driver
5 * Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
34 #define TEGRA210_SFC_TX_FREQ 0x64
48 #define TEGRA210_SFC_EN (1 << TEGRA210_SFC_EN_SHIFT)
53 #define TEGRA210_SFC_COEF_RAM_EN BIT(0)
55 #define TEGRA210_SFC_SOFT_RESET_EN BIT(0)
59 #define TEGRA210_SFC_RAM_CTRL_RW_WRITE (1 << 14)
60 #define TEGRA210_SFC_RAM_CTRL_ADDR_INIT_EN (1 << 13)
61 #define TEGRA210_SFC_RAM_CTRL_SEQ_ACCESS_EN (1 << 12)

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