1 // SPDX-License-Identifier: GPL-2.0
15 #define PWR_SOURCE_SELECT	BIT(1)
23 		.bit = ??,
28 		.bit = 0x00,
29 	}, /* SYSX -> VSYS_SX */
33 		.bit = 0x00,
34 	}, /* SYSU -> VSYS_U */
37 		.reg = 0x64,
38 		.bit = 0x00,
39 	}, /* SYSS -> VSYS_S */
43 		.bit = 0x00,
44 	}, /* V50S -> V5P0S */
48 		.bit = 0x00,
49 	}, /* HOST -> VHOST, USB2/3 host */
53 		.bit = 0x00,
54 	}, /* VBUS -> VBUS, USB2/3 OTG */
58 		.bit = 0x00,
59 	}, /* HDMI -> VHDMI */
63 		.bit = ??,
68 		.bit = 0x00,
69 	}, /* X285 -> V2P85SX, camera */
73 		.bit = ??,
78 		.bit = 0x00,
79 	}, /* V33S -> V3P3S, display/ssd/audio */
83 		.bit = 0x00,
84 	}, /* V33U -> V3P3U, SDIO wifi&bt */
88 		.bit = ??,
93 		.bit = 0x00,
94 	}, /* V18S -> V1P8S, SOC/USB PHY/SIM */
98 		.bit = 0x00,
99 	}, /* V18X -> V1P8SX, eMMC/camara/audio */
103 		.bit = 0x00,
104 	}, /* V18U -> V1P8U, LPDDR */
108 		.bit = 0x00,
109 	}, /* V12X -> V1P2SX, SOC SFR */
113 		.bit = 0x00,
114 	}, /* V12S -> V1P2S, MIPI */
118 		.bit = ??,
123 		.bit = 0x00,
124 	}, /* V10S -> V1P0S, SOC GFX */
128 		.bit = 0x00,
129 	}, /* V10X -> V1P0SX, SOC display/DDR IO/PCIe */
131 		.address = 0x64,
133 		.bit = 0x00,
134 	}, /* V105 -> V1P05S, L2 SRAM */
189 				    int bit, u64 *value)  in intel_crc_pmic_get_power()  argument
194 		return -EIO;  in intel_crc_pmic_get_power()
196 	*value = (data & PWR_SOURCE_SELECT) && (data & BIT(bit)) ? 1 : 0;  in intel_crc_pmic_get_power()
201 				       int bit, bool on)  in intel_crc_pmic_update_power()  argument
206 		return -EIO;  in intel_crc_pmic_update_power()
209 		data |= PWR_SOURCE_SELECT | BIT(bit);  in intel_crc_pmic_update_power()
211 		data &= ~BIT(bit);  in intel_crc_pmic_update_power()
216 		return -EIO;  in intel_crc_pmic_update_power()
226 	 * and 2bits in reg-1: bit0,1  in intel_crc_pmic_get_raw_temp()
229 	    regmap_read(regmap, reg - 1, &temp_h))  in intel_crc_pmic_get_raw_temp()
230 		return -EIO;  in intel_crc_pmic_get_raw_temp()
238 		regmap_update_bits(regmap, reg - 1, 0x3, raw >> 8) ? -EIO : 0;  in intel_crc_pmic_update_aux()
242 					int reg, int bit, u64 *value)  in intel_crc_pmic_get_policy()  argument
247 		return -EIO;  in intel_crc_pmic_get_policy()
253 					int reg, int bit, int enable)  in intel_crc_pmic_update_policy()  argument
257 	/* Update to policy enable bit requires unlocking a0lock */  in intel_crc_pmic_update_policy()
259 		return -EIO;  in intel_crc_pmic_update_policy()
262 		return -EIO;  in intel_crc_pmic_update_policy()
265 		return -EIO;  in intel_crc_pmic_update_policy()
269 		return -EIO;  in intel_crc_pmic_update_policy()
291 	struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);  in intel_crc_pmic_opregion_probe()
292 	return intel_pmic_install_opregion_handler(&pdev->dev,  in intel_crc_pmic_opregion_probe()
293 			ACPI_HANDLE(pdev->dev.parent), pmic->regmap,  in intel_crc_pmic_opregion_probe()