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/linux/drivers/net/ethernet/intel/e1000e/
H A D80003es2lan.h57 /* Kumeran Mode Control Register (Page 193, Register 16) */
63 /* Power Management Control Register (Page 193, Register 20) */
/linux/drivers/media/platform/ti/omap3isp/
H A Dgamma_table.h34 191, 191, 191, 192, 192, 192, 192, 193, 193, 193, 193, 194, 194, 194, 194, 195,
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt6893.c106 PIN_FIELD_BASE(193, 193, 7, 0x00f0, 0x10, 4, 1),
218 PIN_FIELD_BASE(193, 193, 7, 0x0050, 0x10, 23, 1),
504 PIN_FIELD_BASE(193, 193, 7, 0x0000, 0x10, 12, 3),
542 PIN_FIELD_BASE(193, 193, 7, 0x0080, 0x10, 5, 1),
585 PIN_FIELD_BASE(193, 193, 7, 0x00a0, 0x10, 5, 1),
634 PIN_FIELD_BASE(193, 193, 7, 0x00b0, 0x10, 5, 1),
793 MTK_PULL_PUPD_R1R0_TYPE, /* 192 */ MTK_PULL_PUPD_R1R0_TYPE, /* 193 */
H A Dpinctrl-mt6878.c245 PIN_FIELD_BASE(193, 193, 7, 0x0040, 0x10, 7, 1),
444 PIN_FIELD_BASE(193, 193, 7, 0x00d0, 0x10, 7, 1),
793 PIN_FIELD_BASE(193, 193, 7, 0x0070, 0x10, 7, 1),
848 PIN_FIELD_BASE(193, 193, 7, 0x0080, 0x10, 7, 1),
903 PIN_FIELD_BASE(193, 193, 7, 0x0090, 0x10, 7, 1),
1102 PIN_FIELD_BASE(193, 193, 7, 0x0000, 0x10, 21, 3),
1403 MTK_PULL_PUPD_R1R0_TYPE /* 193 */,
/linux/include/linux/
H A Dtpm_command.h11 #define TPM_TAG_RQU_COMMAND 193
/linux/include/dt-bindings/clock/
H A Drk3368-cru.h89 #define ACLK_GPU_CFG 193
336 #define SRST_CORE_L1 193
H A Dhix5hd2-clock.h77 #define HIX5HD2_MAC1_CLK 193
H A Dhi3620-clock.h109 #define HI3620_DPHY2_CLK 193
H A Drockchip,rv1126-cru.h259 #define ACLK_PDNPU_NP5 193
588 #define SRST_DDR_DFICTL_P 193
/linux/arch/mips/include/asm/
H A Dseccomp.h11 __NR_O32_Linux + 1, __NR_O32_Linux + 193, in get_compat_mode1_syscalls()
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt38 193: sdio1 reset
/linux/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier-ld6b.c594 UNIPHIER_PINCTRL_PIN(193, "A_D_HS0DIN3", 0,
595 193, UNIPHIER_PIN_DRV_1BIT,
596 193, UNIPHIER_PIN_PULL_DOWN),
725 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200,
830 185, 187, 188, 189, 190, 191, 192, 193, /* PORT23x */
/linux/sound/ppc/
H A Dbeep.c54 197, 193, 188, 183, 179, 174, 170, 166,
73 -163, -166, -170, -174, -179, -183, -188, -193,
/linux/Documentation/devicetree/bindings/net/
H A Dsamsung-sxgbe.txt42 <0 192 4>, <0 193 4>, <0 194 4>, <0 195 4>,
/linux/drivers/gpu/drm/amd/include/ivsrcid/gfx/
H A Dirqsrcs_gfx_10_1.h40 #define GFX_10_1__SRCID__CP_SIG_INCOMPLETE 193 // C1 "Surface Probe Fault Signal Incomplete"
H A Dirqsrcs_gfx_9_0.h42 #define GFX_9_0__SRCID__CP_SIG_INCOMPLETE 193 /* C1 "Surface Probe Fault Signal Incomplete" */
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044-reset.h118 #define RST_SE_CTRL 193
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Drouter_scale.sh94 echo route add 193.${i}.${j}.${k}/32 dev $rp2 \
/linux/include/dt-bindings/reset/
H A Damlogic,meson-axg-reset.h99 #define RESET_PERIPHS_SPICC 193
H A Damlogic,meson8b-reset.h107 #define RESET_PERIPHS_IR_REMOTE 193
H A Damlogic,meson-g12a-reset.h107 #define RESET_SPICC0 193
H A Damlogic,meson-gxbb-reset.h133 #define RESET_PERIPHS_SPICC 193
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712-pinfunc.h1013 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_GPIO193 (MTK_PIN_NO(193) | 0)
1014 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO0_DO0 (MTK_PIN_NO(193) | 1)
1015 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO1_DO (MTK_PIN_NO(193) | 2)
1016 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2SO2_DO (MTK_PIN_NO(193) | 3)
1017 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_USB4_FT_SDA (MTK_PIN_NO(193) | 4)
1018 #define MT2712_PIN_193_I2SO0_DATA0__FUNC_I2S_IQ1_SDIA (MTK_PIN_NO(193) | 7)
/linux/include/dt-bindings/pinctrl/
H A Dmt6795-pinfunc.h886 #define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0)
887 #define PINMUX_GPIO193__FUNC_I2S0_BCK (MTK_PIN_NO(193) | 1)
888 #define PINMUX_GPIO193__FUNC_I2S1_BCK (MTK_PIN_NO(193) | 2)
889 #define PINMUX_GPIO193__FUNC_I2S2_BCK (MTK_PIN_NO(193) | 3)
890 #define PINMUX_GPIO193__FUNC_NRNB1 (MTK_PIN_NO(193) | 4)
/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-igep0050.dts105 <&gpio7 1 0>, /* 193, HPD */

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