xref: /linux/arch/riscv/boot/dts/sophgo/sg2044-reset.h (revision 31848987f177a6c0944fd0254a55ffd7c52a8c50)

/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
/*
 * Copyright (C) 2025 Inochi Amaoto <inochiama@gmail.com>
 */

#ifndef _SG2044_RESET_H
#define _SG2044_RESET_H

#define RST_AP_SYS			0
#define RST_AP_SYS_CORE0		1
#define RST_AP_SYS_CORE1		2
#define RST_AP_SYS_CORE2		3
#define RST_AP_SYS_CORE3		4
#define RST_AP_PIC			5
#define RST_AP_TDT			6
#define RST_RP_PIC_TDT			7
#define RST_HSDMA			8
#define RST_SYSDMA			9
#define RST_EFUSE0			10
#define RST_EFUSE1			11
#define RST_RTC				12
#define RST_TIMER			13
#define RST_WDT				14
#define RST_AHB_ROM0			15
#define RST_AHB_ROM1			16
#define RST_I2C0			17
#define RST_I2C1			18
#define RST_I2C2			19
#define RST_I2C3			20
#define RST_GPIO0			21
#define RST_GPIO1			22
#define RST_GPIO2			23
#define RST_PWM				24
#define RST_AXI_SRAM0			25
#define RST_AXI_SRAM1			26
#define RST_SPIFMC0			27
#define RST_SPIFMC1			28
#define RST_MAILBOX			29
#define RST_ETH0			30
#define RST_EMMC			31
#define RST_SD				32
#define RST_UART0			33
#define RST_UART1			34
#define RST_UART2			35
#define RST_UART3			36
#define RST_SPI0			37
#define RST_SPI1			38
#define RST_MTLI			39
#define RST_DBG_I2C			40
#define RST_C2C0			41
#define RST_C2C1			42
#define RST_C2C2			43
#define RST_C2C3			44
#define RST_CXP				45
#define RST_DDR0			46
#define RST_DDR1			47
#define RST_DDR2			48
#define RST_DDR3			49
#define RST_DDR4			50
#define RST_DDR5			51
#define RST_DDR6			52
#define RST_DDR7			53
#define RST_DDR8			54
#define RST_DDR9			55
#define RST_DDR10			56
#define RST_DDR11			57
#define RST_DDR12			58
#define RST_DDR13			59
#define RST_DDR14			60
#define RST_DDR15			61
#define RST_BAR				62
#define RST_K2K				63
#define RST_CC_SYS_X1Y1			64
#define RST_CC_SYS_X1Y2			65
#define RST_CC_SYS_X1Y3			66
#define RST_CC_SYS_X1Y4			67
#define RST_CC_SYS_X0Y1			68
#define RST_CC_SYS_X0Y2			69
#define RST_CC_SYS_X0Y3			70
#define RST_CC_SYS_X0Y4			71
#define RST_SC_X1Y1			80
#define RST_SC_X1Y2			81
#define RST_SC_X1Y3			82
#define RST_SC_X1Y4			83
#define RST_SC_X0Y1			84
#define RST_SC_X0Y2			85
#define RST_SC_X0Y3			86
#define RST_SC_X0Y4			87
#define RST_RP_CLUSTER_X1Y1_S0		160
#define RST_RP_CLUSTER_X1Y1_S1		161
#define RST_RP_CLUSTER_X1Y2_S0		162
#define RST_RP_CLUSTER_X1Y2_S1		163
#define RST_RP_CLUSTER_X1Y3_S0		164
#define RST_RP_CLUSTER_X1Y3_S1		165
#define RST_RP_CLUSTER_X1Y4_S0		166
#define RST_RP_CLUSTER_X1Y4_S1		167
#define RST_RP_CLUSTER_X0Y1_W0		168
#define RST_RP_CLUSTER_X0Y1_W1		169
#define RST_RP_CLUSTER_X0Y2_W0		170
#define RST_RP_CLUSTER_X0Y2_W1		171
#define RST_RP_CLUSTER_X0Y3_W0		172
#define RST_RP_CLUSTER_X0Y3_W1		173
#define RST_RP_CLUSTER_X0Y4_W0		174
#define RST_RP_CLUSTER_X0Y4_W1		175
#define RST_TPSYS_X1Y1			180
#define RST_TPSYS_X1Y2			181
#define RST_TPSYS_X1Y3			182
#define RST_TPSYS_X1Y4			183
#define RST_TPSYS_X0Y1			184
#define RST_TPSYS_X0Y2			185
#define RST_TPSYS_X0Y3			186
#define RST_TPSYS_X0Y4			187
#define RST_SPACC			188
#define RST_PKA				189
#define RST_SE_TRNG			190
#define RST_SE_DBG			191
#define RST_SE_FAB_FW			192
#define RST_SE_CTRL			193
#define RST_MAILBOX0			194
#define RST_MAILBOX1			195
#define RST_MAILBOX2			196
#define RST_MAILBOX3			197
#define RST_INTC0			198
#define RST_INTC1			199
#define RST_INTC2			200
#define RST_INTC3			201

#endif /* _DT_BINDINGS_SG2044_RESET_H */