Home
last modified time | relevance | path

Searched +full:1 +full:- +full:cpu (Results 1 – 25 of 1053) sorted by relevance

12345678910>>...43

/linux/tools/testing/selftests/cpu-hotplug/
H A Dcpu-on-off-test.sh2 # SPDX-License-Identifier: GPL-2.0
5 # Kselftest framework requirement - SKIP code is 4.
18 taskset -p 01 $$
20 SYSFS=`mount -t sysfs | head -1 | awk '{ print $3 }'`
22 if [ ! -d "$SYSFS" ]; then
27 if ! ls $SYSFS/devices/system/cpu/cpu* > /dev/null 2>&1; then
28 echo $msg cpu hotplug is not supported >&2
32 echo "CPU online/offline summary:"
33 online_cpus=`cat $SYSFS/devices/system/cpu/online`
34 online_max=${online_cpus##*-}
[all …]
/linux/tools/perf/util/
H A Dcpumap.c1 // SPDX-License-Identifier: GPL-2.0
22 * CPU number.
30 __u32 bit_mask32 = 1U << (i & 31); in perf_record_cpu_map_data__test_bit()
32 __u64 bit_mask64 = ((__u64)1) << (i & 63); in perf_record_cpu_map_data__test_bit()
34 return (data->mask32_data.long_size == 4) in perf_record_cpu_map_data__test_bit()
35 ? (bit_word32 < data->mask32_data.nr) && in perf_record_cpu_map_data__test_bit()
36 (data->mask32_data.mask[bit_word32] & bit_mask32) != 0 in perf_record_cpu_map_data__test_bit()
37 : (bit_word64 < data->mask64_dat in perf_record_cpu_map_data__test_bit()
106 int cpu; cpu_map__from_mask() local
129 for (int cpu = data->range_cpu_data.start_cpu; cpu <= data->range_cpu_data.end_cpu; cpu_map__from_range() local
190 cpu__get_topology_int(int cpu,const char * name,int * value) cpu__get_topology_int() argument
200 cpu__get_socket_id(struct perf_cpu cpu) cpu__get_socket_id() argument
206 aggr_cpu_id__socket(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__socket() argument
242 struct perf_cpu cpu; cpu_aggr_map__new() local
284 cpu__get_die_id(struct perf_cpu cpu) cpu__get_die_id() argument
291 aggr_cpu_id__die(struct perf_cpu cpu,void * data) aggr_cpu_id__die() argument
314 cpu__get_cluster_id(struct perf_cpu cpu) cpu__get_cluster_id() argument
321 aggr_cpu_id__cluster(struct perf_cpu cpu,void * data) aggr_cpu_id__cluster() argument
338 cpu__get_core_id(struct perf_cpu cpu) cpu__get_core_id() argument
344 aggr_cpu_id__core(struct perf_cpu cpu,void * data) aggr_cpu_id__core() argument
363 aggr_cpu_id__cpu(struct perf_cpu cpu,void * data) aggr_cpu_id__cpu() argument
377 aggr_cpu_id__node(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__node() argument
385 aggr_cpu_id__global(struct perf_cpu cpu,void * data __maybe_unused) aggr_cpu_id__global() argument
520 cpu__get_node(struct perf_cpu cpu) cpu__get_node() argument
553 unsigned int cpu, mem; cpu__setup_cpunode_map() local
611 struct perf_cpu cpu = { .cpu = INT_MAX }; cpu_map__snprint() local
658 int i, cpu; cpu_map__snprint_mask() local
[all...]
/linux/arch/arm/mach-bcm/
H A Dplatsmp-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom STB CPU SMP and hotplug support for ARM
5 * Copyright (C) 2013-2014 Broadcom Corporation
22 #include <asm/mach-types.h>
27 ZONE_MAN_RESET_CNTL_MASK = BIT(1),
40 CPU0_PWR_ZONE_CTRL_REG = 1,
52 * We must quiesce a dying CPU before it can be killed by the boot CPU. Because
59 static int per_cpu_sw_state_rd(u32 cpu) in per_cpu_sw_state_rd() argument
61 sync_cache_r(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu))); in per_cpu_sw_state_rd()
62 return per_cpu(per_cpu_sw_state, cpu); in per_cpu_sw_state_rd()
[all …]
/linux/tools/power/cpupower/lib/
H A Dcpupower.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
19 if (access(path, F_OK) == -1) in is_valid_path()
21 return 1; in is_valid_path()
30 if (fd == -1) in cpupower_read_sysfs()
33 numread = read(fd, buf, buflen - 1); in cpupower_read_sysfs()
34 if (numread < 1) { in cpupower_read_sysfs()
51 if (fd == -1) in cpupower_write_sysfs()
54 numwritten = write(fd, buf, buflen - 1); in cpupower_write_sysfs()
55 if (numwritten < 1) { in cpupower_write_sysfs()
[all …]
/linux/Documentation/arch/x86/
H A Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - topology_num_threads_per_package()
54 - topology_num_cores_per_package()
[all …]
/linux/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * x86_energy_perf_policy -- set the energy versus performance
7 * Copyright (c) 2010 - 2017 Intel Corporation.
30 #define OPTARG_NORMAL (INT_MAX - 1)
31 #define OPTARG_POWER (INT_MAX - 2)
32 #define OPTARG_BALANCE_POWER (INT_MAX - 3)
33 #define OPTARG_BALANCE_PERFORMANCE (INT_MAX - 4)
34 #define OPTARG_PERFORMANCE (INT_MAX - 5)
94 #define PATH_TO_CPU "/sys/devices/system/cpu/"
103 fprintf(stderr, "scope: --cpu cpu-list [--hwp-use-pkg #] | --pkg pkg-list\n"); in usage()
[all …]
/linux/include/linux/
H A Dcpumask.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 * set of CPUs in a system, one bit position per CPU number. In general,
20 * cpumask_pr_args - printf args to output a cpumask
27 #if (NR_CPUS == 1) || defined(CONFIG_FORCE_NR_CPUS)
35 #if (NR_CPUS == 1) || defined(CONFIG_FORCE_NR_CPUS) in set_nr_cpu_ids()
47 * optimized routines that work for the single-word case, but only when
57 * they set bits or just don't have any faster fixed-sized versions. We
63 * optimization comes from being able to potentially use a compile-time
64 * constant instead of a run-time generated exact number of CPUs.
82 * cpu_possible_mask- has bit 'cpu' set iff cpu is populatable
[all …]
/linux/tools/testing/selftests/net/forwarding/
H A Dtsn_lib.sh2 # SPDX-License-Identifier: GPL-2.0
3 # Copyright 2021-2022 NXP
10 ISOCHRON_CPU=1
13 # https://github.com/vladimiroltean/tsn-scripts
14 # WARNING: isochron versions pre-1.0 are unstable,
25 local uds_address=$1
28 if ! [ -z "${uds_address}" ]; then
29 extra_args="${extra_args} -z ${uds_address}"
34 chrt -f 10 phc2sys -m \
35 -a -rr \
[all …]
/linux/tools/perf/tests/
H A Dtopology.c1 // SPDX-License-Identifier: GPL-2.0
14 #define TEMPL "/tmp/perf-test-XXXXXX"
26 return -1; in get_temp()
44 session->evlist = evlist__new_default(); in session_write_header()
45 TEST_ASSERT_VAL("can't get evlist", session->evlist); in session_write_header()
47 perf_header__set_feat(&session->heade in session_write_header()
116 struct perf_cpu cpu = { .cpu = i }; check_cpu_topology() local
[all...]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …Translation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is …
17 "Unit": "CPU-M-CF",
21 …ress for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progr…
24 "Unit": "CPU-M-CF",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/arch/powerpc/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
29 #include <linux/cpu.h>
76 /* State of each CPU during hotplug phases */
98 #define THREAD_GROUP_SHARE_L1 1
117 * On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
118 * the set its siblings that share the L1-cache.
123 * On some big-cores system, thread_group_l2_cache_map for each CPU
125 * L2-cache.
130 * On P10, thread_group_l3_cache_map for each CPU is equal to the
[all …]
/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt2 CPU capacity bindings
6 1 - Introduction
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
31 * Not subject to dynamic frequency scaling of the CPU
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux/Documentation/scheduler/
H A Dsched-bwc.rst6 This document only discusses CPU bandwidth control for SCHED_NORMAL.
7 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst
10 specification of the maximum CPU bandwidth available to a group or hierarchy.
14 microseconds of CPU time. That quota is assigned to per-cpu run queues in
22 is transferred to cpu-local "silos" on a demand basis. The amount transferred
26 -------------
30 Traditional (UP-EDF) bandwidth control is something like:
32 (U = \Sum u_i) <= 1
35 stable. After all, if U were > 1, then for every second of walltime,
64 there many cgroups or CPU is under utilized, the interference is
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …ata cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this c…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2042-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #address-cells = <1>;
9 #size-cells = <0>;
10 timebase-frequency = <50000000>;
12 cpu-map {
16 cpu = <&cpu0>;
19 cpu = <&cpu1>;
22 cpu = <&cpu2>;
25 cpu = <&cpu3>;
31 cpu = <&cpu4>;
[all …]
/linux/arch/x86/xen/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/cpu.h>
10 #include <xen/hvc-console.h>
11 #include "xen-ops.h"
13 static DEFINE_PER_CPU(struct xen_common_irq, xen_resched_irq) = { .irq = -1 };
14 static DEFINE_PER_CPU(struct xen_common_irq, xen_callfunc_irq) = { .irq = -1 };
15 static DEFINE_PER_CPU(struct xen_common_irq, xen_callfuncsingle_irq) = { .irq = -1 };
16 static DEFINE_PER_CPU(struct xen_common_irq, xen_debug_irq) = { .irq = -1 };
32 void xen_smp_intr_free(unsigned int cpu) in xen_smp_intr_free() argument
34 kfree(per_cpu(xen_resched_irq, cpu).name); in xen_smp_intr_free()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
H A Dbasic.json3 "Unit": "CPU-M-CF",
7 …tion": "This counter counts the total number of CPU cycles, excluding the number of cycles while t…
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]
/linux/drivers/base/
H A Darch_topology.c1 // SPDX-License-Identifier: GPL-2.0
3 * Arch specific cpu topology information
12 #include <linux/cpu.h>
31 DEFINE_PER_CPU(unsigned long, capacity_freq_ref) = 1;
66 int cpu; in topology_set_scale_freq_source() local
77 for_each_cpu(cpu, cpus) { in topology_set_scale_freq_source()
78 sfd = rcu_dereference(*per_cpu_ptr(&sft_data, cpu)); in topology_set_scale_freq_source()
81 if (!sfd || sfd->source != SCALE_FREQ_SOURCE_ARCH) { in topology_set_scale_freq_source()
82 rcu_assign_pointer(per_cpu(sft_data, cpu), data); in topology_set_scale_freq_source()
83 cpumask_set_cpu(cpu, &scale_freq_counters_mask); in topology_set_scale_freq_source()
[all …]
/linux/kernel/sched/
H A Dcpudeadline.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Global CPU deadline management
12 return (i - 1) >> 1; in parent()
17 return (i << 1) + 1; in left_child()
22 return (i << 1) + 2; in right_child()
29 int orig_cpu = cp->elements[idx].cpu; in cpudl_heapify_down()
30 u64 orig_dl = cp->elements[idx].dl; in cpudl_heapify_down()
32 if (left_child(idx) >= cp->size) in cpudl_heapify_down()
36 while (1) { in cpudl_heapify_down()
44 if ((l < cp->size) && dl_time_before(orig_dl, in cpudl_heapify_down()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z10/
H A Dbasic.json3 "Unit": "CPU-M-CF",
7 …tion": "This counter counts the total number of CPU cycles, excluding the number of cycles while t…
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z196/
H A Dbasic.json3 "Unit": "CPU-M-CF",
7 …tion": "This counter counts the total number of CPU cycles, excluding the number of cycles while t…
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dbasic.json3 "Unit": "CPU-M-CF",
7 …tion": "This counter counts the total number of CPU cycles, excluding the number of cycles while t…
10 "Unit": "CPU-M-CF",
11 "EventCode": "1",
14 "PublicDescription": "This counter counts the total number of instructions executed by the CPU."
17 "Unit": "CPU-M-CF",
20 "BriefDescription": "Level-1 I-Cache Directory Write Count",
21 …Description": "This counter counts the total number of level-1 instruction-cache or unified-cache …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "Level-1 I-Cache Penalty Cycle Count",
[all …]
/linux/tools/tracing/rtla/src/
H A Dtimerlat_hist.c1 // SPDX-License-Identifier: GPL-2.0
91 * timerlat_free_histogram - free runtime data
96 int cpu; in timerlat_free_histogram() local
98 /* one histogram for IRQ and one for thread, per CPU */ in timerlat_free_histogram()
99 for (cpu = 0; cpu < data->nr_cpus; cpu++) { in timerlat_free_histogram()
100 if (data->hist[cpu].irq) in timerlat_free_histogram()
101 free(data->hist[cpu].irq); in timerlat_free_histogram()
103 if (data->hist[cpu].thread) in timerlat_free_histogram()
104 free(data->hist[cpu].thread); in timerlat_free_histogram()
106 if (data->hist[cpu].user) in timerlat_free_histogram()
[all …]

12345678910>>...43